CN214752882U

CN214752882U - Driving device and driving system

Info

Publication number: CN214752882U
Application number: CN202120635525.8U
Authority: CN
Inventors: 孙佳; 魏其源; 江永超; 卢俊宏; 曹江
Original assignee: Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
Current assignee: Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
Priority date: 2021-03-29
Filing date: 2021-03-29
Publication date: 2021-11-16
Anticipated expiration: 2031-03-29

Abstract

The utility model provides a drive arrangement, through the direct digital signal who generates the Micro LED chip in the drive display panel of signal generation module, then turn into digital signal for level signal by level conversion module and send for display panel, the Micro LED chip bonding in display panel has been avoided at drive IC, by the step of drive IC drive Micro LED chip and then screening Micro LED chip, drive arrangement direct drive has been reached, the effect of lighting Micro LED chip, and then the short-term test goes out bad Micro LED chip, the detection efficiency of Micro LED chip has been promoted.

Description

Driving device and driving system

Technical Field

The utility model relates to a semiconductor device field especially relates to a drive arrangement and actuating system.

Background

The Micro Light Emitting Diode (Micro LED) Display technology is based on an inorganic semiconductor Light Emitting Diode (LED) and a Mini-LED Display technology, and has the advantages of high brightness, high response speed, low power consumption, long service life and the like, and has the advantages of good stability, long service life and high operating temperature.

At present, when testing Micro LED chips in a display panel in the related art, bonding is required to be bound (bound) on a driving Chip (IC), then the driving IC drives the Micro LED chips, the Micro LED chips are detected, and the defective Micro LED chips are screened out.

Therefore, how to improve the detection efficiency of the Micro LED chip is an urgent problem to be solved.

SUMMERY OF THE UTILITY MODEL

In view of the above deficiencies of the related art, the present application aims to provide a driving apparatus and a driving system, which aims to solve the problem that the Micro LED chip cannot be detected quickly and simply to identify a bad Micro LED chip in the related art.

A drive device, comprising: the device comprises a power supply module, a signal generation module, a level conversion module and a data source module; the power module is respectively connected with the level conversion module and the data source module, the signal generation module is connected with the level conversion module, and the power module, the level conversion module and the data source module are also used for being connected with the display panel; the power module is used for providing voltage for the level conversion module, the data source module and the display panel, the data source module is used for sending a data source to the display panel, the signal generation module is used for generating a digital signal for driving the display panel and sending the digital signal to the level conversion module, and the level conversion module is used for converting the digital signal into a level signal and sending the level signal to the display panel.

Above-mentioned drive arrangement, the digital signal of the Micro LED chip in the drive display panel is directly generated through signal generation module, then turn into level signal transmission by level conversion module with digital signal and give display panel, the Micro LED chip binding in display panel has been avoided at drive IC, and then the step of screening the Micro LED chip is driven by drive IC, the effect of drive arrangement direct drive and lightening Micro LED chip has been reached, and then detect out bad Micro LED chip fast, the detection efficiency of Micro LED chip has been promoted.

Optionally, the signal generation module comprises a field programmable gate array chip; the field programmable gate array chip is used for generating digital signals for driving a GOA circuit and/or an EOA circuit in the display panel.

When the signal generation module is a field programmable gate array chip, digital signals in the display panel are generated and driven through programming of the field programmable gate array chip, the digital signals can be flexibly converted according to different GOA and/or EOA circuits, and then the time sequence part of each signal can be flexibly controlled to verify the luminous efficiency of a back panel circuit and an internal Micro LED of the display panel, so that the flexibility is high; meanwhile, as the number of universal pins of the FPGA chip is large, the effect of driving a plurality of display panels can be achieved.

Optionally, the power module comprises: the voltage regulator comprises a VGH voltage circuit, a VGL voltage circuit, an ELVDD voltage circuit, an ELVSS voltage circuit and an AVDD voltage circuit; the VGH voltage circuit and the VGL voltage circuit are respectively connected with the level conversion module, the ELVDD voltage circuit and the ELVSS voltage circuit are respectively connected with the display panel, and the AVDD voltage circuit is connected with the data source module.

Optionally, the level shift module includes a shift circuit and a power circuit, and an input terminal of the shift circuit is connected to an output terminal of the field programmable gate array chip; the output end of the conversion circuit is used for being connected with the display panel; the power supply circuit is respectively connected with the VGH voltage circuit and the VGL voltage circuit; the conversion circuit is used for raising a high level signal in the digital signals output by the field programmable gate array chip to the VGH voltage, lowering a low level signal in the digital signals to the VGL voltage to obtain the level signal, and sending the level signal to the display panel.

Optionally, the time sequence of the level signal obtained by the level conversion module corresponds to the time sequence of the digital signal one to one.

Optionally, the driving device further comprises: the universal meter is connected between the power supply module and the level conversion module in series and used for testing the VGH voltage and the VGL voltage provided by the power supply module to the level conversion module.

Optionally, the output range of the VGH voltage is 7V to 20V; the voltage output range of the VGL is-16V to-3V.

Optionally, the signal generating module is connected to the power supply module through an enable circuit, and sends an enable signal to the power supply module through the enable circuit.

Further, the present invention also provides a driving system, which comprises a display panel and the driving device of any one of the above embodiments; and the power module, the level conversion module and the data source module of the driving device are all connected with the display panel.

Above-mentioned drive system, directly generate the digital signal of the Micro LED chip in the drive display panel through the signal generation module among the drive arrangement, then turn into level signal transmission for display panel with digital signal by level conversion module, the Micro LED chip binding in display panel has been avoided at drive IC, drive the step of Micro LED chip and then screening Micro LED chip by drive IC, the effect of drive arrangement direct drive and lighting Micro LED chip has been reached, and then can short-term test go out bad Micro LED chip, the detection efficiency of Micro LED chip has been promoted.

Optionally, the display panel comprises a Micro LED chip unit; the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip and a blue light Micro LED chip; or the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip, a blue light Micro LED chip and a yellow light Micro LED chip.

Drawings

Fig. 1 is a schematic diagram of a basic structure of a driving device according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a basic structure of a driving device connected to a display panel according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a basic circuit structure of a driving device according to another alternative embodiment of the present invention;

description of reference numerals:

the device comprises a power supply module 1, a signal generation module 2, a level conversion module 3, a data source module 4 and a display panel 5.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.

The embodiment of the utility model provides a

An embodiment of the present invention provides a driving device, as shown in fig. 1 and fig. 2, including but not limited to: the device comprises a power module 1, a signal generation module 2, a level conversion module 3 and a data source module 4; the power module 1 is connected to the level conversion module 3 and the data source module 4, the signal generation module 2 is connected to the level conversion module 3, and the power module 1, the level conversion module 3 and the data source module 4 are further used for connecting the display panel 5; the power module 1 is used for providing voltage for the level conversion module 3, the data source module 4 and the display panel 5, the data source module 4 is used for sending control voltage to the display panel 5, the signal generation module 2 is used for generating a time sequence signal and sending the time sequence signal to the level conversion module 3, and the level conversion module 3 is used for converting the time sequence signal into a level signal and sending the level signal to the display panel 5.

The drive arrangement that this embodiment provided, the digital signal of the Micro LED chip in the drive display panel 5 is directly generated through signal generation module 2, then turn into level signal by level conversion module 3 and send for display panel 5, the Micro LED chip binding in display panel 5 has been avoided at drive IC, drive the step of Micro LED chip and then screening Micro LED chip by drive IC, the effect that drive arrangement directly lighted Micro LED chip has been reached, and then the bad Micro LED chip of short-term test, the detection efficiency of Micro LED chip has been promoted.

It should be understood that, where the data source module 4 is used for sending a data source to the display panel 5, in particular, the data source module 4 may be a programmable gamma buffer (P-gamma), and the P-gamma provides an 8-bit RGB data source required by the Micro LED chip for displaying.

It should be understood that the display panel 5 is driven by a Gate Driver On Array (GOA) technology and/or an Emission D-IC On Array (EOA) technology of the display panel 5 to implement progressive scanning, wherein the GOA technology is to fabricate a Gate scan driving circuit On a Thin Film Transistor (Thin Film Transistor, TFT) liquid crystal display Array process On the Thin Film Transistor Array substrate to implement a driving method of progressive scanning, which has the advantages of reducing production cost and implementing a narrow frame design of the panel and is used for various displays.

In some examples of this embodiment, the signal generation module 2 comprises a field programmable gate array chip (FPGA chip); the field programmable gate array chip is configured to generate a timing signal for driving the GOA circuit and/or the EOA circuit in the display panel 5, where the type of the FPGA is not limited, for example, an Altera FPGA may be used; generating a digital signal which drives the GOA circuit and/or the EOA circuit and meets the time sequence through an FPGA chip; it should be understood that the digital signals driving the GOA circuit and/or the EOA circuit include at least one of the following signals: a GSTV signal, a GCK signal, a GCB signal, an ESTV signal, an ECK signal, an ECB signal, and a SW signal; it should be understood that the digital signals in the display panel 5 are generated and driven by programming the FPGA chip, and can be flexibly converted according to different GOAs and/or EOAs circuits, so that the timing sequence part of each signal can be flexibly controlled to verify the luminous efficiency of the backplane circuit and the internal Micro LEDs of the display panel 5, and the flexibility is high; meanwhile, as the number of universal pins of the FPGA chip is large, the effect of driving a plurality of display panels 5 can be achieved; it should be understood that in some examples, the signal generation module 2 may also be other programmable chips, such as a CPU chip or the like.

In some examples of the present embodiment, the power module 1 includes: the voltage regulator comprises a VGH voltage circuit, a VGL voltage circuit, an ELVDD voltage circuit, an ELVSS voltage circuit and an AVDD voltage circuit; the VGH voltage circuit and the VGL voltage circuit are respectively connected with the level conversion module 3, the ELVDD voltage circuit and the ELVSS voltage circuit are respectively connected with the display panel 5, and the AVDD voltage circuit is connected with the data source module 4; the VGH voltage circuit is used for providing VGH voltage for the level conversion module 3, and the VGL voltage circuit is used for providing VGL voltage for the level conversion module 3; the ELVDD voltage circuit is configured to provide an ELVDD voltage to the display panel 5, and the ELVSS voltage circuit is configured to provide an ELVSS voltage to the display panel 5; the AVDD voltage circuit is used for providing AVDD voltage for the data source module 4; it should be understood that the Power module 1 may be a Power supply having a plurality of output voltage circuits, and then output to the level conversion module 3, the display panel 5, and the data source module 4, for example, a Power Management Integrated Circuit (PMIC); the power module 1 may also be a plurality of power supplies, and voltage circuits of the plurality of power supplies are respectively output to the level conversion module 3, the display panel 5, and the data source module 4. It should be understood that in some examples, the driving device may not provide power to the display panel 5.

In some examples of this embodiment, the level shift module 3 includes a shift circuit and a power circuit, and an input terminal of the shift circuit is connected to an output terminal of the field programmable gate array chip; the output end of the conversion circuit is used for being connected with the display panel; the power supply circuit is respectively connected with the VGH voltage circuit and the VGL voltage circuit; the conversion circuit is used for raising a high level signal in the digital signals output by the field programmable gate array chip to a VGH voltage, lowering a low level signal in the digital signals to a VGL voltage to obtain the level signal, and sending the level signal to the display panel 5; it should be understood that the timing of the level signal converted by the level conversion module corresponds to the timing of the digital signal.

In some examples of the present embodiment, the VGH voltage is a high voltage, with a voltage output range of 7V to 20V; VGL is low voltage, and the voltage output range is-16V to-3V; the voltage output range of the ELVDD is 3V-10V, and the voltage output range of the ELVSS is-3V-10V.

In some examples of this embodiment, the driving device further includes: the universal meter is connected between the power module 1 and the level conversion module 3 in series and used for testing the VGH voltage, the VGL voltage and the current provided by the power module 1 to the level conversion module 3.

In some examples of the embodiment, the signal generating module 2 is connected to the power module 1 through an enable circuit, and sends an enable signal to the power module 1 through the enable circuit, and the power module 1 enables to send out a voltage according to the enable signal, and it should be understood that, in some examples, the signal generating module 2 may send the enable signal to the power module 1 when sending a digital signal for driving the display panel 5.

In some examples of the present embodiment, there is also provided a driving system, as shown in fig. 2, including a display panel and the driving apparatus as described above; and the power module, the level conversion module and the data source module of the driving device are all connected with the display panel.

In some examples of the present embodiment, the display panel 5 includes a Micro LED chip unit; the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip and a blue light Micro LED chip; or the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip, a blue light Micro LED chip and a yellow light Micro LED chip.

In some examples of this embodiment, the driving device is connected to a pressing fixture through a jumper, and the Micro LED chip unit is disposed on the display panel 5 through a needle on the pressing fixture.

Another optional embodiment of the present invention

For better explanation of the driving device provided by the present invention, the present embodiment provides a more specific example to explain the present invention, please refer to fig. 3, the driving device includes but is not limited to: PMIC, FPGA chip, P-gamma, level shift; the PMIC is respectively connected with level shift, P-gamma and the display panel, the FPGA chip is connected with the level shift, and the level shift and the P-gamma are respectively connected with the display panel;

wherein, P-gamma provides the required 8bit RGB data source of Micro LED chip demonstration, and PMIC is five way voltage output power, include but not limited to: the voltage regulator comprises a VGH voltage circuit, a VGL voltage circuit, an ELVDD voltage circuit, an ELVSS voltage circuit and an AVDD voltage circuit; the VGH voltage circuit is used for providing VGH voltage for level shift, and the VGL voltage circuit is used for providing VGL voltage for level shift; the ELVDD voltage circuit is used for providing an ELVDD voltage for the display panel, and the ELVSS voltage circuit is used for providing an ELVSS voltage for the display panel; the AVDD voltage circuit is used for providing AVDD voltage for the P-gamma.

The FPGA chip generates digital signals for driving the GOA circuit and the EOA circuit in the display panel: a GSTV signal, a GCK signal, a GCB signal, an ESTV signal, an ECK signal, an ECB signal, and a SW signal; it should be understood that the digital signals in the driving display panel are generated by programming the FPGA chip, and can be flexibly converted according to different GOAs and/or EOAs circuits, so that the timing sequence part of each signal can be flexibly controlled to verify the luminous efficiency of the backplane circuit and the internal Micro LEDs of the display panel 5, and the flexibility is high; meanwhile, as the number of universal pins of the FPGA chip is large, the effect of driving a plurality of display panels can be achieved;

after receiving a digital signal sent by an FPGA chip, level shift raises a high level in the digital signal to VGH voltage and lowers a low level in the digital signal to VGL voltage to obtain a level signal, and SW signals, GSTV signals, GCK signals, GCB signals, ESTV signals, ECK signals and ECB signals in the level signal are sent to the display panel through corresponding SW interfaces, GSTV interfaces, GCK interfaces, GCB interfaces, ESTV interfaces, ECK interfaces and ECB interfaces; it should be understood that the timing of the level signals corresponds to the timing of the digital signals.

According to the driving device, the signal generation module directly generates the digital signal for driving the Micro LED chip in the display panel, and the level conversion module converts the digital signal into the level signal to send to the display panel, so that the step that the Micro LED chip in the display panel is mounted on the driving IC and the driving IC drives the Micro LED chip to screen the Micro LED chip is avoided, the effect that the driving device directly lights the Micro LED chip is achieved, the bad Micro LED chip is quickly detected, and the detection efficiency of the Micro LED chip is improved; meanwhile, digital signals in the driving display panel are generated by programming of the field programmable gate array chip, and can be flexibly converted according to different GOA and/or EOA circuits, so that the time sequence part of each signal can be flexibly controlled to verify the luminous efficiency of a back panel circuit and an internal Micro LED of the display panel, and the flexibility is high; meanwhile, as the number of universal pins of the FPGA chip is large, the effect of driving a plurality of display panels can be achieved.

The utility model is not limited to the above examples, and those skilled in the art can modify or change the above-mentioned embodiments, and all such modifications and changes should fall within the scope of the appended claims.

Claims

1. A drive device, characterized in that the drive device comprises: the device comprises a power supply module, a signal generation module, a level conversion module and a data source module;

the power supply module is respectively connected with the level conversion module and the data source module, the signal generation module is connected with the level conversion module,

the power supply module, the level conversion module and the data source module are also used for being connected with a display panel;

the power module is used for providing voltage for the level conversion module, the data source module and the display panel, the data source module is used for sending a data source to the display panel, the signal generation module is used for generating a digital signal for driving the display panel and sending the digital signal to the level conversion module, and the level conversion module is used for converting the digital signal into a level signal and sending the level signal to the display panel.

2. The driving apparatus of claim 1, wherein the signal generation module comprises a field programmable gate array chip;

the field programmable gate array chip is used for generating digital signals for driving a GOA circuit and/or an EOA circuit in the display panel.

3. The drive of claim 2, wherein the power module comprises: the voltage regulator comprises a VGH voltage circuit, a VGL voltage circuit, an ELVDD voltage circuit, an ELVSS voltage circuit and an AVDD voltage circuit;

the VGH voltage circuit and the VGL voltage circuit are respectively connected with the level conversion module, the ELVDD voltage circuit and the ELVSS voltage circuit are respectively connected with the display panel, and the AVDD voltage circuit is connected with the data source module.

4. The driving apparatus as claimed in claim 3, wherein the level shift module comprises a shift circuit and a power circuit, an input terminal of the shift circuit is connected to an output terminal of the FPGA chip; the output end of the conversion circuit is used for being connected with the display panel; the power supply circuit is respectively connected with the VGH voltage circuit and the VGL voltage circuit; the conversion circuit is used for raising a high level signal in the digital signals output by the field programmable gate array chip to the VGH voltage, lowering a low level signal in the digital signals to the VGL voltage to obtain the level signal, and sending the level signal to the display panel.

5. The driving apparatus as claimed in claim 4, wherein the timings of the level signals converted by the level conversion module correspond to the timings of the digital signals one to one.

6. The drive of claim 4, further comprising: the universal meter is connected between the power supply module and the level conversion module in series and used for testing the VGH voltage and the VGL voltage provided by the power supply module to the level conversion module.

7. The driving apparatus as claimed in claim 6, wherein the VGH voltage output range is 7V to 20V; the voltage output range of the VGL is-16V to-3V.

8. The driving apparatus as claimed in any one of claims 1 to 7, wherein the signal generation module is connected to the power supply module through an enable circuit, and transmits an enable signal to the power supply module through the enable circuit.

9. A driving system comprising a display panel and the driving apparatus according to any one of claims 1 to 8; and the power module, the level conversion module and the data source module of the driving device are all connected with the display panel.

10. The driving system of claim 9, wherein the display panel comprises Micro LED chip units;

the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip and a blue light Micro LED chip; or the Micro LED chip unit comprises a red light Micro LED chip, a green light Micro LED chip, a blue light Micro LED chip and a yellow light Micro LED chip.