CN214707268U

CN214707268U - Equalizing charge system auxiliary power supply based on SPWM

Info

Publication number: CN214707268U
Application number: CN202120815908.3U
Authority: CN
Inventors: 陈曦; 何志杰; 管立伟
Original assignee: Fujian Normal University
Current assignee: Fujian Normal University
Priority date: 2021-04-21
Filing date: 2021-04-21
Publication date: 2021-11-12
Anticipated expiration: 2031-04-21

Abstract

The utility model discloses an equalizing charge system auxiliary power supply based on SPWM, which comprises a power input unit, a drive circuit, a sampling unit, a processor unit and an output unit; the power input unit provides input power; the sampling unit is electrically connected with the output unit and is used for collecting the voltage and the current output by the output unit; the output end of the sampling unit is electrically connected with the input end of the processor unit, the sampling unit transmits the acquired voltage and current information to the processor unit, and the processor unit adjusts the output SPWM waveform according to the voltage and current information; the output end of the processor unit is electrically connected with the input end of the driving circuit, and the processor unit outputs one SPWM signal and one PWM signal to the driving circuit; the driving circuit converts one path of SPWM signal and one path of PWM signal into two groups of SPWM waveforms with 4 paths of waveforms and dead zones so as to control the on-off of the switching tube circuit and further control the voltage and the current of the output unit.

Description

Equalizing charge system auxiliary power supply based on SPWM

Technical Field

The utility model relates to a power battery organizes equalizing charge technical field, especially relates to an equalizing charge system auxiliary power supply based on SPWM.

Background

The lithium ion battery has the advantages of large specific energy, small volume, no pollution and the like, and is widely applied to a plurality of important industries such as electric automobiles, mobile equipment, emergency power supplies and the like. In order to reduce the imbalance among the single batteries, the battery pack needs to be charged in a balanced manner in the charging process. And an auxiliary power supply is needed in the equalizing charge system, so that the conversion of voltage and current is realized. At present, an auxiliary power supply mostly uses a full-bridge inverter circuit and is realized by common Pulse Width Modulation (PWM) drive, the scheme has large harmonic wave, the impact on a switching element is large, the stability of an output drive signal is poor, and the service life and the system efficiency are influenced.

Disclosure of Invention

The utility model aims at providing an equalizing charge system auxiliary power supply based on SPWM, which improves the stability of the driving signal; reduce the harmonic wave when switching, improve the circuit life-span.

The utility model adopts the technical proposal that:

an auxiliary power supply of an equalizing charge system based on SPWM comprises a power supply input unit, a driving circuit, a sampling unit, a processor unit and an output unit; the power input unit provides input power; the sampling unit is electrically connected with the output unit and is used for collecting the voltage and the current output by the output unit; the output end of the sampling unit is electrically connected with the input end of the processor unit, the sampling unit transmits the acquired voltage and current information to the processor unit, and the processor unit adjusts the output SPWM waveform according to the voltage and current information; the output end of the processor unit is electrically connected with the input end of the driving circuit, and the processor unit outputs one SPWM signal and one PWM signal to the driving circuit; the driving circuit converts one path of SPWM signal and one path of PWM signal into two groups of SPWM waveforms with 4 paths of waveforms and dead zones so as to control the on-off of the switching tube circuit and further control the voltage and the current of the output unit.

Further, as a preferred embodiment, the switching transistor of the driving circuit is preferably a MOS transistor.

Further, as a preferred embodiment, the driving circuit can generate four paths of SPWM waveform driving signals with dead zones by adjusting the SPWM signal and PWM signal parameters of the processor unit.

Further, as a preferred embodiment, the output circuit comprises a rectifier diode, a filter inductor, a filter capacitor and a current sampling sensor.

Further, as a preferred embodiment, in order to reduce the thermal loss and improve the electromagnetic compatibility of the laser power source, the utility model discloses set up switching frequency between 30KHz to 80KHz

Further, as a preferred embodiment, the processor unit is programmed by an internal program to output the SPWM waveform, and the dead time, the frequency and the duty cycle of the SPWM waveform are adjustable.

Further, as a preferred implementation mode, the processor unit adopts an STM32 chip, and realizes the output of an SPWM and a PWM through programming, the dead time and frequency, and the software control.

Further, as a preferred embodiment, the driving circuit includes a circuit diagram generated by four SPWM circuits, and the SPWM generating circuit includes a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C12, a resistor R6, a resistor R7, a resistor R11, a resistor R12, a gate chip P4, a gate chip P5, a gate chip P8, a signal input terminal Pin, and a 4-way SPWM output terminal P1;

the signal input terminal Pin is used for receiving one SPWM signal and one PWM signal generated by the processor unit, Pin 1 of the signal input terminal Pin is connected with Pin 1 and Pin 12 of the gate circuit chip P4, and Pin 2 of the signal input terminal Pin is connected with Pin 2 of the gate circuit chip P4 and Pin 1 of the gate circuit chip P8;

pin 3 of the gate chip P4 is connected with pin 3 of the gate chip P8, pin 4 of the gate chip P5 and resistor R11,

pins

4, 5, 6, 8, 9 and 10 of the gate chip P4 are suspended, pin 11 of the gate chip P4 is connected with pin 11 of the gate chip P8, pin 10 of the gate chip P5 and resistor R12, and pin 13 of the gate chip P4 is connected with pin 2 of the gate chip P8;

pin 4 of the gate chip P8 is connected with pin 1 of the gate chip P5 and resistor R6, pin 10 of the gate chip P8 is connected with pin 13 of the gate chip P5 and resistor R7, and

pins

5, 6, 8, 9, 12 and 13 of the gate chip P8 are suspended;

pin 2 of the gate chip P5 is connected to the capacitor C6 and the resistor R6. Pin 3 of the gate chip P5 is connected to pin 6 of the output terminal P1, and pin 5 of the gate chip P5 is connected to the capacitor C11 and the resistor R11; pin 6 of the gate chip P5 is connected to pin 8 of the output terminal P1;

pin 9 of the gate chip P5 is connected to the capacitor C12 and the resistor R12, pin 8 of the gate chip P5 is connected to pin 4 of the output terminal P1, pin 12 of the gate chip P5 is connected to the capacitor C7 and the resistor R7, and pin 11 of the gate chip P5 is connected to pin 2 of the output terminal P1.

Further, as a preferred embodiment, the output unit includes a rectification circuit, a filter inductor, a filter capacitor, and a current sampling sensor; one output end of the rectifying circuit is connected with the positive electrode of the power supply output through the filter inductor; the other output end of the rectifying circuit is connected with the anode of the standby power supply through a filter capacitor; the filter capacitor is electrically connected between the anode and the cathode of the power output, the anode of the filter capacitor is connected with the anode of the power output, and the cathode of the filter capacitor is connected with the cathode of the power output; the current sampling sensor is connected in series in the output loop. The rectified output is connected to the output terminal after passing through the filter inductor and the filter capacitor, so that the stability of the output voltage is improved, and the fluctuation of the voltage and the current is small.

Further, as a preferred embodiment, the rectifier circuit is a bridge rectifier circuit, and the number of filter capacitors is two or more.

The utility model adopts the above technical scheme, for traditional pulse width modulation driven auxiliary power supply, the utility model provides an equalizing charge system auxiliary power supply based on SPWM through SPWM signal all the way and PWM signal all the way of treater unit output, drive circuit will be SPWM signal all the way and PWM signal all the way convert into two sets of SPWM wave form altogether 4 wave form bands dead areas SPWM wave forms all the way. The four paths of SPWM waveform driving signals with dead zones can be generated by adjusting the SPWM signals and PWM signal parameters of the processor unit, so that the switching-on and switching-on time of the switching tube is controlled by the SPWM, and the size and the direction of current are adjusted. The utility model discloses a current harmonic is little, and the impact that switching element received is little, and calorific capacity is few. The utility model provides an auxiliary power supply, topological structure is simple, adopts the SPWM technique, and the output is stable, and power is efficient.

Drawings

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments;

fig. 1 is a schematic structural diagram of an auxiliary power supply of an equalizing charge system based on SPWM provided by the present invention;

fig. 2 is a circuit diagram generated by four paths of SPWM in the driving circuit provided by the embodiment of the present invention;

fig. 3 is a schematic structural diagram of a driving circuit provided in an embodiment of the present invention;

fig. 4 is a circuit diagram of an output unit according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

As shown in fig. 1, the utility model discloses an equalizing charge system auxiliary power supply based on SPWM, it includes: the device comprises a power input unit, a driving circuit, a sampling unit, a processor unit and an output unit; the power input unit provides input power; the sampling unit is electrically connected with the output unit and is used for collecting the voltage and the current output by the output unit; the output end of the sampling unit is electrically connected with the input end of the processor unit, the sampling unit transmits the acquired voltage and current information to the processor unit, and the processor unit adjusts the output SPWM waveform according to the voltage and current information; the output end of the processor unit is electrically connected with the input end of the driving circuit, and the processor unit outputs one SPWM signal and one PWM signal to the driving circuit; the driving circuit converts one path of SPWM signal and one path of PWM signal into two groups of SPWM waveforms with 4 paths of waveforms and dead zones, and the two groups of SPWM waveforms are output through the output unit to control the on-off of the switching tube circuit.

Further, as a preferred embodiment, the driving circuit includes a circuit diagram generated by four paths of SPWM.

The following is a specific embodiment provided by the present invention.

An auxiliary power supply flow schematic diagram of an equalizing charge system based on SPWM comprises: the device comprises a power input unit, a driving circuit, a sampling unit, a processor unit and an output unit.

Fig. 2 is a circuit diagram of four SPWM generation circuits in the driving circuit provided in the present embodiment, and as shown in fig. 2, the SPWM generation circuit includes a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C12, a resistor R6, a resistor R7, a resistor R11, a resistor R12, a gate chip P4, a gate chip P5, a gate chip P8, a signal input terminal Pin, and 4 SPWM output terminals P1.

The signal input terminal Pin is used for receiving one SPWM signal and one PWM signal generated by the processor unit. Pin 1 of the signal input terminal Pin is connected to Pin 1 and Pin 12 of the gate chip P4. Pin 2 of the signal input terminal Pin is connected to Pin 2 of the gate chip P4 and Pin 1 of the gate chip P8.

Pin 3 of the gate chip P4 is connected to pin 3 of the gate chip P8, pin 4 of the gate chip P5, and the resistor R11.

Pins

4, 5, 6, 8, 9, 10 of gate chip P4 are floating. The pin 11 of the gate chip P4 is connected to the pin 11 of the gate chip P8, the pin 10 of the gate chip P5, and the resistor R12. Pin 13 of gate chip P4 is connected to pin 2 of gate chip P8.

Pin 4 of the gate chip P8 is connected to pin 1 of the gate chip P5 and the resistor R6. The pin 10 of the gate chip P8 is connected to the pin 13 of the gate chip P5 and the resistor R7.

Pins

5, 6, 8, 9, 12, 13 of gate chip P8 are floating.

Pin 2 of the gate chip P5 is connected to the capacitor C6 and the resistor R6. Pin 3 of the gate chip P5 is connected to pin 6 of the output terminal P1. Pin 5 of the gate chip P5 is connected to the capacitor C11 and the resistor R11. Pin 6 of the gate chip P5 is connected to pin 8 of the output terminal P1.

The pin 9 of the gate chip P5 is connected to the capacitor C12 and the resistor R12. Pin 8 of the gate chip P5 is connected to pin 4 of the output terminal P1. The pin 12 of the gate chip P5 is connected to the capacitor C7 and the resistor R7. Pin 11 of the gate chip P5 is connected to pin 2 of the output terminal P1.

The driving circuit and the processor unit work cooperatively to realize the output of four paths of SPWM, and the dead time and frequency are adjustable.

When Pin 2 of the signal input terminal Pin is at a high level, Pin 2 of P8 outputs a low level; since pin 1 and pin 12 inputs of P4 are the same, pin 2 and pin 13 inputs of P4 are opposite; the output of pin 3 of P4 is thus the opposite of the output of pin 11 of P4. Since the P4 pin 11 is connected to the P8 pin 11, the output of the P8 pin 10 is opposite to the output of the P4 pin 11, and the P5 pin 11 and the output of the pin 8 are mutually exclusive and are used to control the on and off of a set of switching transistors. Similarly, the output of the P5 pin 3 and pin 6 is used to control the on and off of another set of switching tubes.

Fig. 3 is a schematic structural diagram of a driving circuit provided in an embodiment of the present invention, and as shown in fig. 3, the isolation chip SP1, the isolation chip SP2, the isolation chip SP3, and the isolation chip SP4 are respectively connected to the switch tube 1, the switch tube 2, the switch tube 3, and the switch tube 4 to control on/off of the switch tube; the inputs of the isolated chip SP1, the isolated chip SP2, the isolated chip SP3 and the isolated chip SP4 are provided by the outputs of the four-way SPWM generation circuit. Four SPWM signals control the conduction time sequences of the switch tube 1, the switch tube 2, the switch tube 3 and the switch tube 4; when the switch tube 1 and the switch tube 4 are conducted, the switch tube 2 and the switch tube 3 are cut off; when the switch tube 1 and the switch tube 4 are cut off, the switch tube 2 and the switch tube 3 are not immediately conducted, and are conducted after a set dead time; similarly, after the switching tube 2 and the switching tube 3 are cut off, the switching tube 1 and the switching tube 4 are conducted after dead time; and the current transformation of the transformer is realized through the conduction transformation of the switching tube.

Fig. 4 is a circuit diagram of the output unit provided in this embodiment, and as shown in fig. 4, the output unit includes a rectifying circuit, a filter inductor, a filter capacitor, and a current sampling sensor. One output end of the rectifying circuit is connected with the positive electrode of the power supply output through the filter inductor; the other output end of the rectifying circuit is connected with the anode of the standby power supply through a filter capacitor; (ii) a The current sampling sensor is connected in series in the output loop. The positive pole of filter capacitor all connects the positive pole of power output, and the negative pole of capacitor all connects the negative pole of power output. The rectified output is connected to the output terminal after passing through the filter inductor and the filter capacitor, so that the stability of the output voltage is improved, and the fluctuation of the voltage and the current is small.

It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. The embodiments and features of the embodiments in the present application may be combined with each other without conflict. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the detailed description of the embodiments of the present application is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Claims

1. The utility model provides an equalizing charge system auxiliary power supply based on SPWM which characterized in that: the device comprises a power input unit, a driving circuit, a sampling unit, a processor unit and an output unit; the power input unit provides input power; the sampling unit is electrically connected with the output unit and is used for collecting the voltage and the current output by the output unit; the output end of the sampling unit is electrically connected with the input end of the processor unit, the sampling unit transmits the acquired voltage and current information to the processor unit, and the processor unit adjusts the output SPWM waveform according to the voltage and current information; the output end of the processor unit is electrically connected with the input end of the driving circuit, and the processor unit outputs one SPWM signal and one PWM signal to the driving circuit; the driving circuit converts one path of SPWM signal and one path of PWM signal into two groups of SPWM waveforms with 4 paths of waveforms and dead zones so as to control the on-off of the switching tube circuit and further control the voltage and the current of the output unit.

2. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 1, wherein: the output circuit comprises a rectifier diode, a filter inductor, a filter capacitor and a current sampling sensor.

3. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 1, wherein: the driving circuit generates four paths of SPWM waveform driving signals with dead zones by adjusting the SPWM signals and PWM signal parameters of the processor unit.

4. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 3, wherein: the switch tube of the drive circuit is an MOS tube.

5. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 4, wherein: the switching frequency of the switching tube is set between 30KHz and 80 KHz.

6. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 1, wherein: the driving circuit comprises four SPWM generating circuits, wherein each SPWM generating circuit comprises a capacitor C6, a capacitor C7, a capacitor C11, a capacitor C12, a resistor R6, a resistor R7, a resistor R11, a resistor R12, a gate circuit chip P4, a gate circuit chip P5, a gate circuit chip P8, a signal input terminal Pin and 4 SPWM output terminals P1;

pin 3 of the gate chip P4 is connected with pin 3 of the gate chip P8, pin 4 of the gate chip P5 and resistor R11, pins 4, 5, 6, 8, 9 and 10 of the gate chip P4 are suspended, pin 11 of the gate chip P4 is connected with pin 11 of the gate chip P8, pin 10 of the gate chip P5 and resistor R12, and pin 13 of the gate chip P4 is connected with pin 2 of the gate chip P8;

pin 4 of the gate chip P8 is connected with pin 1 of the gate chip P5 and resistor R6, pin 10 of the gate chip P8 is connected with pin 13 of the gate chip P5 and resistor R7, and pins 5, 6, 8, 9, 12 and 13 of the gate chip P8 are suspended;

pin 2 of the gate chip P5 is connected to the capacitor C6 and the resistor R6, pin 3 of the gate chip P5 is connected to pin 6 of the output terminal P1, and pin 5 of the gate chip P5 is connected to the capacitor C11 and the resistor R11; pin 6 of the gate chip P5 is connected to pin 8 of the output terminal P1;

7. The SPWM-based auxiliary power supply for an equalizing charge system as recited in claim 1, wherein: the output unit comprises a rectifying circuit, a filter inductor, a filter capacitor and a current sampling sensor; one output end of the rectifying circuit is connected with the positive electrode of the power supply output through the filter inductor; the other output end of the rectifying circuit is connected with the negative electrode of the power supply output through a filter capacitor; the filter capacitor is electrically connected between the anode and the cathode of the power output, the anode of the filter capacitor is connected with the anode of the power output, and the cathode of the filter capacitor is connected with the cathode of the power output; the current sampling sensor is connected in series in the output loop.

8. The SPWM-based auxiliary power supply for an equalizing charge system of claim 7, wherein: the rectifier circuit is a bridge rectifier circuit, and the number of the filter capacitors is more than two.