CN214704082U

CN214704082U - Ultra-compact power beam splitter with arbitrary direction and channel

Info

Publication number: CN214704082U
Application number: CN202120998231.1U
Authority: CN
Inventors: 徐艳红; 杨俊波; 张振荣; 马汉斯; 谢桐; 罗鸣宇
Original assignee: National University of Defense Technology
Current assignee: National University of Defense Technology
Priority date: 2021-05-11
Filing date: 2021-05-11
Publication date: 2021-11-12
Anticipated expiration: 2031-05-11

Abstract

The application relates to an ultra-compact power splitter with any direction and channel. The power beam splitter comprises a plurality of output ports of the sub-power beam splitters which are connected, so that the combination of any direction and any channel is realized; the sub-power beam splitter comprises a silicon substrate, a silicon dioxide layer and a silicon layer; the silicon dioxide layer covers the silicon substrate, and the silicon layer is attached to the silicon dioxide layer; the sub-power splitter comprises three output ports; the silicon layer is divided into a plurality of pixel points, and the states of the pixel points comprise etching states or non-etching states. The power beam splitter can realize output in any direction and any channel.

Description

Ultra-compact power beam splitter with arbitrary direction and channel

Technical Field

The application relates to the technical field of power devices, in particular to an ultra-compact power beam splitter with any direction and channel.

Background

With the rapid development of information, in order to meet the speed and bandwidth requirements of mass information storage, rapid information transmission and ultra-high speed information processing, it is a necessary trend of technical development that optical interconnection replaces electrical interconnection. Power splitters are an integral part of optical interconnects and optical communication systems, attracting the attention of a number of researchers. The power divider is a device which divides one path of input signal energy into multiple paths of output equal or unequal energy and plays an important role in multifunctional application and combined application of the nano-photonic device.

In some conventional design methods, although there are good results, the parameters are manually adjusted, depending on the experience and intuition of the designer. Meanwhile, the size of the designed device is large, and the device is not convenient enough in practical application and is not beneficial to high-density integration of chips. Recently, methods for implementing reverse design using algorithms have been developed, which greatly improve design efficiency and effect and reduce the size of the device. However, due to the limitation of the number of output ports, some number of output ports cannot be reached by only the 1 × 2 power splitter.

SUMMERY OF THE UTILITY MODEL

In view of the above, there is a need to provide an ultra-compact power splitter capable of solving the output channel and the arbitrary direction and channel of the output direction limitation.

An ultra-compact power beam splitter with any direction and channel is provided, wherein the power beam splitter comprises a plurality of output ports of sub-power beam splitters which are connected, so that the combination of any direction and channel is realized;

the sub-power beam splitter comprises a silicon substrate, a silicon dioxide layer and a silicon layer; the silicon dioxide layer covers the silicon substrate, and the silicon layer is attached to the silicon dioxide layer; the sub-power splitter comprises three output ports;

the silicon layer is divided into a plurality of pixel points, and the states of the pixel points comprise etching states or non-etching states; the state of the pixel is determined by a binary search algorithm.

In one embodiment, the sub power splitter includes: three right output waveguide power splitters, one left output waveguide and two downward output waveguide power splitters, one right output waveguide, one left output waveguide and one downward output waveguide power splitter.

In one embodiment, the sub-power splitter is further connected to a uniform output power splitter, so as to obtain a combined power splitter.

In one embodiment, the silicon dioxide is 3 μm thick and the silicon layer has an area of 2.4 μm x 2.4.4 μm.

In one embodiment, the number of the pixel points is 20 × 20, and each pixel point is a square with a side length of 120 nm.

In one embodiment, the pixel points in the etching state are round holes with the diameter of 90nm and the depth of 220 nm.

The design method adopts a binary search algorithm, and designs on pixel points directly, thereby greatly reducing the equipment size, facilitating the integrated design of a photonic chip, and more comprehensively applying the device and the combined design concept in the multifunctional application and the combined application of a nano photonic device.

Drawings

FIG. 1 is a diagram of the results of RRRPS optimization in one embodiment; wherein, (a) the initial silicon wafer before design optimization, (b) the final optimized structure, (c) is the IL for each port of the RRRPS, (d) is the final simulated light field distribution;

FIG. 2 is a diagram illustrating simulation results of LLDDPS and LDDPS in one embodiment; (a) - (c) top view, light field distribution and IL of each port of LLDDPS, respectively, (d) - (f) top view, light field distribution and IL of each port of LDDPS, respectively;

FIG. 3 is a diagram illustrating optimization of a LRDPS according to one embodiment; (a) designing an initial silicon wafer before optimization, (b) a final optimized structure;

FIG. 4 is a graph of simulation results for a 1 × 6 power splitter in one embodiment; (a) - (c) are the top view of each output port, the light field distribution and IL, respectively.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

In one embodiment, an ultra-compact power splitter with any direction and channel is provided, wherein the power splitter comprises a plurality of output ports of sub-power splitters which are connected, so that the combination of any direction and channel is realized; it should be noted that the output port connections of the multiple sub-power splitters may be connected, or may be combined with the current 1x2 power splitter with stable output, so as to implement combination of any direction and channel, and again, is not limited specifically.

The sub-power beam splitter comprises a silicon substrate, a silicon dioxide layer and a silicon layer; the silicon dioxide layer covers the silicon substrate, and the silicon layer is attached to the silicon dioxide layer; the sub-power splitter comprises three output ports; the sub-power beam splitter is designed based On a Silicon-On-Insulator (SOI) platform.

In one embodiment, the step of the binary search algorithm comprises:

randomly setting the state of the pixel points; the etching state represents 0, and the non-etching state represents 1; setting a quality factor function according to the transmissivity of the three output ports; and changing the state of each pixel point one by one, if the output value of the quality factor function is increased, keeping the state of the pixel point, otherwise, setting the state as an original value until the quality factor function is maximum, and determining the state of the pixel point.

Specifically, no etching indicates that silicon remains, and etching is indicated as air.

In one embodiment, the output of the three output ports is balanced according to the root mean square error of the three output ports, and the first quality factor component is obtained as follows:

wherein, t₁，t₂，t₃Respectively representing the transmissivity of three output ports, n is the number of input wavelengths, and R represents a first quality factor component;

according to the relation of the transmissivity of the three output ports, a second quality factor component is obtained as follows:

T＝(t_1min+t_2min+t_3min)-(|t_1min-t_2min|+|t_1min-t_3min|+|t_2min-t_3min|)

wherein, t_1min，t_2min，t_3minRespectively, the minimum value of the transmittance of the three output ports at all wavelengths, and T represents a second quality factor component;

obtaining a figure of merit function from the first figure of merit component and the second figure of merit component as:

wherein FOM represents a figure of merit function, and α, β, and γ represent weights, respectively.

Specifically, in the quality factor function, the value of the function T needs to be increased, that is, the transmittance of the output needs to be increased, and the value of R needs to be decreased, so as to achieve the purpose of balancing the outputs of the three ports as much as possible. In an ideal case, the value of FOM should be 1. When the FOM is no longer elevated, the iteration stops. Meanwhile, IL is set to represent the insertion loss of each output waveguide:

in one embodiment, the sub power splitter comprises: three right output waveguide power splitters, one left output waveguide and two downward output waveguide power splitters, one right output waveguide, one left output waveguide and one downward output waveguide power splitter.

As will be explained in more detail below, with three right output waveguides (RRRPS), the specific initial and final optimized configurations are shown in fig. 1 (a) - (b). The insertion loss for each port of the RRRPS is shown in fig. 1 (c). It can be seen that the insertion loss per port is less than 5.55dB over the wavelength range 1530nm-1560 nm. As can be seen from the optical field distribution of the RRRPS in fig. 1 (d), the device has achieved the effect of power splitting.

The second 1x 3 power splitter has one output waveguide to the left and two output waveguides down (LDDPS). In addition, another device (LLDDPS) is shown which has the same functionality, but is larger in size. In the DBS algorithm, the round holes function as: light is input from an input waveguide, and in a multimode waveguide, a circular aperture may be used to affect the refractive index, thereby adjusting the optical field. Larger footprint pixels are also increased and the ability to control the distribution of pixels is also increased. Therefore, increasing memory usage will improve the final performance. Therefore, if space usage is considered, LDDPS should be used because it is almost the smallest 1 × 3 power divider. If performance is considered, LLDDPS should be chosen because their IL is low. In practical application, different selections can be performed according to different requirements. The optimized configurations of the last two devices are shown in fig. 2 (a) and fig. 2 (d). The resulting light field distributions of the two devices are shown in fig. 2 (c) and (f), respectively. The resulting insertion losses of the two devices are shown in fig. 2 (b) and (e), respectively. The final insertion loss of the LDDPS is less than 5.49 dB. The final insertion loss of LLDDPS is less than 5.40 dB. It can be seen that the final performance is different, and therefore, it is necessary to select a smaller size or better performance by practical application.

The third 1x 3 power splitter has a right output waveguide, a left output waveguide and a down output waveguide (LRDPS). The specific initial structure and the final optimized structure are shown in fig. 3 (a) - (b). Fig. 3 (c) shows the insertion loss of each port of the LRDPS. It can be seen that the insertion loss per port is less than 5.55dB over the wavelength range 1530nm-1560 nm. As can be seen from the optical field distribution of the LRDPS in fig. 3 (d), the device has achieved the effect of power distribution.

In one embodiment, the sub-power splitter is further connected to the uniform output power splitter, resulting in a combined power splitter.

Specifically, after the optimization of the 1 × 3 power dividers in different output directions is completed, the power dividers can be combined according to actual needs. When combining the design with an optimized 1x2 power divider, a power divider for any channel can be implemented. There is a 1x 6 power splitter presented here because of the many combinations. The signed 1x2 power divider and RRRPS are simply combined first and then the simulation is further optimized. Fig. 4 (a) is an optimized structure, and also shows the light field distribution in fig. 4 (b). As shown in fig. 4 (c), the IL per port is less than 8.82dB and the uniformity is very large. Further optimization procedures provide an effective way to improve the performance of the assembled device.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the utility model. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. The ultra-compact power beam splitter with any direction and channel is characterized in that the power beam splitter comprises a plurality of output ports of sub-power beam splitters which are connected;

the silicon layer is divided into a plurality of etching state pixel points or non-etching state pixel points.

2. The ultra-compact power splitter of any direction and channel of claim 1, wherein the sub-power splitter comprises: three right output waveguide power splitters, one left output waveguide and two downward output waveguide power splitters, one right output waveguide, one left output waveguide and one downward output waveguide power splitter.

3. The ultra-compact power splitter of any direction and channel as claimed in claim 2 wherein the sub-power splitters are further connected to a uniform output power splitter to obtain a combined power splitter.

4. The ultra-compact power splitter of any arbitrary direction and channel as claimed in claim 1 wherein the thickness of the silicon dioxide is 3 μm and the area of the silicon layer is 2.4 μm x 2.4.4 μm.

5. The ultra-compact power splitter with arbitrary direction and channel as claimed in claim 4, wherein the number of the pixel points is 20x20, and each pixel point is a square with a side length of 120 nm.

6. The ultra-compact power splitter in any direction and channel according to claim 5, wherein the pixel points in the etched state are circular holes with a diameter of 90nm and a depth of 220 nm.