CN214505383U - Relay control circuit, lighting switch control module and lighting control system - Google Patents

Relay control circuit, lighting switch control module and lighting control system Download PDF

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CN214505383U
CN214505383U CN202120914835.3U CN202120914835U CN214505383U CN 214505383 U CN214505383 U CN 214505383U CN 202120914835 U CN202120914835 U CN 202120914835U CN 214505383 U CN214505383 U CN 214505383U
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relay
output
decoder
control
input
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张青
董世运
马俊杰
刘瑞河
蒋伟
张义农
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Beijing Hysine Yunda Technology Co ltd
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Beijing Hysine Yunda Technology Co ltd
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Abstract

The utility model relates to a switch control technical field provides a relay control circuit, lighting switch control module and lighting control system. The relay control circuit includes: a single chip microcomputer having a plurality of input/output pins configured to output a relay control command via the plurality of input/output pins; a decoder having a plurality of input lines and a plurality of output lines, the plurality of input lines being connected to the plurality of input/output pins, respectively; and a plurality of relays, each relay being connected to two of the plurality of output lines; the decoder is configured to decode the relay control command to generate a chip selection pulse, and the chip selection pulse is output to the target relay through a corresponding output line to control the target relay to be closed or opened. The utility model discloses a relay control circuit's interference killing feature is strong, control is simple and with low costs.

Description

Relay control circuit, lighting switch control module and lighting control system
Technical Field
The utility model relates to a switch control technical field, especially a relay control circuit, lighting switch control module and lighting control system.
Background
At present, switch control (such as lighting switch control) is usually realized by a relay. Due to the high switching power, a magnetic latching relay with a handle switching function is generally used. The magnetic latching relay is characterized in that each loop needs 2 control points, one control point transmits an action pulse to drive the contact to be closed, and the other control point transmits a reset pulse to drive the contact to be opened.
In the prior art, the methods for controlling the relay by the single chip microcomputer mainly include two methods: the input and output pins of the single chip are directly connected with the relay to output commands to directly control the relay. However, in this way, each relay needs to be connected to 2 pins of the single chip, for example, 8 relays need 16 pins as control points, and therefore, a single chip with a large number of pins needs to be selected, which leads to a significant increase in the cost of the single chip. The other is to extend an I/O control point of the single chip microcomputer through an I/O extension chip, the single chip microcomputer sends a control command to the I/O extension chip through an I2C (Inter-Integrated Circuit) or SPI (Serial Peripheral Interface) bus, and the I/O extension chip executes the command to output a pulse to the relay, thereby actuating or resetting the relay. However, since the I/O expansion chip has a weak anti-interference capability, the on/off operation of a large current may cause the chip to crash, which may result in an ineffective control of the relay, and the use of the I/O expansion chip may also result in an increase in hardware cost and labor cost. Therefore, it is urgently needed to develop a relay control scheme with strong anti-interference capability, simple control and low cost.
SUMMERY OF THE UTILITY MODEL
In view of the above, the present invention provides a relay control circuit, a lighting switch control module and a lighting control system that overcome or at least partially solve the above problems.
An object of the utility model is to provide a relay control circuit that interference killing feature is strong, control is simple and with low costs.
The utility model discloses a further aim at realizes the action control one by one to the relay, prevents to switch the in-process and causes big electric current undulant.
According to the utility model discloses an aspect provides a relay control circuit, include:
a single chip microcomputer having a plurality of input/output pins configured to output a relay control command via the plurality of input/output pins;
a decoder having a plurality of input lines and a plurality of output lines, the plurality of input lines being connected to the plurality of input/output pins, respectively; and
a plurality of relays, each of the relays being connected to two of the plurality of output lines;
the decoder is configured to decode the relay control command to generate a chip selection pulse, and output the chip selection pulse to a target relay through the corresponding output line to control the closing or opening of the target relay.
Optionally, the decoder is a binary decoder.
Optionally, the number of the input and output pins is 4,
the number of the relays is 8, and the relays are connected with the power supply,
the decoder is a 4-line to 16-line decoder.
Optionally, the decoder is a 74HC4514 decoder chip.
Optionally, the single chip microcomputer is further configured to output the relay control command through a queue.
Optionally, the length of the queue is equal to the number of relays.
According to the utility model discloses on the other hand, still provide a lighting switch control module, include:
a plurality of lighting elements; and
the relay control circuit of any preceding claim, wherein the plurality of lighting elements are connected to the plurality of relays, respectively.
According to another aspect of the embodiments of the present invention, there is provided a lighting control system, including the lighting switch control module described above.
The utility model provides an among the relay control circuit, adopt the decoder to carry out the decoding to the relay control command of singlechip output and produce the chip selection pulse to export the chip selection pulse to the closure of target relay or open with control target relay via corresponding output line. Because the decoder is a class of many input many output combinational logic circuit device, and its output quantity is far greater than input quantity, consequently, compare with the input/output pin of singlechip and relay lug connection's mode, the utility model discloses a required input/output pin quantity of singlechip that the scheme can significantly reduce to show reduction singlechip cost. Meanwhile, compared with the mode of adopting an I/O expansion chip, the decoder is a non-intelligent logic chip, the control process is simple, the dead halt is avoided, the anti-interference capability is extremely strong, the influence of strong electromagnetic disturbance generated in the action or reset process of the relay is not easy to occur, and the cost of the decoder chip is low.
Further, the utility model discloses a relay control circuit adopts binary system decoder, and it is the full decoder of binary system, can decode into 2 with the combination of n bit inputnThe circuit state is output, so that the requirement on the number of input and output pins of the singlechip is reduced to the maximum extent.
Further, the utility model discloses an among the relay control circuit, the singlechip passes through queue output relay control command in order to carry out action control one by one to the relay, avoids the multichannel action to cause big electric current fluctuation simultaneously, improves relay control circuit's stability.
The above description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the present invention is given.
The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments thereof, taken in conjunction with the accompanying drawings.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 shows a schematic diagram of a prior art single chip direct control relay;
FIG. 2 shows a schematic diagram of a prior art single chip microcomputer controlling a relay via an I/O expansion chip;
fig. 3 shows a schematic structural diagram of a relay control circuit according to an embodiment of the present invention;
fig. 4 shows a schematic diagram of relay action event generation and execution according to an embodiment of the present invention;
fig. 5 shows a schematic structural diagram of a lighting switch control module according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Switch control (e.g., light switch control) is typically implemented with relays. Due to the high switching power, a magnetic latching relay with a handle switching function is generally used. The magnetic latching relay has the following advantages: (1) the magnetic latching relay needs to consume power when switching the contact, and does not need electric energy when keeping a normal state, so that electricity can be saved; (2) because the electronic pulse drive and the manual switching through the handle are both event drive, only the switching is considered, and the maintaining is not considered, the magnetic latching relay can be switched manually and is in manual-automatic seamless connection; (3) the safety and reliability are high, for example, under the condition that the single chip microcomputer is in an abnormal state for a short time and loses the state of the relay, the state of the relay is not influenced as long as the driving pulse is not sent.
In the prior art, the mode of controlling the relay by a singlechip mainly has two modes: the single chip microcomputer directly controls the relay and controls the relay through the I/O expansion chip.
Fig. 1 shows a schematic diagram of a prior art single chip machine directly controlled relay. As shown in fig. 1, an input/output pin of a single chip microcomputer (i.e., MCU) is directly connected to a relay to output a command to directly control the relay, where "XC" (e.g., 1C, 2C, …, and 8C) represents a control point for driving KX (e.g., K1, K2, …, and K8) to close (or turn on) the relay, and "XO" (e.g., 1O, 2O, …, and 8O) represents a control point for driving KX relay to open (or turn off). It can be seen that each relay needs to be connected with 2 pins of the single chip microcomputer, for example, 8 relays need 16 pins as control points, and therefore the single chip microcomputer with a large pin number needs to be selected, and the cost of the single chip microcomputer with a large pin number in the same series is usually increased remarkably, so that the cost of the single chip microcomputer is increased remarkably.
The common method for expanding I/O control points of a single chip microcomputer is to add an I/O expansion chip. Fig. 2 shows a schematic diagram of a prior art single chip microcomputer controlling a relay via an I/O expansion chip. As shown in fig. 2, the single chip sends a control command to the I/O expansion chip through the I2C or SPI bus, and the I/O expansion chip executes the command to output a pulse to the relay, thereby actuating or resetting the relay. However, in practical applications, it has been found that the following problems exist with this solution: firstly, because the I/O expansion chip has a weak interference rejection (for example, the expansion chip TCA6424 has a significantly weaker interference rejection than a common single chip), when the relay generates a strong electromagnetic disturbance during an operation or a reset process, the I/O expansion chip is easily halted, and the I/O expansion chip must be reset to recover normal control, which affects effective control of the relay. Secondly, the I/O expansion chip is an intelligent chip in nature, and has high cost, and the cost of the whole control module is increased to a certain extent. Third, driving the I/O expansion chip requires a complex I2C or SPI protocol, which occupies more code space, resulting in consumption of storage and computation resources. Fourth, the complex I2C or SPI protocol requires more development human resources to develop, increasing human costs.
It should be noted that the number of relays and the number of control points shown in fig. 1 and 2 are merely schematic.
In view of the above technical problem, the embodiment of the utility model provides a relay control circuit is provided. Fig. 3 shows a schematic structural diagram of a relay control circuit 100 according to an embodiment of the present invention. The relay control circuit 100 is suitable for use in the case of performing on-off control of a plurality of control targets, for example, in the case of performing on-off control of a plurality of illumination lamps. Referring to fig. 3, the relay control circuit 100 may include at least a single chip microcomputer 110, a decoder 120, and a plurality of relays 130. The single chip microcomputer 110 has a plurality of input/output pins (also referred to as pins) through which a relay control command can be output. The decoder 120 has a plurality of input lines and a plurality of output lines, the plurality of input lines being connected to the plurality of input/output pins, respectively. Each relay 130 is connected to two output lines of the plurality of output lines, one of which transmits an operation pulse and the other of which transmits a reset pulse. The decoder 120 generates a chip select pulse by decoding the relay 130 control command, and outputs the chip select pulse to the target relay 130 via a corresponding output line to control the closing or opening of the target relay 130.
It should be noted that the number of relays and the number of control points shown in fig. 3 are merely schematic.
In this embodiment, the single chip microcomputer 110 may adopt an MCU (micro controller Unit), and the relay 130 may be a magnetic latching relay.
The embodiment of the utility model provides an in the relay control circuit 100 that provides, adopt decoder 120 to carry out the decoding to the relay control command of singlechip 110 output and produce the chip selection pulse to export the chip selection pulse to target relay 130 with the closure or the opening of control target relay 130 via corresponding output line. Because the decoder is a class of many input many output combinational logic circuit device, and its output quantity is far greater than input quantity, consequently, compare with the input/output pin of singlechip and relay lug connection's mode, the utility model discloses a required input/output pin quantity of singlechip that the scheme can significantly reduce to show reduction singlechip cost. Meanwhile, compared with the mode of adopting an I/O expansion chip, the decoder is a non-intelligent logic chip, the control process is simple, the dead halt is avoided, the anti-interference capability is extremely strong, the influence of strong electromagnetic disturbance generated in the action or reset process of the relay is not easy to occur, the cost of the decoder chip is low, and the cost of the whole relay control circuit 100 is further reduced.
The embodiment of the utility model provides an in, decoder 120 is an address decoder, and its basic function is to carry out the decoding to binary system address code, produces the chip selection pulse and is used for controlling the magnetic latching relay to realize controlling the action or the reseing of relay accurately. It can be understood that for a normally open relay, the action means that the relay is closed, and the reset means that the relay is opened again; conversely, for a normally closed relay, an "action" means the relay is opened, and a "reset" means the relay is restored to be closed.
The decoder 120 may include a binary decoder, a BCD decoder, and the like. Binary decoder also known as n-2nA line decoder for inputting 2 bits of n-bit binary codenThe seed code values are decoded respectively to obtain 2nSeed output (i.e. 2)nOne circuit state) and is therefore also referred to as a full decoder. The BCD decoder, also known as a binary-decimal decoder, has four inputs and ten outputsThe output is encoded as a 1-bit BCD code and the output is ten outputs corresponding to the BCD, and is therefore also referred to as a partial decoder. The control process of the decoder chip is simple, and the program code consumption is low.
In a preferred embodiment of the present invention, the decoder 120 is a binary decoder. Since the binary decoder is a full decoder, the combination of n inputs can be decoded to 2nThe circuit state is output, so that the requirement on the number of input and output pins of the singlechip is reduced to the maximum extent.
In a specific embodiment of the present invention, the number of the relays 130 may be 8, the decoder 120 adopts a 4-16-wire decoder, and accordingly, the number of the input/output pins of the single chip microcomputer 110 may be 4. In the case of an 8-way relay 130 that needs to be controlled, the generation of 2 based on 4-bit input can be achieved by using a 4-line-16-line decoder4In this way, only 4I/O control lines (i.e., 4I/O pins) need to be led out from the single chip 110, which greatly reduces the number of input/output pins required by the single chip. Of course, the decoder 120 is also connected to an enable pin of the mcu 110 to be activated by an enable signal output from the mcu 110.
More specifically, a 4-line to 16-line decoder may employ a 74HC4514 decoder chip, which is more robust and readily available.
In some applications (e.g., high current switching of lighting modules), it is generally undesirable to have multiple relays act simultaneously, since this is prone to large current fluctuations. In view of this, in some embodiments of the present invention, the single chip 110 may be further configured to output the relay control command through the queue to perform the action control on the relays 130 one by one. The queue may be a FIFO (First Input First Output) queue, which is a conventional in-order execution method, in which an instruction that enters First completes and retires First, and then executes a second instruction, thereby implementing one-by-one execution of commands. The principle of generation and execution of the relay action event will be described with reference to fig. 4.
It should be noted that, each control command (or control action) of the single chip microcomputer 110 to the relay 130 may be converted into a pulse event, for example, turning on the relay K1, that is, setting 1 high level on the open pin (i.e., 1O output line) first, and after keeping for a period of time (the time length is greater than the minimum value required by the magnetic latching relay), restoring the low level. Each pulse event is not separable and the 2 different pulse events cannot intersect in time, i.e. one pulse must wait to complete before another pulse can be issued. A plurality of pulse events form a FIFO queue, and are executed one by one.
In application, the generation of the relay action event may be from the operation result of the controller logic program inside the single chip microcomputer 110 or from the command of the external device. After the action event of the relay is generated, the action event is converted into an impulse event code, and the code comprises the following information: identification information of the relay (e.g., ID number) and action information (e.g., "close" or "open"). The pulse event codes enter the FIFO queue. The pulse event codes in the FIFO queue are output to the decoder 120 one by one for decoding into chip selection pulses, and the latter chip selection pulses are output to the target relay 130 via corresponding output lines to execute the relay action events, thereby realizing the one-by-one execution of the pulse events. Therefore, large current fluctuation caused by simultaneous actions of multiple paths is avoided, and the stability of the relay control circuit 100 is improved. For the high current switching situation, because the multi-way switch has a large risk of simultaneous operation, it is easy to cause large current fluctuation, so that the decoder 120 is used to realize one-by-one operation, which just meets the requirement of safe power utilization.
Further, the length of the queue is equal to the number of relays 130, so as to ensure one-to-one correspondence between the control commands and the target relays 130. In order to prevent the overflow of the FIFO queue, when elements (namely pulse event codes) are added to the FIFO queue, whether the elements to be executed in the queue have the event with the same relay ID number as the elements to be added is firstly compared, if so, the original event is covered by a new event, but the position in the queue is kept unchanged, so that the length of the FIFO queue can be kept equal to the number of the relays without overflow.
Based on same technical concept, the embodiment of the utility model provides a still provides a lighting switch control module. Fig. 5 shows a schematic structural diagram of a lighting switch control module according to an embodiment of the present invention. Referring to fig. 5, the lighting switch control module may generally include a plurality of lighting elements 200 (such as lighting lamps, etc.), and the relay control circuit 100 according to any embodiment or combination of embodiments, wherein the plurality of lighting elements 200 are respectively connected to the plurality of relays 130, and the on/off of the lighting elements 200 is implemented by closing or opening the relays 130.
In this embodiment, the decoder 120 is used to decode the relay control command output by the single chip microcomputer to generate a chip selection pulse, and the chip selection pulse is output to the target relay 130 via a corresponding output line to control the on/off of the target relay 130, so as to further realize the on/off control of the lighting element 200, thereby achieving the advantages of strong anti-interference capability, simple control and low cost.
Based on same technical concept, the embodiment of the utility model provides a still provide a lighting control system, it includes the aforesaid lighting switch control module. Of course, the lighting control system may further include a dimming control module, a power supply module, and the like. Since the arrangement and operation principle of the dimming control module and the power module of the lighting device should be known to those skilled in the art, they will not be described herein.
It should be noted that, in practical applications, all the above-mentioned optional embodiments may be combined in a combined manner at will to form the optional embodiments of the present invention, which is not described herein again.
According to any one of the above-mentioned optional embodiments or the combination of a plurality of optional embodiments, the embodiment of the present invention can achieve the following advantageous effects:
the utility model provides an among the relay control circuit, adopt the decoder to carry out the decoding to the relay control command of singlechip output and produce the chip selection pulse to export the chip selection pulse to the closure of target relay or open with control target relay via corresponding output line. Because the decoder is a class of many input many output combinational logic circuit device, and its output quantity is far greater than input quantity, consequently, compare with the input/output pin of singlechip and relay lug connection's mode, the utility model discloses a required input/output pin quantity of singlechip that the scheme can significantly reduce to show reduction singlechip cost. Meanwhile, compared with the mode of adopting an I/O expansion chip, the decoder is a non-intelligent logic chip, the control process is simple, the dead halt is avoided, the anti-interference capability is extremely strong, the influence of strong electromagnetic disturbance generated in the action or reset process of the relay is not easy to occur, and the cost of the decoder chip is low.
Further, the utility model discloses a relay control circuit adopts binary system decoder, and it is the full decoder of binary system, can decode into 2 with the combination of n bit inputnThe circuit state is output, so that the requirement on the number of input and output pins of the singlechip is reduced to the maximum extent.
Further, the utility model discloses an among the relay control circuit, the singlechip passes through queue output relay control command in order to carry out action control one by one to the relay, avoids the multichannel action to cause big electric current fluctuation simultaneously, improves relay control circuit's stability.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments can be modified or some or all of the technical features can be equivalently replaced within the spirit and principles of the present invention; such modifications and substitutions do not depart from the scope of the present invention.

Claims (8)

1. A relay control circuit, comprising:
a single chip microcomputer having a plurality of input/output pins configured to output a relay control command via the plurality of input/output pins;
a decoder having a plurality of input lines and a plurality of output lines, the plurality of input lines being connected to the plurality of input/output pins, respectively; and
a plurality of relays, each of the relays being connected to two of the plurality of output lines;
the decoder is configured to decode the relay control command to generate a chip selection pulse, and output the chip selection pulse to a target relay through the corresponding output line to control the closing or opening of the target relay.
2. The relay control circuit of claim 1,
the decoder is a binary decoder.
3. The relay control circuit of claim 2,
the number of the input and output pins is 4,
the number of the relays is 8, and the relays are connected with the power supply,
the decoder is a 4-line to 16-line decoder.
4. The relay control circuit of claim 3,
the decoder is a 74HC4514 decoder chip.
5. The relay control circuit of claim 1,
the single chip microcomputer is also configured to output the relay control command through a queue.
6. The relay control circuit of claim 5,
the length of the queue is equal to the number of the relays.
7. A light switch control module, comprising:
a plurality of lighting elements; and
the relay control circuit of any of claims 1-6, wherein the plurality of lighting elements are connected to the plurality of relays, respectively.
8. A lighting control system comprising the lighting switch control module of claim 7.
CN202120914835.3U 2021-04-29 2021-04-29 Relay control circuit, lighting switch control module and lighting control system Active CN214505383U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202120914835.3U CN214505383U (en) 2021-04-29 2021-04-29 Relay control circuit, lighting switch control module and lighting control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202120914835.3U CN214505383U (en) 2021-04-29 2021-04-29 Relay control circuit, lighting switch control module and lighting control system

Publications (1)

Publication Number Publication Date
CN214505383U true CN214505383U (en) 2021-10-26

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