CN214480320U

CN214480320U - Linear three-phase sine inverter

Info

Publication number: CN214480320U
Application number: CN202120588305.4U
Authority: CN
Inventors: 龙素华; 李敏; 金山; 崔红卫; 杨盼盼; 杨策; 段文涛; 李超; 张刚强
Original assignee: Shaanxi electronic technology research institute
Current assignee: Shaanxi Electronic Technology Research Institute Co ltd
Priority date: 2021-03-23
Filing date: 2021-03-23
Publication date: 2021-10-22
Anticipated expiration: 2031-03-23

Abstract

The utility model discloses a linear three-phase sine inverter power supply, which comprises a signal generating circuit, a shaping circuit, a frequency dividing circuit, a driving circuit, a signal conversion and power amplification circuit, a booster circuit and a compensating circuit; the signal generating circuit is connected with the shaping circuit; the output end of the shaping circuit is connected with the frequency dividing circuit; the output end of the frequency dividing circuit is connected with the driving circuit; the output end of the driving circuit is connected with a signal conversion and power amplification circuit; the signal conversion and power amplification circuit is connected with the booster circuit; the compensation circuit is connected with the booster circuit and used for finely adjusting the phase and the distortion degree of the output voltage of the booster circuit. The utility model discloses output signal frequency precision is high, has the advantage that three-phase voltage phase difference deviation is little and the equilibrium is high.

Description

Linear three-phase sine inverter

Technical Field

The utility model belongs to the technical field of power electronics, concretely relates to sinusoidal invertion power supply of linear type three-phase.

Background

The traditional DC-AC three-phase inverter power supply adopts a Sinusoidal Pulse Width Modulation (SPWM) technology, and the technology is usually realized by programmable logic devices such as an analog circuit method, a special SPWM integrated circuit method or a Direct Digital Synthesizer (DDS)/Digital Signal Processor (DSP)/Micro Control Unit (MCU)/Complex Programmable Logic Device (CPLD) and the like; the analog circuit method comprises the steps that a comparator is used, sine waves and triangular waves are compared, and then pulse square waves with duty ratios changing along with the sine waves are output to serve as driving signals of a switching device of an inverter; the special SPWM integrated circuit method adopts a digital large-scale integrated circuit chip, and generally adopts imported chips such as SA869, SA838, SLE4520 and the like; the programmable logic device method adopts a software coding method to generate SPWM waveform. The three methods are that SPWM square waves are generated firstly, then the power switch tube is driven to work, and then smooth filtering is carried out, electromagnetic interference is easily generated in the working process of the switch tube, the frequency stability is poor, the phase difference precision between three phases is difficult to control, and the requirements of aeronautical instruments and electronic equipment on high reliability and high precision of a power supply are difficult to meet.

SUMMERY OF THE UTILITY MODEL

In view of this, the main objective of the present invention is to provide a linear three-phase sine inverter.

In order to achieve the above purpose, the technical scheme of the utility model is realized like this:

the embodiment of the utility model provides a linear three-phase sine inverter power supply, including signal generation circuit, shaping circuit, frequency division circuit, drive circuit, signal conversion and power amplification circuit, boost circuit, compensating circuit;

the signal generating circuit is connected with the shaping circuit and used for generating an initial signal;

the output end of the shaping circuit is connected with the frequency dividing circuit and is used for shaping the initial signal to obtain a 4.9152MHz square wave;

the output end of the frequency dividing circuit is connected with the driving circuit and is used for converting the shaped 4.9152MHz square wave into a 2.4KHz single-path square wave and outputting the square wave to the driving circuit;

the output end of the driving circuit and the signal conversion and power amplification circuit are used for converting the received 2.4KHz single square wave into 3 paths of 400Hz orthogonal square waves and outputting the 3 paths of 400Hz orthogonal square waves to the signal conversion and power amplification circuit;

the signal conversion and power amplification circuit is connected with the booster circuit and the compensation circuit, and is used for converting 3 paths of orthogonal 400Hz square waves into three-phase 400Hz sinusoidal signals with phase difference of 120 degrees and outputting the sinusoidal signals to the booster circuit and the compensation circuit; one path outputs a telemetering signal;

the boosting circuit is connected with electric equipment and is used for amplifying the amplitude of sinusoidal signals with 400Hz and phase difference of 120 degrees in three phases and then outputting three-phase sinusoidal signals with frequency of 400Hz, voltage effective value of 115V and phase difference of 120 degrees;

the compensation circuit is connected with the booster circuit and used for finely adjusting the phase and the distortion degree of the output voltage of the booster circuit.

In the above scheme, the signal generating circuit includes a first inverter U1A, a first crystal oscillator Y1, a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2, wherein the 1 st and 2 nd ends of the first inverter U1A are grounded through the first capacitor C1, one path of the 3 rd end is connected to the 5 th and 6 th ends of the second inverter U1B, the other path is grounded through the second resistor R2 and the second capacitor C2, and the first crystal oscillator Y1 and the first resistor R1 are respectively connected in parallel between the 1 st and 2 nd ends and the 3 rd end of the first inverter U1A.

In the above solution, the shaping circuit includes a second inverter U1B, the 4 th terminal of the second inverter U1B is connected to the 12 th divide-by-12 circuit, and the 5 th and 6 th terminals are connected to the 3 rd terminal of the first inverter U1A.

In the above scheme, the frequency dividing circuit includes a frequency divider U2, a 10 th end of the frequency divider U2 is connected to a 4 th end of a second inverter U1B, an 8 th end is grounded, a 16 th end is connected to a +12V power supply, a 14 th end outputs a 2.4KHz single square wave, and an 11 th end is connected to a 5V TTL enable signal.

In the above scheme, the driving circuit includes a first dual D flip-flop U3A, a second dual D flip-flop U3B, and a third dual D flip-flop U3C, the 3 rd end of the first dual D flip-flop U3A, the 11 th end of the second dual D flip-flop U3B, and the 3 rd end of the third dual D flip-flop U3C are commonly connected to the signal generating circuit, the 1 st end of the first dual D flip-flop U3A outputs a first 400Hz quadrature square wave, the 2 nd end is connected to the 5 th end of the third dual D flip-flop U3C, the 5 th end is connected to the 12 th end of the second dual D flip-flop U3B, and the 6 th end is grounded; the 13 th end of the second double-D flip-flop U3B outputs a second path of 400Hz orthogonal square wave, and the 9 th end is connected with the 2 nd end of a third double-D flip-flop U3C; the 1 st end of the third double-D trigger U3C outputs a third 400Hz quadrature square wave, and the 6 th end is grounded.

In the above scheme, the 4 th terminal of the first dual D flip-flop U3A, the 8 th and 10 th terminals of the second dual D flip-flop U3B, and the 4 th terminal of the third dual D flip-flop U3C are connected to the power-on reset circuit in common.

In the above scheme, the power-on reset circuit includes a third inverter U1C, a third resistor R3, and a fourth capacitor C4, the 10 th end of the third inverter U1C is connected to the driving circuit, the 8 th end and the 9 th end are connected together, one path is grounded through the fourth capacitor C4, and the other path is connected to the +12V power supply through the third resistor R3.

Compared with the prior art, the utility model discloses because the signal produces the unit and adopts digital circuit, low temperature float crystal oscillator and digital frequency-division circuit, consequently output signal frequency accuracy is high, and the signal conversion unit adopts active filter circuit, and three-phase difference and output voltage range accessible active filter peripheral circuit parameter carry out accurate regulation, have the advantage that three-phase voltage phase difference deviation is little and the equilibrium is high, in addition, owing to adopt linear topological structure, has abandoned the shortcoming of switch type topological structure high frequency electromagnetic interference.

Drawings

The accompanying drawings, which are described herein, serve to disclose a further understanding of the invention and constitute a part of this specification, and the exemplary embodiments and descriptions thereof are used to explain the invention and not to constitute an undue limitation on the invention. In the drawings:

fig. 1 is a connection block diagram of a linear three-phase sine inverter according to an embodiment of the present invention;

fig. 2 is a circuit diagram of a linear three-phase sine inverter according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The embodiment of the utility model provides a linear three-phase sine inverter, as shown in figure 1, including signal generation circuit, shaping circuit, frequency division circuit, drive circuit, signal conversion and power amplification circuit, boost circuit, compensating circuit;

the output end of the frequency dividing circuit is connected with the driving circuit and is used for converting the shaped 4.9152MHz square wave into a 2.4KHz single path and outputting the single path to the driving circuit;

one path of the signal conversion and power amplification circuit is connected with the booster circuit and the compensation circuit, and is used for converting 3 paths of 400Hz orthogonal square waves into three-phase 400Hz sinusoidal signals with phase difference of 120 degrees and outputting the sinusoidal signals to the booster circuit and the compensation circuit; one path outputs a telemetering signal;

the booster circuit is used for amplifying the amplitude of three-phase sinusoidal signals with 400Hz and 120-degree phase difference and outputting three-phase sinusoidal signals with 400Hz frequency, 115V voltage effective value and 120-degree phase difference;

The utility model discloses change the 28V DC power supply of input into three-phase 400Hz 115V AC power supply to have telemetering measurement signal output and TTL signal control function, mainly be applied to aeronautical instrument and electronic equipment field.

The signal generating circuit comprises a first inverter U1A, a first crystal oscillator Y1, a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, wherein the 1 st end and the 2 nd end of the first inverter U1A are grounded through the first capacitor C1, one path of the 3 rd end is connected with the 5 th end and the 6 th end of the second inverter U1B, the other path of the 3 rd end is grounded through the second resistor R2 and the second capacitor C2, and the first crystal oscillator Y1 and the first resistor R1 are respectively connected between the 1 st end and the 2 nd end and the 3 rd end of the first inverter U1A in parallel.

The shaping circuit comprises a second inverter U1B, the 4 th end of the second inverter U1B is connected with the 12 th frequency division circuit, and the 5 th and 6 th ends are connected with the 3 rd end of the first inverter U1A.

The 12-frequency division circuit comprises a frequency divider U2, wherein the 10 th end of the frequency divider U2 is connected with the 4 th end of a second inverter U1B, the 8 th end is grounded, the 16 th end is connected with a +12V power supply, the 14 th end outputs 2.4KHz single-path square waves, and the 11 th end is connected with a 5V TTL enabling signal.

And when the 5V TTL enable signal is at a high level, the 4.9152MHz square wave passes through the frequency divider U2, and then a 2.4KHz single-path square wave is output.

The driving circuit comprises a first dual-D flip-flop U3A, a second dual-D flip-flop U3B and a third dual-D flip-flop U3C, wherein the 3 rd end of the first dual-D flip-flop U3A, the 11 th end of the second dual-D flip-flop U3B and the 3 rd end of the third dual-D flip-flop U3C are connected with a signal generating circuit in a common mode, the 1 st end of the first dual-D flip-flop U3A outputs a first 400Hz orthogonal square wave, the 2 nd end is connected with the 5 th end of the third dual-D flip-flop U3C, the 5 th end is connected with the 12 th end of the second dual-D flip-flop U3B, and the 6 th end is grounded; the 13 th end of the second double-D flip-flop U3B outputs a second path of 400Hz orthogonal square wave, and the 9 th end is connected with the 2 nd end of a third double-D flip-flop U3C; the 1 st end of the third double-D trigger U3C outputs a third 400Hz quadrature square wave, and the 6 th end is grounded.

The 4 th end of the first double D trigger U3A, the 8 th and 10 th ends of the second double D trigger U3B and the 4 th end of the third double D trigger U3C are connected with an electric reset circuit in common.

The power-on reset circuit comprises a third inverter CD4011-U1C, a third resistor R3 and a fourth capacitor C4, wherein the 10 th end of the third inverter CD4011-U1C is connected with the driving circuit, the 8 th end and the 9 th end are connected in common, one path is grounded through the fourth capacitor C4, and the other path is connected with a +12V power supply through a third resistor R3.

The same or similar reference numerals in the drawings of the present embodiment correspond to the same or similar components; in the description of the present invention, it is to be understood that the terms "upper", "lower", "left", "right", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplified description, but do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationships in the drawings are only used for illustrative purposes and are not to be construed as limitations of the present patent, and specific meanings of the terms may be understood by those skilled in the art according to specific situations.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, article, or apparatus that comprises the element.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.

Claims

1. A linear three-phase sine inverter power supply is characterized by comprising a signal generating circuit, a shaping circuit, a frequency dividing circuit, a driving circuit, a signal conversion and power amplification circuit, a booster circuit and a compensation circuit;

the signal conversion and power amplification circuit is connected with the booster circuit and is used for converting 3 paths of orthogonal 400Hz square waves into three-phase 400Hz sinusoidal signals with phase difference of 120 degrees and outputting the sinusoidal signals to the booster circuit and the compensation circuit; one path outputs a telemetering signal;

2. The linear three-phase sine inverter power supply of claim 1, wherein the signal generating circuit comprises a first inverter U1A, a first crystal oscillator Y1, a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, wherein the 1 st and 2 nd ends of the first inverter U1A are grounded through the first capacitor C1, one of the 3 rd ends is connected with the 5 th and 6 th ends of the second inverter U1B, the other is grounded through the second resistor R2 and the second capacitor C2, and the first crystal oscillator Y1 and the first resistor R1 are respectively connected in parallel between the 1 st and 2 nd ends and the 3 rd end of the first inverter U1A.

3. The linear three-phase sine inverter according to claim 2, wherein the shaping circuit comprises a second inverter U1B, the 4 th terminal of the second inverter U1B is connected to the 12 th frequency dividing circuit, and the 5 th and 6 th terminals are connected to the 3 rd terminal of the first inverter U1A.

4. The linear three-phase sine inverter of claim 3, wherein the frequency divider circuit comprises a frequency divider U2, the 10 th terminal of the frequency divider U2 is connected to the 4 th terminal of the second inverter U1B, the 8 th terminal is grounded, the 16 th terminal is connected to the +12V power supply, the 14 th terminal outputs 2.4KHz single square wave, and the 11 th terminal is connected to the 5V TTL enable signal.

5. The linear three-phase sine inverter according to any one of claims 1 to 4, wherein the driving circuit comprises a first dual D flip-flop U3A, a second dual D flip-flop U3B, and a third dual D flip-flop U3C, the 3 rd terminal of the first dual D flip-flop U3A, the 11 th terminal of the second dual D flip-flop U3B, and the 3 rd terminal of the third dual D flip-flop U3C are connected in common to generate a signal, the 1 st terminal of the first dual D flip-flop U3A outputs a first 400Hz quadrature square wave, the 2 nd terminal is connected to the 5 th terminal of the third dual D flip-flop U3C, the 5 th terminal is connected to the 12 th terminal of the second dual D flip-flop U3B, and the 6 th terminal is grounded; the 13 th end of the second double-D flip-flop U3B outputs a second path of 400Hz orthogonal square wave, and the 9 th end is connected with the 2 nd end of a third double-D flip-flop U3C; the 1 st end of the third double-D trigger U3C outputs a third 400Hz quadrature square wave, and the 6 th end is grounded.

6. The linear three-phase sine inverter according to claim 5, wherein the 4 th terminal of the first dual D flip-flop U3A, the 8 th and 10 th terminals of the second dual D flip-flop U3B, and the 4 th terminal of the third dual D flip-flop U3C are connected to the power-on reset circuit.

7. The linear three-phase sine inverter power supply of claim 6, wherein the power-on reset circuit comprises a third inverter U1C, a third resistor R3 and a fourth capacitor C4, the 10 th end of the third inverter U1C is connected with the driving circuit, the 8 th end and the 9 th end are connected together, then one path is grounded through the fourth capacitor C4, and the other path is connected into the +12V power supply through the third resistor R3.