CN214477388U - Packaging structure for image processing chip - Google Patents
Packaging structure for image processing chip Download PDFInfo
- Publication number
- CN214477388U CN214477388U CN202120571963.2U CN202120571963U CN214477388U CN 214477388 U CN214477388 U CN 214477388U CN 202120571963 U CN202120571963 U CN 202120571963U CN 214477388 U CN214477388 U CN 214477388U
- Authority
- CN
- China
- Prior art keywords
- protective housing
- packaging
- protection shell
- stopper
- encapsulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Packaging Frangible Articles (AREA)
Abstract
The utility model provides a be used for packaging structure for image processing chip relates to the chip package field, which comprises a substrate, substrate surface is equipped with protective housing, and bonds between the protective housing base plate, the inside encapsulation protective housing that is equipped with of protective housing, encapsulation protective housing side is equipped with the stopper, and stopper and encapsulation protective housing lateral wall fixed connection, the protective housing inner wall is equipped with the spacing groove, and spacing groove and protective housing inner wall fixed connection, complete gomphosis between spacing groove and the stopper, and spacing groove and stopper sliding connection. The side of the packaging protection shell is provided with the limiting block respectively, the inner wall of the protection shell is provided with the limiting groove, and in the installation process, the limiting groove and the limiting block can be completely embedded with each other, so that the protection shell and the packaging protection shell are firmer, the protection shell is prevented from falling off or deforming under the conditions of transportation or vibration, and the main body inside the packaging protection shell is protected.
Description
Technical Field
The utility model relates to a chip package technical field especially relates to be used for image processing packaging structure for chip.
Background
The chip package is a process of assembling an integrated circuit into a chip final product, in short, an integrated circuit die produced by a foundry is put on a substrate which plays a bearing role, pins are led out, and then the integrated circuit die is fixedly packaged into a whole, as a verb, "package" emphasizes the processes and actions of placing, fixing, sealing and leading, and as a noun, "package" mainly focuses on the form and category of package, the materials of a substrate, a shell and a leading wire, emphasizes the important functions of protecting the chip, enhancing the electric heating performance and facilitating the assembly of the whole machine, and when the chip package is carried out, a package structure is required.
Traditional encapsulation mode compressive property is relatively poor, and the package shell is easy to appear warping and damage its inside main part, influences the follow-up use of main part to do not have fine heat dissipation channel, signal transmission efficiency can delay the phenomenon.
SUMMERY OF THE UTILITY MODEL
The utility model aims at solving the defects existing in the prior art, and provides a packaging structure for an image processing chip.
In order to achieve the above purpose, the utility model adopts the following technical scheme: a packaging structure for image processing chip, which comprises a substrate, the substrate surface is equipped with protective housing, and bonds between the protective housing base plate, the inside encapsulation protective housing that is equipped with of protective housing, encapsulation protective housing side is equipped with the stopper, and stopper and encapsulation protective housing lateral wall fixed connection, the protective housing inner wall is equipped with the spacing groove, and spacing groove and protective housing inner wall fixed connection, complete gomphosis between spacing groove and the stopper, and spacing groove and stopper sliding connection.
Preferably, hot spot welding points are arranged at the bottom of the packaging protection shell and fixed on the surface of the substrate, and the packaging protection shell and the substrate are fixedly connected through the hot spot welding points.
Preferably, the surface of the protective shell is provided with heat dissipation holes, the heat dissipation holes are arrayed on the surface of the protective shell, and the inside of the packaging protective shell and the outside of the protective shell are communicated through the heat dissipation holes.
Preferably, a reinforcing column is arranged at the top of the packaging protective shell, and the top surface of the interior of the protective shell and the top surface of the packaging protective shell are fixedly connected through four reinforcing columns.
Preferably, the protective shell and the packaging protective shell are made of insulating materials and are fixedly connected through welding layers formed by hot spot welding spots.
Preferably, the sealing protection shell and the protection shell are filled with foam rubber, and the gap inside the foam rubber is 1 mm.
Advantageous effects
The utility model discloses in, adopt the mode encapsulation of hot spot solder joint, the IO terminal of BGA encapsulation distributes below the encapsulation with circular or column solder joint according to the array form, the advantage of BGA technique is that the IO pin number has increased, but the pin interval has not reduced and has increased on the contrary, thereby the equipment yield has been improved, though its consumption increases, nevertheless BGA can weld with the controllable chip method of collapsing, thereby can improve its electric heat performance signal transmission delay for a short time, the frequency of use improves greatly, the usable coplane welding of equipment, high reliability.
The utility model discloses in, the post is strengthened in the setting, protective housing and encapsulation protective housing set up between to strengthen the compressive property that the post can effectual improvement protective housing top, avoid it to warp when receiving great pressure and damage the inside main part of encapsulation protective housing, guarantee the inside chip normal operating of encapsulation protective housing, be provided with the stopper respectively in the encapsulation protective housing side simultaneously, be provided with the spacing groove at the protective housing inner wall, in the in-process of installation, spacing groove and stopper can gomphosis each other completely, protective housing and encapsulation shell are more firm during the time, prevent coming off or warping of protective housing under the condition of transportation or vibrations, also protect the inside main part of encapsulation protective housing simultaneously.
Drawings
Fig. 1 is an isometric view of the present invention;
fig. 2 is a cross-sectional view of the present invention;
fig. 3 is a top cross-sectional view of the present invention;
fig. 4 is a test cross-sectional view of the present invention.
Illustration of the drawings:
1. a substrate; 2. a protective housing; 3. heat dissipation holes; 4. packaging a protective shell; 5. a limiting groove; 6. a limiting block; 7. hot spot welding spots; 8. and (4) reinforcing the column.
Detailed Description
In order to make the technical means, the creation features, the achievement purposes and the functions of the present invention easy to understand, the present invention will be further explained below with reference to the following embodiments and the accompanying drawings, but the following embodiments are only the preferred embodiments of the present invention, and not all embodiments are included. Based on the embodiments in the implementation, other embodiments obtained by those skilled in the art without any creative work belong to the protection scope of the present invention.
Specific embodiments of the present invention will be described below with reference to the accompanying drawings.
The specific embodiment is as follows:
referring to fig. 1-4, an encapsulation structure for an image processing chip, including a substrate 1, a substrate 1 surface is provided with a protective shell 2, and the protective shell 2 is bonded between the substrate 1, an encapsulation protection shell 4 is arranged inside the protective shell 2, a stopper 6 is arranged on the side surface of the encapsulation protection shell 4, and the stopper 6 is fixedly connected with the side wall of the encapsulation protection shell, a limit groove 5 is arranged on the inner wall of the protective shell 2, the limit groove 5 is fixedly connected with the inner wall of the protective shell 2, the limit groove 5 is completely embedded with the stopper 6, the limit groove 5 is slidably connected with the stopper 6, the protective shell 2 and the encapsulation protection shell 4 are both made of insulating materials, and are both fixedly connected with a welding layer formed by a hot spot welding spot 7.
The bottom of the packaging protection shell 4 is provided with a hot spot welding point 7, the hot spot welding point 7 is fixed on the surface of the substrate 1, and the packaging protection shell 4 is fixedly connected with the substrate 1 through the hot spot welding point 7.
Heat dissipation holes 3 are formed in the surface of the protective shell 2, the heat dissipation holes 3 are arrayed on the surface of the protective shell 2, and the inside of the packaging protective shell 4 is communicated with the outside of the protective shell 2 through the heat dissipation holes 3.
The top of the packaging protection shell 4 is provided with a reinforcing column 8, and the top surface of the interior of the protection shell 2 and the top surface of the packaging protection shell 4 are fixedly connected through four reinforcing columns 8.
The packing has the foam rubber between encapsulation protective housing 4 and the protective housing 2 is inside, and the inside gap of foam rubber is 1 mm.
The utility model discloses a theory of operation: the BGA package has the advantages that although the number of I/O pins is increased, the pin pitch is not reduced but increased instead, so that the assembly yield is improved, and although the power consumption is increased, the BGA can be welded by a controllable collapse chip method, so that the electrothermal performance of the BGA can be improved, the signal transmission delay is small, the use frequency is greatly improved, coplanar welding can be used for assembly, and the reliability is high. Column 8 is strengthened in the setting, protective housing 2 and encapsulation protective housing 4 set up between to strengthen the compressive property at column 8 can 2 tops of effectual improvement protective housing, avoid it to warp when receiving great pressure and damage the inside main part of encapsulation protective housing 4, guarantee 4 inside chips normal operating of encapsulation protective housing, be provided with stopper 6 respectively in encapsulation protective housing 4 side simultaneously, be provided with spacing groove 5 at 2 inner walls of protective housing, at the in-process of installation, spacing groove 5 and stopper 6 can mutual gomphosis completely, time protective housing 2 and encapsulation shell are more firm, prevent coming off or being out of shape of protective housing 2 under the condition of transportation or vibrations, also protect the inside main part of encapsulation protective housing 4 simultaneously.
In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact between the first and second features, or may comprise contact between the first and second features not directly. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It should be understood by those skilled in the art that the present invention is not limited by the above embodiments, and the description in the above embodiments and the description is only preferred examples of the present invention, and is not intended to limit the present invention, and that the present invention can have various changes and modifications without departing from the spirit and scope of the present invention, and these changes and modifications all fall into the scope of the claimed invention. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (6)
1. Packaging structure for an image processing chip, comprising a substrate (1), characterized in that: base plate (1) surface is equipped with protecting sheathing (2), and bonds between protecting sheathing (2) base plate (1), the inside encapsulation protective housing (4) that is equipped with of protecting sheathing (2), encapsulation protective housing (4) side is equipped with stopper (6), and stopper (6) and encapsulation protective housing (4) lateral wall fixed connection, protecting sheathing (2) inner wall is equipped with spacing groove (5), and spacing groove (5) and protecting sheathing (2) inner wall fixed connection, complete gomphosis between spacing groove (5) and stopper (6), and spacing groove (5) and stopper (6) sliding connection.
2. The package structure for an image processing chip according to claim 1, wherein: the packaging protective shell is characterized in that hot spot welding points (7) are arranged at the bottom of the packaging protective shell (4), the hot spot welding points (7) are fixed on the surface of the substrate (1), and the packaging protective shell (4) is fixedly connected with the substrate (1) through the hot spot welding points (7).
3. The package structure for an image processing chip according to claim 1, wherein: the surface of the protective shell (2) is provided with heat dissipation holes (3), the heat dissipation holes (3) are arrayed on the surface of the protective shell (2), and the inside of the packaging protective shell (4) is communicated with the outside of the protective shell (2) through the heat dissipation holes (3).
4. The package structure for an image processing chip according to claim 1, wherein: the top of the packaging protection shell (4) is provided with a reinforcing column (8), and the inner top surface of the protection shell (2) is fixedly connected with the top surface of the packaging protection shell (4) through four reinforcing columns (8).
5. The package structure for an image processing chip according to claim 1, wherein: protective housing (2) and encapsulation protective housing (4) are insulating material, and all weld layer fixed connection through hot spot solder joint (7) formation.
6. The package structure for an image processing chip according to claim 1, wherein: the packaging protection shell (4) and the protection shell (2) are filled with foam rubber, and gaps inside the foam rubber are 1 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120571963.2U CN214477388U (en) | 2021-03-22 | 2021-03-22 | Packaging structure for image processing chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120571963.2U CN214477388U (en) | 2021-03-22 | 2021-03-22 | Packaging structure for image processing chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214477388U true CN214477388U (en) | 2021-10-22 |
Family
ID=78155840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120571963.2U Active CN214477388U (en) | 2021-03-22 | 2021-03-22 | Packaging structure for image processing chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214477388U (en) |
-
2021
- 2021-03-22 CN CN202120571963.2U patent/CN214477388U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9059010B2 (en) | Semiconductor device and method of forming the same | |
| US6574107B2 (en) | Stacked intelligent power module package | |
| US20100258932A1 (en) | Supporting substrate before cutting, semiconductor device, and method of forming semiconductor device | |
| US6867486B2 (en) | Stack chip module with electrical connection and adhesion of chips through a bump for improved heat release capacity | |
| JP2009124151A (en) | Laminated semiconductor package with improved bonding reliability | |
| CN207116549U (en) | Framework and battery modules | |
| KR20130122508A (en) | Stud bump structure for semiconductor package assemblies | |
| CN102280433A (en) | Encapsulation structure and encapsulation method for wafer-level die sizes | |
| US20080073786A1 (en) | Semiconductor device and method of manufacturing the same | |
| KR20110124065A (en) | Stack type semiconductor package | |
| US10475730B2 (en) | Preformed lead frame device and lead frame package including the same | |
| US6820329B2 (en) | Method of manufacturing multi-chip stacking package | |
| JP2904141B2 (en) | Semiconductor device | |
| CN214477388U (en) | Packaging structure for image processing chip | |
| CN101026144A (en) | Radiating type stereo package structure and its manufacturing method | |
| CN102231376A (en) | Multi-cycle arrangement carrier-free double-integrated chip (IC) package and production method | |
| US20090224403A1 (en) | Semiconductor device and method of manufacturing the same | |
| CN102044528A (en) | Stacked packaging member and manufacturing method thereof | |
| KR100343150B1 (en) | Power semiconductor module with metal terminal, metal terminal manufacturing method of power semiconductor module, and power semiconductor module manufacturing method | |
| JP4635471B2 (en) | Semiconductor device and manufacturing method thereof, mounting structure of semiconductor device, and lead frame | |
| KR100668858B1 (en) | Stack type package module and manufacture method thereof | |
| JP2010087403A (en) | Semiconductor device | |
| KR101111428B1 (en) | Semiconductor and method for manufacturing of it | |
| US20060091567A1 (en) | Cavity-down Package and Method for Fabricating the same | |
| CN102556938A (en) | Stacked die package structure and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |