CN214474980U - Data calculation processing system, device with system built in and server - Google Patents

Abstract

A data calculation processing system, a device with the system built in and a server comprise: a CPU chip responsible for data operations; a DDR memory which is in bidirectional electrical connection with the CPU chip; the clock module is used for providing a clock function required by the mainboard and providing the clock function for the PHY communication chip, the USB unit and the SATA interface controller; a PWR power supply; the PHY communication chip is connected with the CPU chip through a PCIE high-speed interface to realize bidirectional communication, and the PHY communication chip provides a self-adaptive gigabit RJ45 interface; the peripheral equipment interconnection bus slot is electrically connected with the CPU chip in a bidirectional way to realize bidirectional communication; the hard disk is electrically connected with the CPU chip in a bidirectional way; and the Flash storage chip is connected with the CPU chip through the QSPI interface to realize bidirectional communication. The utility model has the advantages of according to the processing speed faster, more steady, external interface type is abundanter, user experience is more excellent.

Description

Data calculation processing system, device with system built in and server

Technical Field

The utility model belongs to data calculation processing field, concretely relates to data calculation processing system and built-in this system's device and server.

Background

With the continuous development of science and technology, computers are widely applied to daily office work. The core index of the computer is the quality of the data computing and processing system, and the quality of the data computing and processing system directly determines the experience of a user. In the technical field of computers, particularly to the field of data computing processing, the use platform, the solution, the performance, the reliability and other aspects of the domestic desktop terminal existing in the current market are all insufficient, and the customer experience is urgently needed to be improved by optimizing the insufficiency or partial insufficiency, so that the product competitiveness is improved.

In order to meet the requirements, the utility model provides a data calculation processing system and built-in device, the server of this system. The data computing processing system is reconstructed, the layout structure is optimized, various external input and input interfaces are provided, the performance of the data computing processing system is greatly improved, and the customer experience is improved.

SUMMERY OF THE UTILITY MODEL

The utility model provides a data calculation processing system and built-in this system's device, server. The method aims to make up for the defects of using a platform, solving schemes, performance, reliability and the like in the field of data calculation and processing at present, and improve the user experience of users.

In order to achieve the above object, the present invention provides a data calculation processing system, which includes: a CPU chip responsible for data operations; a DDR memory which is in bidirectional electrical connection with the CPU chip; the clock module provides a clock function required by the mainboard and also provides a clock function for the PHY communication chip, the USB unit and the SATA interface controller; a PWR power supply; the PHY communication chip is connected with the CPU chip through a PCIE high-speed interface to realize bidirectional communication, and the PHY communication chip provides a self-adaptive gigabit RJ45 interface; the peripheral equipment interconnection bus slot is electrically connected with the CPU chip in a bidirectional way to realize bidirectional communication; the hard disk is electrically connected with the CPU chip in a bidirectional way; the Flash storage chip is connected with the CPU chip through the QSPI interface to realize bidirectional communication; the BIOS program is booted to normally start by providing a storage space for the BIOS program; a logic unit which is electrically connected with the CPU chip in a bidirectional manner; the RS-232 standard interface is electrically connected with the CPU chip in a bidirectional way and is connected with an external asynchronous serial port; the audio control interface is electrically connected with the CPU chip in a bidirectional way and provides an audio input interface and an audio output interface to the outside; the SATA interface controller is electrically connected with the CPU chip in a bidirectional way; and the USB unit is bidirectionally connected with the CPU chip through a PCle protocol and provides an external storage interface.

Furthermore, the USB unit includes a USB interface controller, a USB integrator, a USB2.0 interface, and a USB3.0 interface, where the USB interface controller is connected to the USB integrator in two ways, and the USB integrator provides 4 USB2.0 interfaces.

Further, the USB interface controller directly provides 2 USB2.0 interfaces and 2 USB3.0 interfaces to the outside.

Further, the logic unit comprises an EC logic component, a fan, an EC firmware memory chip, a reset key and a power-on/power-off key, the EC logic component is respectively in bidirectional communication connection with the fan, the EC firmware memory chip, the reset key and the power-on/power-off key, and the EC logic component controls the power-on time sequence of the mainboard and the identification of the fan rotating speed, the reset key and the power-on/power-off key.

Further, the SATA interface controller provides 3 SATA interfaces to the outside.

Further, the hard disk is a solid state disk.

Further, the hard disk may be a hybrid hard disk.

Further, the apparatus comprises at least one data computing processing system as described in any above.

Further, the server includes at least one data computing processing system as described in any above.

Compared with the prior art, the utility model discloses have following a bit: 1. the data processing speed of the data computing and processing system is higher and more stable; 2. the external interface type is more abundant; 3. the user experience is better.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

FIG. 1 is a schematic diagram of a USB unit.

Fig. 2 is a schematic diagram of a logic cell structure.

Fig. 3 is a schematic structural diagram of a data computing processing system of the present invention.

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Please refer to fig. 1 to 3. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the invention in a schematic manner, and only the components related to the invention are shown in the drawings rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, quantity and proportion of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.

The first embodiment.

As shown in fig. 1, the present embodiment provides a schematic diagram of a unit structure.

USB, an abbreviation for Universal Serial Bus (USB), is an external Bus standard used to standardize the connection and communication between computers and external devices. Is an interface technology applied in the field of PC.

The USB2.0 technical specification is formulated and issued by Comaq, Hewlett Packard, Intel, Lucent, Microsoft, NEC and Philips, and the specification improves the peripheral data transmission speed to 480Mbps, which is 40 times of that of the USB 1.1 equipment.

USB3.0 also provides several enhanced functions, while maintaining compatibility with USB2.0, as follows: 1. the bandwidth is greatly improved; 2. better power management is realized; 3. the host can provide more power for the device, thereby realizing the application of USB, such as rechargeable battery, LED illumination, mini fan and the like; 4. the host can be enabled to identify the device more quickly; 5. the new protocol makes the data processing more efficient. USB3.0 can transfer large capacity files (e.g., HD movies) at storage rates defined by the storage device. For example, a flash drive using USB3.0 can transfer 1GB of data to a host in 15 seconds, while USB2.0 requires 43 seconds.

The utility model discloses a USB unit includes USB interface controller, USB integrator, USB2.0 interface and USB3.0 interface, USB interface controller and USB integrator both way junction, the USB integrator provide 4 USB2.0 interfaces. The USB interface controller directly provides 2 USB2.0 interfaces and 2 USB3.0 interfaces for the outside.

The experience of the user is increased from the aspects of the number of the USB interfaces and the types of the USB interfaces.

Example two.

As shown in fig. 2, the present embodiment provides a schematic diagram of a logic unit structure.

The full name of the EC is Embedded Controller. It is actually a single chip microcomputer, which is commonly used in notebook computers for keyboard control, touch panel, power management, fan control, notebook battery management and other functions, so although for notebook users, EC is generally invisible, it plays an important role. The EC chip is typically a stand-alone chip and contains software that runs independently, stored in its own non-volatile medium.

The utility model discloses a logic unit includes EC logic unit, fan, EC firmware memory chip, the button that resets and start/shutdown button, EC logic unit control mainboard go up the electric chronogenesis, fan rotational speed, the button that resets and start/shutdown button's discernment. The EC logic component is in bidirectional communication with the CPU chip to implement feedback data. Meanwhile, the EC logic component is in bidirectional communication with the fan, the EC firmware storage chip, the reset key and the power-on/power-off key.

Example three.

As shown in fig. 3, the present embodiment provides a schematic structural diagram of a data computing processing system.

The data computing processing system shown in FIG. 3, comprising: a CPU chip responsible for data operations; a DDR memory which is in bidirectional electrical connection with the CPU chip; the clock module provides a clock function required by the mainboard and also provides a clock function for the PHY communication chip, the USB unit and the SATA interface controller; a PWR power supply; the PHY communication chip is connected with the CPU chip through a PCIE high-speed interface to realize bidirectional communication, and the PHY communication chip provides a self-adaptive gigabit RJ45 interface; the peripheral equipment interconnection bus slot is electrically connected with the CPU chip in a bidirectional way to realize bidirectional communication; the hard disk is electrically connected with the CPU chip in a bidirectional way; the Flash storage chip is connected with the CPU chip through the QSPI interface to realize bidirectional communication; the BIOS program is booted to normally start by providing a storage space for the BIOS program; a logic unit which is electrically connected with the CPU chip in a bidirectional manner; the RS-232 standard interface is electrically connected with the CPU chip in a bidirectional way and is connected with an external asynchronous serial port; the audio control interface is electrically connected with the CPU chip in a bidirectional way and provides an audio input interface and an audio output interface to the outside; the SATA interface controller is electrically connected with the CPU chip in a bidirectional way; and the USB unit is bidirectionally connected with the CPU chip through a PCle protocol and provides an external storage interface.

The PWR power supply module is a dual power supply redundant design. If the power supply fails during working, the system stops running and waits for the maintenance or replacement of the power supply, so that the running efficiency of the system is affected; the redundant power supply is used for a server and consists of two identical power supplies, the chip controls the power supplies to carry out load balancing, when one power supply fails, the other power supply can take over the work of the other power supply, and after the power supplies are replaced, the two power supplies work in a cooperative mode. The redundant power supplies are to achieve high availability of the server system.

The USB unit comprises a USB interface controller, a USB integrator, a USB2.0 interface and a USB3.0 interface, wherein the USB interface controller is in bidirectional connection with the USB integrator, and the USB integrator provides 4 USB2.0 interfaces. The USB interface controller directly provides 2 USB2.0 interfaces and 2 USB3.0 interfaces for the outside. The user can add corresponding USB interfaces according to application scenes.

The logic unit comprises an EC logic component, a fan, an EC firmware memory chip, a reset key and a power-on/power-off key, wherein the EC logic component is respectively in bidirectional communication connection with the fan, the EC firmware memory chip, the reset key and the power-on/power-off key, and controls the power-on time sequence of the mainboard, the fan rotating speed, the reset key and the identification of the power-on/power-off key.

The SATA interface controller provides 3 SATA interfaces to the outside. The SATA interface can be extended as needed.

The hard disk can be a solid state hard disk or a hybrid hard disk.

The device comprises the data computing and processing system, and a circuit board inside the device is used as a carrier. The other hardware configuration of the apparatus is not particularly limited. The device provided by the utility model has the relevant necessary hardware structures such as shell, antenna that general device possessed.

A server is provided, which comprises the data computing and processing system, and takes a circuit board inside the server as a carrier. The other hardware configuration of the server is not particularly limited. The utility model provides a server has the relevant necessary hardware structures such as shell, antenna that general server possessed.

The embodiments described above are only a part of the embodiments of the present invention, and not all of them. The components of embodiments of the present invention, as generally described and illustrated herein and in the figures, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other changes or substitutions obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

Claims (9)

1. A data computing processing system, comprising:

a CPU chip responsible for data operations;

a DDR memory which is in bidirectional electrical connection with the CPU chip;

the clock module is used for providing a clock function required by the mainboard and providing the clock function for the PHY communication chip, the USB unit and the SATA interface controller;

a PWR power supply;

the PHY communication chip is connected with the CPU chip through a PCIE high-speed interface to realize bidirectional communication, and the PHY communication chip provides a self-adaptive gigabit RJ45 interface;

the peripheral equipment interconnection bus slot is electrically connected with the CPU chip in a bidirectional way to realize bidirectional communication;

the hard disk is electrically connected with the CPU chip in a bidirectional way;

the Flash storage chip is connected with the CPU chip through the QSPI interface to realize bidirectional communication; the BIOS program is booted to normally start by providing a storage space for the BIOS program;

a logic unit which is electrically connected with the CPU chip in a bidirectional manner;

the RS-232 standard interface is electrically connected with the CPU chip in a bidirectional way and is connected with an external asynchronous serial port;

the audio control interface is electrically connected with the CPU chip in a bidirectional way and provides an audio input interface and an audio output interface to the outside;

the SATA interface controller is electrically connected with the CPU chip in a bidirectional way;

and the USB unit is bidirectionally connected with the CPU chip through a PCle protocol and provides an external storage interface.

2. The data processing system of claim 1, wherein the USB unit comprises a USB interface controller, a USB integrator, a USB2.0 interface, and a USB3.0 interface, the USB interface controller being bi-directionally coupled to the USB integrator, the USB integrator providing 4 USB2.0 interfaces.

3. The data processing system of claim 2, wherein the USB interface controller provides 2 USB2.0 interfaces and 2 USB3.0 interfaces externally.

4. The data computing processing system according to claim 1, 2 or 3, wherein the logic unit includes an EC logic component, a fan, an EC firmware memory chip, a reset key, and a power on/off key, the EC logic component is respectively connected to the fan, the EC firmware memory chip, the reset key, and the power on/off key in a bidirectional communication manner, and the EC logic component controls a power on timing sequence of the motherboard, and the identification of the fan speed, the reset key, and the power on/off key.

5. The data processing system of claim 4, wherein the SATA interface controller provides 3 SATA interfaces externally.

6. The data computing processing system of claim 5, wherein the hard disk is a solid state disk.

7. The data computing processing system of claim 5, wherein the hard disk is a hybrid hard disk.

8. An apparatus, characterized in that it comprises at least a data computing processing system according to any one of claims 1 to 7.

9. A server, characterized in that it comprises at least a data computing processing system according to any one of claims 1 to 7.

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