CN214429541U - Receiving channel self-checking circuit - Google Patents

Receiving channel self-checking circuit Download PDF

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Publication number
CN214429541U
CN214429541U CN202022884066.5U CN202022884066U CN214429541U CN 214429541 U CN214429541 U CN 214429541U CN 202022884066 U CN202022884066 U CN 202022884066U CN 214429541 U CN214429541 U CN 214429541U
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receiving
self
channel
circuit
checking
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CN202022884066.5U
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Chinese (zh)
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王伟涛
汪涛
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Shaanxi Fenghuo Electronics Co Ltd
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Shaanxi Fenghuo Electronics Co Ltd
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Abstract

The utility model discloses a receiving channel self-checking circuit, which comprises a transmitting channel circuit, a receiving channel circuit and a receiving self-checking control circuit; the transmitting channel circuit and the receiving channel circuit are part of a radio frequency transceiving channel; when receiving self-checking, the digital signal processing circuit controls the transmitting channel to work in an ultra-small power transmitting state and controls the receiving and transmitting switch to be set high, at the moment, the GAIN pin of the AD607 chip of the receiving channel circuit generates an AGC voltage signal, the voltage is transmitted to an ADC in an ARM for sampling, and the receiving self-checking control logic is compared with a self-checking threshold value arranged in the ARM, so that the self-checking of the receiving channel is completed; the utility model omits a crystal oscillator, an attenuation and a comparison circuit required by the traditional receiving channel self-checking, and saves the design cost of a receiving self-checking special circuit; in the debugging process, the AGC voltage state of the working of the receiving channel can be directly sampled and output through the serial port, and reference is provided for the fault analysis of the receiving channel.

Description

Receiving channel self-checking circuit
Technical Field
The utility model relates to a receiving channel self-checking design especially relates to the BIT design in radio frequency communication circuit field. And more particularly to a receive channel self-test circuit.
Background
The BIT is built-in test, and the general onboard communication equipment has the functions of fault detection and fault isolation and can record, alarm and indicate fault information and derive the fault information. The BIT design is the basis of testability and maintainability of electronic equipment, and for a radio frequency receiving channel BIT, a special self-checking circuit is required to be designed in general.
The self-checking function of the traditional receiving channel consists of a power supply control circuit, a comparison circuit, a crystal oscillator circuit and an attenuation circuit. The crystal oscillator circuit and the attenuation circuit realize the generation of radio frequency excitation signals required by receiving self-checking; the comparison circuit compares the gain control input voltage (AGC) generated by the reception channel circuit AD607, and outputs a high level if the comparison voltage is greater than a comparison threshold, and otherwise outputs a low level. Because the phase difference of the gain control voltage generated by the AD607 chip is more than 0.5V at the limit temperature (-55 ℃ to +70 ℃), in order to reduce the false alarm rate of the circuit self-detection, the receiving self-detection input radio frequency signal is required to be larger, thereby causing the confidence coefficient of the BIT test of the receiving channel to be reduced.
SUMMERY OF THE UTILITY MODEL
In order to overcome the above-mentioned defects of the prior art, the utility model provides a receive channel self-checking circuit.
A receiving channel self-checking circuit comprises a transmitting channel circuit, a receiving channel circuit and a receiving self-checking control circuit; the transmitting channel circuit and the receiving channel circuit are part of a radio frequency transceiving channel;
when receiving self-checking, the digital signal processing circuit controls the transmitting channel to work in an ultra-small power transmitting state and controls the receiving and transmitting switch to be set high, at the moment, the GAIN pin of the AD607 chip of the receiving channel circuit generates an AGC voltage signal, the voltage is transmitted to an ADC in an ARM for sampling, and the receiving self-checking control logic is compared with a self-checking threshold value arranged in the ARM, so that the self-checking of the receiving channel is completed;
the receiving self-checking control circuit comprises a first mixer, an amplifier, a power amplifier and a first filter which are connected in sequence; the receiving and transmitting switch is respectively connected with the first filter, the antenna and the low-noise amplifier;
the receiving and transmitting change-over switch is composed of a PIN diode and a choke inductor, and radio frequency small signals required by self-checking can smoothly enter a receiving channel after receiving and transmitting work at the same time.
The digital signal processing circuit controls the power-on work of the receiving channel and the transmitting channel, the logic circuit generates a small-amplitude 10.7MHz intermediate frequency signal, and the small-amplitude intermediate frequency signal is up-converted and amplified by the transmitting channel to be used as a radio frequency input signal for receiving self-checking.
And the AGC voltage of an AD607 chip in the receiving channel is connected to an ADC pin in the ARM, and the self-checking function of the receiving channel is realized through logic judgment.
The utility model discloses a technological effect and advantage:
a) the cost is low: the crystal oscillator, the attenuation and comparison circuit required by the traditional receiving channel self-checking are eliminated, so that the design cost of the receiving self-checking special circuit is saved;
b) the use is flexible: in the debugging process, the AGC voltage state of the working of the receiving channel can be directly sampled and output through the serial port, and reference is provided for the fault analysis of the receiving channel;
c) the reliability is high: because there is no special hardware self-checking circuit, but the existing receiving and transmitting channel is used, only the logical judging mode is added, and the working reliability of the radio station is improved.
Drawings
Fig. 1 is a circuit diagram of the receiving channel of the present invention;
FIG. 2 is a schematic diagram of the transmitting channel of the present invention;
FIG. 3 is a receive self test logic diagram;
FIG. 4 is a functional block diagram of a receive self test circuit;
fig. 5 is a PIN diode switch circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely below, and it should be understood that the described embodiments are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Example 1:
a receiving channel self-checking circuit as shown in fig. 1 to fig. 5 includes a transmitting channel circuit, a receiving channel circuit, and a receiving self-checking control circuit; the transmitting channel circuit and the receiving channel circuit are part of a radio frequency transceiving channel;
when receiving self-checking, the digital signal processing circuit controls the transmitting channel to work in an ultra-small power transmitting state and controls the receiving and transmitting switch to be set high, at the moment, the GAIN pin of the AD607 chip of the receiving channel circuit generates an AGC voltage signal, the voltage is transmitted to an ADC in an ARM for sampling, and the receiving self-checking control logic is compared with a self-checking threshold value arranged in the ARM, so that the self-checking of the receiving channel is completed; a schematic block diagram of the receive self test circuit is shown in fig. 4.
The receiving self-checking control circuit comprises a first mixer, an amplifier, a power amplifier and a first filter which are connected in sequence; the receiving and transmitting switch is respectively connected with the first filter, the antenna and the low-noise amplifier;
as shown in fig. 5, the transmit-receive switch is composed of a PIN diode and a choke inductor, so that a radio frequency small signal required for self-checking smoothly enters a receiving channel after the transmit-receive switch works simultaneously.
Example 2:
the digital signal processing circuit controls the power-on work of the receiving channel and the transmitting channel, the logic circuit generates a small-amplitude 10.7MHz intermediate frequency signal, and the small-amplitude intermediate frequency signal is up-converted and amplified by the transmitting channel to be used as a radio frequency input signal for receiving self-checking.
Example 3:
and the AGC voltage of an AD607 chip in the receiving channel is connected to an ADC pin in the ARM, and the self-checking function of the receiving channel is realized through certain logic judgment. The receive self test logic description is shown in figure 3.
The points to be finally explained are: first, in the description of the present application, it should be noted that, unless otherwise specified and limited, the terms "mounted," "connected," and "connected" should be understood broadly, and may be a mechanical connection or an electrical connection, or a communication between two elements, and may be a direct connection, and "upper," "lower," "left," and "right" are only used to indicate a relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may be changed;
the above description is only for the preferred embodiment of the present invention and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (4)

1. A receive channel self-test circuit, comprising: the receiving channel circuit comprises a transmitting channel circuit, a receiving channel circuit and a receiving self-checking control circuit; the transmitting channel circuit and the receiving channel circuit are part of a radio frequency transceiving channel;
when receiving self-checking, the digital signal processing circuit controls the transmitting channel to work in an ultra-small power transmitting state and controls the receiving and transmitting switch to be set high, at the moment, the GAIN pin of the AD607 chip of the receiving channel circuit generates an AGC voltage signal, the voltage is transmitted to an ADC in an ARM for sampling, and the receiving self-checking control logic is compared with a self-checking threshold value arranged in the ARM, so that the self-checking of the receiving channel is completed;
the receiving self-checking control circuit comprises a first mixer, an amplifier, a power amplifier and a first filter which are connected in sequence; the receiving and transmitting switch is respectively connected with the first filter, the antenna and the low-noise amplifier.
2. A receive channel self-test circuit as claimed in claim 1, wherein: the receiving and transmitting change-over switch is composed of a PIN diode and a choke inductor, and radio frequency small signals required by self-checking can smoothly enter a receiving channel after receiving and transmitting work at the same time.
3. A receive channel self-test circuit as claimed in claim 1, wherein: the digital signal processing circuit controls the power-on work of the receiving channel and the transmitting channel, the logic circuit generates a small-amplitude 10.7MHz intermediate frequency signal, and the small-amplitude intermediate frequency signal is up-converted and amplified by the transmitting channel to be used as a radio frequency input signal for receiving self-checking.
4. A receive channel self-test circuit as claimed in claim 1, wherein: and the AGC voltage of an AD607 chip in the receiving channel is connected to an ADC pin in the ARM, and the self-checking function of the receiving channel is realized through logic judgment.
CN202022884066.5U 2020-12-05 2020-12-05 Receiving channel self-checking circuit Active CN214429541U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202022884066.5U CN214429541U (en) 2020-12-05 2020-12-05 Receiving channel self-checking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202022884066.5U CN214429541U (en) 2020-12-05 2020-12-05 Receiving channel self-checking circuit

Publications (1)

Publication Number Publication Date
CN214429541U true CN214429541U (en) 2021-10-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202022884066.5U Active CN214429541U (en) 2020-12-05 2020-12-05 Receiving channel self-checking circuit

Country Status (1)

Country Link
CN (1) CN214429541U (en)

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