CN214376445U

CN214376445U - Anti-theft circuit and server

Info

Publication number: CN214376445U
Application number: CN202120826362.1U
Authority: CN
Inventors: 廖晟辉
Original assignee: Shandong Yingxin Computer Technology Co Ltd
Current assignee: Shandong Yingxin Computer Technology Co Ltd
Priority date: 2021-04-21
Filing date: 2021-04-21
Publication date: 2021-10-08
Anticipated expiration: 2031-04-21

Abstract

The utility model provides a theftproof circuit and server, which comprises a controller, the controller is BMC or CPLD, the theftproof circuit still includes switch circuit and latch, switch circuit's output and controller are connected respectively to the latch, intrusion signal is connected to switch circuit's input. The utility model discloses a latch latches the intrusion signal, even also can take notes the intrusion signal under the not electrified circumstances of server, effectively prevents the stolen risk that reaches virus invasion computer lab of data, guarantees the safe operation of server.

Description

Anti-theft circuit and server

Technical Field

The utility model belongs to the technical field of the safe technique of server and specifically relates to an anti-theft circuit and server.

Background

With the progress of modern science and technology, the market of the server is increasingly huge at present, the architecture of the server platform is also increasingly larger, various eight-door processor chips, logic chips, power chips and the like are also increasingly provided, the design is complex, and the chips respectively have own software. Security is therefore also becoming increasingly important.

The server provides a group of circuits in hardware design, and when the server case is opened for invasion, a signal is sent to inform a Management chip BMC (Baseboard Management Controller) of the server to record the invasion time, and timely server protection measures are taken to record the invasion log.

In fact, in the process that the server is transported to the machine room, the BMC end does not work, and at this time, there is no way to record the log of the intrusion of the enclosure on the motherboard, so that the software information and the hard disk data on the motherboard cannot be stolen after the intrusion is prevented, and even the tampering and the implantation of the virus can be performed, and the operation of the whole machine room server can be paralyzed by the virus after the server is transported to the machine room. That is, the existing chassis can only record the intrusion condition of the chassis in the power-on state, and cannot effectively prevent or detect the risk of intrusion in the transportation process.

SUMMERY OF THE UTILITY MODEL

The utility model provides a theftproof circuit and server for solve the unable effectual prevention of current quick-witted case or listen the problem of being transported the in-process by the invasion risk.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

the utility model discloses the first aspect provides a theftproof circuit, which comprises a controller, the controller is BMC or CPLD (Complex Programmable Logic Device), the theftproof circuit still includes switch circuit and latch, switch circuit's output and controller are connected respectively to the latch, intrusion signal is connected to switch circuit's input.

Further, the latch comprises a first nor gate and a second nor gate, wherein the input end of the first nor gate is respectively connected with the intrusion signal and the output end of the second nor gate, and the input end of the second nor gate is respectively connected with the reset signal and the input end of the first nor gate.

Furthermore, the switch circuit comprises a triode, the base electrode of the triode is connected with the intrusion signal, the source electrode of the triode is grounded, the collector electrode of the triode is connected with the input end of the first NOR gate, and the intrusion signal is output to the first NOR gate.

Furthermore, the anti-theft circuit further comprises pull-up resistors R1 and R2, the pull-up resistor R1 is respectively connected with the base electrode of the triode and the power supply, and the pull-up resistor R2 is respectively connected with the collector electrode of the triode and the power supply.

Further, the reset signal is also connected with the controller.

The utility model discloses the second aspect provides a server, the server is equipped with the theftproof circuit.

The effects provided in the contents of the present invention are only the effects of the embodiments, not all the effects of the present invention, and one of the above technical solutions has the following advantages or advantageous effects:

the utility model discloses a latch latches the intrusion signal, even also can take notes the intrusion signal under the not electrified circumstances of server, effectively prevents the stolen risk that reaches virus invasion computer lab of data, guarantees the safe operation of server.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a circuit diagram of an embodiment of the present invention.

Detailed Description

In order to clearly illustrate the technical features of the present invention, the present invention is explained in detail by the following embodiments in combination with the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily limit the invention.

The utility model discloses an anti-theft circuit, including controller, switch circuit and latch, the controller is BMC or CPLD, switch circuit's output and controller are connected respectively to the latch, intrusion signal is connected to switch circuit's input.

As shown in fig. 1, the Latch includes a first nor gate U1 and a second nor gate U2, wherein inputs of the first nor gate U1 are respectively connected to an intrusion signal (intrusion) and an output of the second nor gate, and an input of the second nor gate U2 is respectively connected to a Reset signal (Latch Reset) and an input of the first nor gate U1.

The switch circuit comprises a triode, the base electrode of the triode is connected with an intrusion signal acquisition end FP _ Board through a 0 ohm resistor, the source electrode of the triode is grounded, the collector electrode of the triode is connected with the input end of a first NOR gate U1 through a 0 ohm resistor, and an intrusion signal is output to the first NOR gate.

The anti-theft circuit further comprises pull-up resistors R1 and R2, the pull-up resistor R1 is connected with the base electrode of the triode and the 3.3V power supply respectively, and the pull-up resistor R2 is connected with the collector electrode of the triode and the 3.3V power supply respectively.

The Reset signal Latch Reset is also connected to the controller.

When being invaded in the machine case transportation process, through the utility model discloses a theftproof circuit locks INTRUSION's signal, even if the invader covers the machine case again, the signal still can be latched. After the server is started, the BMC or the CPLD controller firstly confirms whether the signal is invaded or not at the first time, if the sign of invasion is found after the signal is read, the BMC and the CPLD of the server immediately erase all data on the server and prevent the server from being started, and therefore the malicious person is prevented from implanting viruses. The truth table for the signal design decision is shown in table 1 below. When the intrusion signal INTRUDER and the reset signal Latch are both 0, the result (Remark) is that the intrusion is not performed, and the normal program is started; when the intrusion signal is 0 and the reset signal is 1, resetting the latch is realized; judging the invasion when the invasion signal is 1 and the reset signal is 0, and forming a Latch signal; when the intrusion signal is 1 and the reset signal is 1, the NC is deactivated.

Before the controller is started, whether an intrusion signal exists is judged firstly, if yes, the south bridge power supply enable is not sent out, the server is prevented from being further powered on, the server cannot enter a starting program at the moment, and the running safety is guaranteed.

The utility model also provides a server that is equipped with the theftproof circuit.

Although the present invention has been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without inventive work are still within the scope of the present invention.

Claims

1. The anti-theft circuit is characterized by further comprising a switch circuit and a latch, wherein the latch is respectively connected with the output end of the switch circuit and the controller, and the input end of the switch circuit is connected with an intrusion signal.

2. The anti-theft circuit of claim 1, wherein the latch comprises a first nor gate and a second nor gate, wherein inputs of the first nor gate are connected to the intrusion signal and an output of the second nor gate, respectively, and wherein inputs of the second nor gate are connected to the reset signal and an input of the first nor gate, respectively.

3. The anti-theft circuit according to claim 2, wherein the switching circuit comprises a triode, a base of the triode is connected with the intrusion signal, a source of the triode is grounded, a collector of the triode is connected with the input end of the first NOR gate, and the intrusion signal is output to the first NOR gate.

4. The anti-theft circuit according to claim 3, further comprising pull-up resistors R1 and R2, wherein the pull-up resistor R1 is connected to the base of the triode and the power supply, respectively, and the pull-up resistor R2 is connected to the collector of the triode and the power supply, respectively.

5. The anti-theft circuit of claim 2, wherein said reset signal is further coupled to a controller.

6. A server, characterized in that the server is provided with an anti-theft circuit according to any one of claims 1-5.