CN214315049U

CN214315049U - High-power staggered continuous mode PFC circuit for plant light supplement lamp

Info

Publication number: CN214315049U
Application number: CN202023256421.0U
Authority: CN
Inventors: 都金龙; 乔凯; 汪平; 张黎晨
Original assignee: Megaphoton Inc
Current assignee: Megaphoton Inc
Priority date: 2020-12-29
Filing date: 2020-12-29
Publication date: 2021-09-28
Anticipated expiration: 2030-12-29

Abstract

The utility model provides a plant light filling lamp is with crisscross continuous mode PFC circuit of high-power, it includes EMI filter circuit, rectifier circuit, Boost circuit, control circuit, EMI filter circuit input inserts alternating voltage, EMI filter circuit output is connected to the rectifier circuit input, the rectifier circuit output is connected with Boost circuit input, Boost circuit is controlled by control circuit, control circuit sends the switch operating condition of switch control signal with the switch tube of control Boost circuit to Boost circuit, thereby constitute the high-power crisscross continuous mode PFC circuit. The utility model has smaller current ripple, improves the reliability of the whole system, has lower requirement on the capacity of the output filter capacitor, and reduces the size of the EMI filter; the circuit board has double overvoltage protection, adopts a sensorless current shaping technology, simplifies the layout of the circuit board, improves the efficiency, and can effectively reduce the cost while improving the efficiency; and a PFC circuit of a larger power can be realized.

Description

High-power staggered continuous mode PFC circuit for plant light supplement lamp

Technical Field

The utility model relates to a power electronic technology field especially relates to a plant light filling lamp is with crisscross continuous mode PFC circuit of high-power, mainly uses on high-power plant light filling lamp ballast, also can use on high-power LED power.

Background

After the alternating current passes through the rectifying and filtering circuit, the nonlinear load can cause the distortion of injected current and the asynchronization of voltage waveform, and large harmonic waves can exist, so that the working efficiency and the power factor of the whole current are reduced. And also generates external radiation and conduction interference. Therefore, a Power Factor Correction (PFC) circuit is required to reduce current harmonics and improve the power factor and the operating efficiency of the power supply. The operation modes of the power factor correction circuit commonly used at present mainly include the following three modes: the method comprises the following steps of (1) a CRM critical mode, (ii) a DCM current discontinuous type, and (iii) a CCM current continuous mode.

The CRM critical conduction type control mode detects the inductive current through the controller, and when the inductive current is detected to be zero, the switch tube is closed. The switch tube always needs equal inductance current to zero to control the conduction. Its operating frequency is variable, inductor current must be sensed, its control system is sensitive to conduction-induced noise, and it is difficult to achieve good EMI.

The DCM current discontinuous mode has stable switching frequency, the input current automatically tracks voltage and keeps smaller current distortion rate, the requirement on a fly-wheel diode is low, a power switch tube realizes Zero Current (ZCS) opening without bearing reverse recovery current of the diode, the input and output current ripples are larger, the requirement on a filter circuit is high, the peak current is higher than the average current, a device bears larger stress, and the power application range of the device is limited.

The CCM current continuous mode and the switching frequency are stable, the structure of the traditional single-stage power factor correction circuit is relatively simple, and the circuit consists of a switching tube and a set of corresponding control circuits, and can simultaneously realize the shaping of input current and the regulation of output voltage. The cost is also reduced, but some bad places are also provided, namely input current harmonic distortion exists, the integral performance is reduced, and the method is not suitable for high-power occasions.

SUMMERY OF THE UTILITY MODEL

The utility model mainly aims at providing a plant is crisscross continuous mode PFC circuit of high power for light filling lamp, it has less electric current ripple, has improved the reliability of entire system, and the requirement to output filter capacitor capacity is lower, has reduced the size of EMI wave filter simultaneously; the circuit board has double overvoltage protection, adopts a sensorless current shaping technology, simplifies the layout of the circuit board and improves the efficiency; the cost can be effectively reduced while the efficiency is improved; and use the utility model discloses can realize more powerful PFC circuit.

In order to realize above-mentioned main purpose, the utility model provides a pair of crisscross continuous mode PFC circuit of high-power for plant light filling lamp, including EMI filter circuit, rectifier circuit, Boost circuit, control circuit, EMI filter circuit input inserts alternating voltage, EMI filter circuit output is connected to the rectifier circuit input, the rectifier circuit output with Boost circuit input is connected, Boost circuit is by control circuit control, control circuit is to Boost circuit sends on-off control signal in order to control the switch operating condition of Boost circuit's switch tube to constitute the crisscross continuous mode PFC circuit of high-power.

Therefore, the input alternating current firstly passes through the EMI filter circuit, then passes through the rectifying circuit to rectify the input alternating current into direct current, and then passes through the BOOST booster circuit, and the control circuit forms the whole PFC circuit with high efficiency and high power factor by controlling the switching working state of a switching tube of the BOOST booster circuit.

Compared with the traditional single-phase continuous conduction mode, the scheme improves the efficiency and the design flexibility. A large amount of buffer circuits are not needed, and low-cost diodes are used. The efficiency is also improved under light load, the transient response is rapid and smooth, the system protection function is expanded, the bias current is reduced, the surge safety current limitation is realized, the switching tube is prevented from being conducted during the surge period, and the reverse recovery event in the output rectifier is eliminated.

Therefore, the utility model discloses demand to the aspect of the audible noise suppression is optimized, has the characteristics of high efficiency low cost, has still improved rated power. Using natural interleaving techniques, both channels can be made to operate as primary channels, synchronized to the same frequency, this scheme itself provides a fast mode with high matching and ensures that each channel operates in switched mode.

In a further scheme, the EMI filter circuit is a pi-type filter composed of a differential mode filter circuit and a common mode filter circuit.

In a further aspect, the differential mode filter circuit includes a differential mode inductor L1, a capacitor C1, a capacitor C2, and a capacitor C3, the common mode filter circuit includes a common mode inductor L2, a capacitor C4, and a capacitor C5, the capacitor C1 is electrically connected to the differential mode inductor L1, the differential mode inductor L1 is electrically connected to the capacitor C2, the capacitor C2 is electrically connected to the common mode inductor L2, the common mode inductor L2 is electrically connected to the capacitor C3, and the capacitor C4 is connected in series with the capacitor C5 and then connected in parallel to the capacitor C3.

Therefore, the pi-type filter is formed by differential mode filtering and common mode filtering, the common mode filtering can filter common mode electromagnetic interference on one hand and inhibit electromagnetic interference which is not emitted outwards on the other hand, the differential mode filtering has large resistance to high frequency interference inductance through a differential mode inductor, and the capacitance to high frequency interference is small, so that differential mode noise can be filtered.

In a further scheme, control circuit includes control chip, input undervoltage detection circuit, output overvoltage crowbar, zero current detection circuit, output voltage detection circuit, soft start circuit, open-loop protection circuit, CS current sampling circuit, control chip respectively with input undervoltage protection circuit, output overvoltage crowbar, zero current detection circuit, output voltage detection circuit, soft start circuit, open-loop protection circuit, CS current sampling circuit connect.

In a further embodiment, the control chip is a chip UCC 28063.

Therefore, the work of the whole circuit is controlled by the chip UCC28063, the staggered work of two switching tubes can be realized, the work efficiency is improved, and the high-power requirement is realized; the UCC28063 can realize the soft start function, so that the circuit is effectively protected; when the output is open loop, the circuit disables the drive while a soft start is triggered.

In a further scheme, the input under-voltage detection circuit comprises a voltage divider electrically connected with the chip UCC28063, and the voltage divider comprises pull-up resistors R15, R15A, R15B and a pull-down resistor R20, wherein the pull-up resistors R15, R15A and R15B are sequentially connected in series and then connected in parallel with the pull-down resistor R20, and are used for dividing a large input voltage signal into a small voltage signal to be input to an input under-voltage detection pin of the chip UCC 28063.

Therefore, input under-voltage locking can be achieved by detecting the input voltage, and the circuit is protected.

In a further scheme, the output voltage detection circuit comprises resistors R3A, R3B, R3C and R21, and a voltage divider formed by the resistors R3A, R3B, R3C and R21 is electrically connected with a pin 2 of the chip UCC 28063.

Therefore, the output voltage is detected and fed back to the control chip, so that the circuit can output a stable voltage.

In a further aspect, the CS current sampling circuit includes resistors R8A, R8, and R5, the resistor R8A is connected in parallel with the resistor R8, and is connected in series with a negative pin of a diode bridge of the rectifying circuit and the resistor R5 to be connected to a pin 10 of the UCC28063 of the chip, where the resistors R8A and R8 are current sampling resistors, and the resistor R5 is a current limiting resistor.

Therefore, the CS current detection is carried out at the negative end of the rectifier bridge, so that the input current can be limited, and the overcurrent protection effect is effectively realized.

In a further scheme, the zero current detection circuit comprises current limiting resistors R4 and R9, a boost inductor L2 and L3, and a power MOS transistor Q1 and Q3, wherein a drain of the power MOS transistor Q1 is connected to an input of the boost inductor L2, a drain of the power MOS transistor Q3 is connected to an input of the boost inductor L3, the current limiting resistors R4 and R9 are respectively connected to zero-crossing detection windings of the boost inductor L2 and L3, and signals are input to pins 1 and 16 of the chip UCC 28063.

Therefore, the input current waveform is enabled to follow the input voltage waveform by detecting the zero current of the inductor and controlling the on and off of the two switching tubes.

In a further scheme, the output overvoltage protection circuit comprises resistors R1, R1A, R2B and R12, a voltage divider is formed by the resistors R1, R1A, R2B and R12, then the output voltage is divided, and the divided voltage is input to pin 8 of the UCC 28063.

Therefore, the output voltage is detected and fed back to the control chip, and when the overvoltage is output, the chip can start the overvoltage protection.

Drawings

Fig. 1 is a schematic diagram of an embodiment of a high-power staggered continuous mode PFC circuit for a plant light supplement lamp according to the present invention.

Fig. 2 is a schematic circuit diagram of a high-power plant light supplement lamp ballast applied in the embodiment of the high-power staggered continuous mode PFC circuit for the plant light supplement lamp of the present invention.

Fig. 3 is a schematic circuit diagram of an embodiment of the high-power staggered continuous mode PFC circuit for the plant light supplement lamp of the present invention.

Fig. 4 is a schematic circuit diagram of an EMI filter circuit in an embodiment of a high-power staggered continuous mode PFC circuit for a plant light supplement lamp of the present invention.

Fig. 5 is a schematic circuit diagram of an input under-voltage detection circuit in an embodiment of a high-power staggered continuous mode PFC circuit for a plant fill-in light of the present invention.

Fig. 6 is a schematic circuit diagram of an output voltage detection circuit in an embodiment of a high-power staggered continuous mode PFC circuit for a plant light supplement lamp.

Fig. 7 is a schematic circuit diagram of a CS current sampling circuit in an embodiment of a high-power interleaved continuous mode PFC circuit for a plant light supplement lamp of the present invention.

Fig. 8 is a schematic circuit diagram of a zero current detection circuit in an embodiment of a high-power staggered continuous mode PFC circuit for a plant light supplement lamp.

Fig. 9 is a schematic circuit diagram of an output overvoltage protection circuit in an embodiment of a high-power staggered continuous mode PFC circuit for a plant light supplement lamp of the present invention.

The present invention will be further explained with reference to the drawings and examples.

Detailed Description

In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the drawings of the embodiments of the present invention are combined below to clearly and completely describe the technical solution of the embodiments of the present invention. It is to be understood that the embodiments described are only some of the embodiments of the present invention, and not all of them. All other embodiments, which can be obtained by a person skilled in the art without any inventive work based on the described embodiments of the present invention, belong to the protection scope of the present invention.

Referring to fig. 1 to fig. 3, the utility model discloses a plant light filling lamp is with crisscross continuous mode PFC circuit of high-power, including EMI filter circuit, rectifier circuit, Boost voltage Boost circuit, a control circuit, EMI filter circuit input inserts alternating voltage, EMI filter circuit output is connected to the rectifier circuit input, the rectifier circuit output is connected with Boost voltage Boost circuit input, Boost voltage Boost circuit is controlled by control circuit, control circuit sends the switch operating condition of on-off control signal with the switch tube of control Boost voltage Boost circuit to Boost voltage Boost circuit, thereby constitute the crisscross continuous mode PFC circuit of high-power.

Therefore, the input alternating current firstly passes through the EMI filter circuit, then passes through the rectifying circuit to rectify the input alternating current into direct current, and then passes through the BOOST booster circuit, and the control circuit forms the whole efficient PFC circuit with high power factor by controlling the switching working state of a switching tube of the BOOST booster circuit.

In this embodiment, the control circuit includes a control chip, an input under-voltage detection circuit, an output over-voltage protection circuit, a zero current detection circuit, an output voltage detection circuit, a soft start circuit, an open-loop protection circuit, and a CS current sampling circuit, and the control chip is connected to the input under-voltage protection circuit, the output over-voltage protection circuit, the zero current detection circuit, the output voltage detection circuit, the soft start circuit, the open-loop protection circuit, and the CS current sampling circuit, respectively.

Further, the control chip is a chip UCC 28063. Therefore, the work of the whole circuit is controlled by the chip UCC28063, the staggered work of two switching tubes can be realized, the work efficiency is improved, and the high-power requirement is realized; the UCC28063 can realize the soft start function, so that the circuit is effectively protected; when the output is open loop, the circuit disables the drive while a soft start is triggered.

In this embodiment, the EMI filter circuit is a pi-type filter composed of a differential mode filter circuit and a common mode filter circuit.

As shown in fig. 4, the differential mode filter circuit includes a differential mode inductor L1, a capacitor C1, a capacitor C2, and a capacitor C3, the common mode filter circuit includes a common mode inductor L2, a capacitor C4, and a capacitor C5, the capacitor C1 is electrically connected to the differential mode inductor L1, the differential mode inductor L1 is electrically connected to the capacitor C2, the capacitor C2 is electrically connected to the common mode inductor L2, the common mode inductor L2 is electrically connected to the capacitor C3, and the capacitor C4 is connected in series with the capacitor C5 and then connected in parallel to the capacitor C3. Therefore, the pi-type filter is formed by differential mode filtering and common mode filtering, the common mode filtering can filter common mode electromagnetic interference on one hand and inhibit electromagnetic interference which is not emitted outwards on the other hand, the differential mode filtering has large resistance to high frequency interference inductance through a differential mode inductor, and the capacitance to high frequency interference is small, so that differential mode noise can be filtered.

As shown in fig. 5, the input brown-out detection circuit includes a voltage divider electrically connected to the chip UCC28063, where the voltage divider includes pull-up resistors R15, R15A, R15B and a pull-down resistor R20, the pull-up resistors R15, R15A and R15B are sequentially connected in series and then connected in parallel with the pull-down resistor R20, and are used to divide a large input voltage signal into a small voltage signal, which is input to the input brown-out detection pin of the chip UCC 28063. Therefore, input under-voltage locking can be achieved by detecting the input voltage, and the circuit is protected.

As shown in fig. 6, the output voltage detection circuit includes resistors R3A, R3B, R3C and R21, and a voltage divider formed by resistors R3A, R3B, R3C and R21 is electrically connected to pin 2 of the UCC 28063. Therefore, the output voltage is detected and fed back to the control chip, so that the circuit can output a stable voltage.

As shown in fig. 7, the CS current sampling circuit includes resistors R8A, R8, and R5, wherein the resistor R8A is connected in parallel with the resistor R8, and is connected in series with a negative pin of a diode bridge of the rectifying circuit and a resistor R5, and then connected to a pin 10 of the chip UCC28063, wherein the resistors R8A and R8 are current sampling resistors, and the resistor R5 is a current limiting resistor. Therefore, the CS current detection is carried out at the negative end of the rectifier bridge, so that the input current can be limited, and the overcurrent protection effect is effectively realized.

As shown in fig. 8, the zero current detection circuit includes current limiting resistors R4 and R9, boost inductors L2 and L3, power MOS transistors Q1 and Q3, wherein the drain of the power MOS transistor Q1 is connected to the input of the boost inductor L2, the drain of the power MOS transistor Q3 is connected to the input of the boost inductor L3, the current limiting resistors R4 and R9 are respectively connected to the zero-crossing detection windings of the boost inductors L2 and L3, and signals are input to pins 1 and 16 of the chip UCC 28063. Therefore, the input current waveform is enabled to follow the input voltage waveform by detecting the zero current of the inductor and controlling the on and off of the two switching tubes.

As shown in fig. 9, the output overvoltage protection circuit includes resistors R1, R1A, R2B, and R12, and a voltage divider is formed by resistors R1, R1A, R2B, and R12, and divides an output voltage, and the divided voltage is input to pin 8 of the UCC 28063. Therefore, the output voltage is detected and fed back to the control chip, and when the overvoltage is output, the chip can start the overvoltage protection.

In practical application, an input alternating current is filtered by an EMI circuit, then rectified to be a direct current, rectified by a PFC circuit, so that the current waveform of the direct current follows the voltage waveform, a high voltage is output to a rear-stage full bridge, the full bridge inverts the direct current into the alternating current, and the alternating current is output to a load. Wherein, the high-power interleaving continuous mode PFC circuit further comprises: CS current sampling circuit, input undervoltage protection circuit, zero current detection circuit, output voltage detection circuit, output overvoltage protection circuit, open loop protection, soft start.

In this embodiment, the EMI filter circuit is a conducted interference filter composed of a common mode filter circuit and a differential mode filter circuit. The common mode filter consists of a common mode inductor L2, a Y capacitor C4 and a Y capacitor C5, the common mode inductor can filter common mode electromagnetic interference on one hand, can inhibit the common mode inductor from emitting electromagnetic interference outwards on the other hand, and the Y capacitor is bridged between an input line and the ground and can also effectively filter the common mode interference. The differential mode filtering consists of a differential mode inductor L1, an X capacitor C1, an X capacitor C2 and an X capacitor C3, wherein the differential mode inductor L1 has high resistance to high-frequency interference, the X capacitor has low resistance to high-frequency interference, and differential mode noise is filtered.

In this embodiment, the input under-voltage detection circuit mainly comprises a voltage divider formed by pull-up resistors R15, R15A, R15B and a pull-down resistor R20, the voltage divider is formed by the pull-up resistor and the pull-down resistor, and divides a large input voltage signal into a small voltage signal, which is input to an input under-voltage detection pin 7 (VINAC) of the UCC28063 chip, and when the time when the voltage of the input under-voltage detection pin is lower than an under-voltage threshold exceeds an under-voltage filtering time, the control chip enters an under-voltage mode, and simultaneously disables two output drivers and triggers a complete soft start. An input voltage divider ratio is selected for a desired undervoltage threshold, and a divider impedance is selected for a desired undervoltage hysteresis based on the hysteresis current. When the time for the input voltage to fall below the droop threshold exceeds the droop filter time, a droop condition will be triggered. During the droop state, the error amplifier will be disabled while the chip internal 4 μ Α internal current source will discharge COMP. When the input voltage exceeds the voltage drop clearing threshold, the voltage drop state can be immediately cleared, and meanwhile, the device recovers to work normally.

In this embodiment, the output voltage detection circuit mainly comprises a voltage divider formed by resistors R3A, R3B, R3C and R21, the voltage across the resistor R21 is connected to the 2-pin (VSENSE) of the UCC28063, in a closed-loop system, the voltage across VSENSE is regulated at the error amplifier reference voltage, the output voltage division ratio is selected for the required output voltage, and the ground terminal of the voltage divider is connected to the Analog Ground (AGND) through an independent short trace, so as to obtain the best output regulation precision and noise suppression performance. Controller operation may be enabled when the VSENSE voltage exceeds the 1.25V enable threshold. VSENSE can be pulled low by an open drain logic output, or a >6V logic output in series with a low leakage diode, to disable the output and reduce VCC current. This input can detect two levels of output overvoltage. When VSENSE exceeds a first-stage overvoltage protection threshold, a 2k omega internal resistor is applied to a chip COMP so as to quickly shorten the gate drive conducting time; when VSENS continues to rise and exceeds a second-level threshold value, the MOS tube drive is immediately locked; when VSENSE is below the OV clear threshold, the lock operation will be cleared; when VSENSE is off, the open loop protection provides an internal current source to pull VSENSE low, disabling the controller and triggering a soft start condition.

In this embodiment, the CS current sampling circuit mainly includes resistors R8A, R8, and R5, resistors R8A and R8 are current sampling resistors, resistor R5 is a current limiting resistor, the sampling resistor and the negative pin of the diode bridge are connected to pin 10 (CS) of the UCC28063 after being connected to a current limiting resistor, and the current sensing resistor loop is connected to the AGND pin through an independent trace. As the input current increases, the negative voltage on CS will become higher. This cycle-by-cycle over-current protection turns off both gate driver outputs (GDx) when the negative voltage on CS exceeds the CS rise threshold (about-200 mV in two-phase operation, about-167 mV in single-phase and phase fault conditions), thereby limiting the input current. The gate drive output will remain low until CS drops to the CS drop threshold (about-15 mV). The current sensing is inactive for about 100ns after the rising and falling edges of either GDx output, which can filter out noise from the gate drive current, noise generated when the inductor current switches from the power FET to the boost diode. In most cases, no additional current sense filtering is required. If external filtering is necessary or to prevent excessive negative voltage on the CS pin due to ac surge conditions, it is proposed to connect a resistor in series between the current sensing resistor and the CS pin. Due to the presence of the CS bias current, the external resistance should be less than 100 Ω to maintain accuracy. If the CS pin is open, its float voltage will be up to about 1.5V, which will be detected and considered a soft start trigger fault condition (CS open).

In this embodiment, the zero-current detection circuit is configured to detect a negative edge when the boost inductor current of each phase becomes zero. The input is clamped between 0V and 3V. The signals are input to pins 1 and 16 of the chip UCC28063 through current limiting resistors R9 and R4 connected to the Zero Crossing Detection (ZCD) windings of the corresponding boost inductors, respectively. The selected resistance value should limit the clamping current to within 3 mA. The polarity of the inductor winding must be properly arranged so that the ZCD voltage can drop when the inductor current decays to zero. When the inductor current drops to zero, the ZCD input must fall below the drop threshold (about 1V) to raise the gate drive output. Subsequently, when the power MOSFET is turned off, the ZCD input must rise above the up threshold (about 1.7V) to define the logic of the other ZCD falling edge.

In this embodiment, the output over-voltage protection circuit mainly comprises a voltage divider formed by resistors R1, R1A, R2B and R12, divides an output voltage, and inputs the divided voltage to pin 8 (HVSEN) of the chip UCC 28063. The utility model discloses the crisscross continuous mode of high-power possesses the fail safe OVP, consequently any kind of trouble can not lead to output voltage to exceed safe level upper limit. The output overvoltage is monitored by both VSENSE and HVSEN, but the action of the two pins is different when the voltages of the two pins exceed the respective overvoltage thresholds. The use of two pins to monitor for overvoltage conditions provides redundancy protection and fault tolerance. When the HVSEN exceeds its over-voltage threshold, a full soft start of the controller is triggered. The HVSEN may also be used to enable downstream power converters when the voltage of the HVSEN pin is within its operating region. When HVSEN is greater than 2.5V, the PWMCNTL output can be driven low (assuming no other faults exist). When HVSEN drops below 2.5V, the PWMCNTL output is in a high impedance state. The HVSEN voltage division ratio is selected for the desired over-voltage threshold and the power supply normal threshold. The HVSEN divider impedance is selected for the desired normal hysteresis of the power supply based on the hysteresis current. During normal operation, HVSEN must not be below 0.8V. When HVSEN is below 0.8V, UCC28063 will enter a special test mode (for factory testing only). It is proposed to connect a bypass capacitor between HVSEN and AGND in order to filter out noise and avoid false overvoltage shutdown.

Since the Boost circuit of the present embodiment is a conventional full-bridge inverter structure, it is not described in detail.

To sum up, the utility model discloses satisfy the high-power electronic ballast demand of plant light filling lamp, solved the problem of power restriction, still possess better EMI characteristic, efficient, power factor height, small in noise and protect function wait together.

Therefore, the utility model discloses a plant light filling lamp is with crisscross continuous mode PFC circuit of high-power, whole circuit includes following several parts: the circuit comprises an EMI filter circuit, a rectifying circuit, a Boost circuit and a control circuit (the control circuit comprises an input undervoltage protection circuit, an output overvoltage protection circuit, a zero current detection circuit, a soft start, an open loop protection circuit and a CS current sampling circuit). The input alternating current firstly passes through the EMI filter circuit, then passes through the rectifying circuit to rectify the input alternating current into direct current, and then passes through the BOOST booster circuit, and the control circuit forms the whole PFC circuit with high efficiency and high power factor by controlling the switching working state of a switching tube of the BOOST booster circuit.

The utility model discloses satisfy high efficiency high power factor's PFC circuit demand, also solved the restricted problem of power simultaneously, possible powerful PFC has satisfied the requirement at high-power ballast circuit to the PFC circuit.

It should be noted that the above is only the preferred embodiment of the present invention, but the design concept of the present invention is not limited thereto, and all the insubstantial modifications made by using the design concept of the present invention also fall within the protection scope of the present invention.

Claims

1. A high-power staggered continuous mode PFC circuit for a plant supplementary lighting lamp is characterized by comprising:

the input end of the EMI filter circuit is connected with alternating voltage, the output end of the EMI filter circuit is connected to the input end of the rectification circuit, the output end of the rectification circuit is connected with the input end of the BOOST booster circuit, the BOOST booster circuit is controlled by the control circuit, and the control circuit sends a switch control signal to the BOOST booster circuit to control the switch working state of a switch tube of the BOOST booster circuit, so that a high-power staggered continuous mode PFC circuit is formed;

the control circuit comprises a control chip, an input under-voltage detection circuit, an output over-voltage protection circuit, a zero current detection circuit, an output voltage detection circuit, a soft start circuit, an open-loop protection circuit and a CS current sampling circuit, wherein the control chip is respectively connected with the input under-voltage protection circuit, the output over-voltage protection circuit, the zero current detection circuit, the output voltage detection circuit, the soft start circuit and the open-loop protection circuit, and the CS current sampling circuit is connected.

2. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 1, wherein:

the EMI filter circuit is a pi-type filter composed of a differential mode filter circuit and a common mode filter circuit.

3. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 2, wherein:

the differential mode filter circuit comprises a differential mode inductor L1, a capacitor C1, a capacitor C2 and a capacitor C3, the common mode filter circuit comprises a common mode inductor L2, a capacitor C4 and a capacitor C5, the capacitor C1 is electrically connected with the differential mode inductor L1, the differential mode inductor L1 is electrically connected with the capacitor C2, the capacitor C2 is electrically connected with the common mode inductor L2, the common mode inductor L2 is electrically connected with the capacitor C3, and the capacitor C4 is connected with the capacitor C5 in series and then connected with the capacitor C3 in parallel.

4. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 1, wherein:

the control chip is a chip UCC 28063.

5. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 4, wherein:

the input under-voltage detection circuit comprises a voltage divider electrically connected with the chip UCC28063, wherein the voltage divider comprises pull-up resistors R15, R15A, R15B and a pull-down resistor R20, the pull-up resistors R15, R15A and R15B are sequentially connected in series and then connected with the pull-down resistor R20 in parallel, and the pull-up resistors are used for dividing a large input voltage signal into a small voltage signal which is input to an input under-voltage detection pin of the chip UCC 28063.

6. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 4, wherein:

the output voltage detection circuit comprises resistors R3A, R3B, R3C and R21, wherein a voltage divider is formed by the resistors R3A, R3B, R3C and R21 and then is electrically connected with a pin 2 of the chip UCC 28063.

7. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 4, wherein:

the CS current sampling circuit comprises resistors R8A, R8 and R5, wherein the resistor R8A is connected with a resistor R8 in parallel, and is connected with a negative pin of a diode bridge of the rectifying circuit in series with the resistor R5 and then connected to a pin 10 of the chip UCC28063, wherein the resistors R8A and R8 are current sampling resistors, and the resistor R5 is a current limiting resistor.

8. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 4, wherein:

the zero current detection circuit comprises current-limiting resistors R4 and R9, boost inductors L2 and L3, power MOS transistors Q1 and Q3, wherein the drain electrode of the power MOS transistor Q1 is connected with the input of the boost inductor L2, the drain electrode of the power MOS transistor Q3 is connected with the input of the boost inductor L3, the current-limiting resistors R4 and R9 are respectively connected to zero-crossing detection windings of the boost inductors L2 and L3, and signals are input to a pin 1 and a pin 16 of the chip UCC 28063.

9. The high-power interleaved continuous mode PFC circuit for the plant fill light of claim 4, wherein:

the output overvoltage protection circuit comprises resistors R1, R1A, R2B and R12, wherein a voltage divider is formed by the resistors R1, R1A, R2B and R12, then the output voltage is divided, and the divided voltage is input to an 8 pin of the UCC28063 chip.