CN214310847U - Magnetic field testing device for semiconductor current density inversion - Google Patents
Magnetic field testing device for semiconductor current density inversion Download PDFInfo
- Publication number
- CN214310847U CN214310847U CN202120037788.9U CN202120037788U CN214310847U CN 214310847 U CN214310847 U CN 214310847U CN 202120037788 U CN202120037788 U CN 202120037788U CN 214310847 U CN214310847 U CN 214310847U
- Authority
- CN
- China
- Prior art keywords
- magnetic field
- current density
- field testing
- contacted
- supporting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The utility model provides a magnetic field testing device for semiconductor current density inversion, which comprises a magnetic field testing component and a crimping component; the compression joint component is used for compressing and connecting the semiconductor chip to be tested; the magnetic field testing component is used for measuring the magnetic field intensity of the crimped tested semiconductor chip, so that the problem that the current density distribution condition inside the high-power crimped semiconductor device is difficult to detect due to the fact that the conventional high-power crimped semiconductor device is generally in a round cake-shaped or square-shaped packaging sealing structure.
Description
Technical Field
The utility model relates to a power semiconductor device tests the field, concretely relates to a magnetic field testing arrangement for semiconductor current density inversion.
Background
With the rapid development of renewable energy sources and direct current power grids, a power conversion technology and a current breaking technology based on a high-power crimping type semiconductor are deeply researched and applied, as core elements, the current and voltage levels of the high-power crimping type semiconductor are the most important application indexes, generally, the high-power crimping type semiconductor is generally used in parallel by a plurality of cells of a whole wafer or a plurality of independent chips cut from the wafer, so that the device fails under the condition of current imbalance possibly occurring during steady-state through current and transient off of the device, and simultaneously, the device maintains long-term short-circuit through current after failure, the current density imbalance is also caused due to uncertain failure points, thereby causing the thermal imbalance of the device, causing the instability of the short-circuit state of the device, and causing great interference to the normal operation of the power grids, but the existing high-power crimping type semiconductor device is generally in a sealing structure of a round cake shape or square package, limited by the sealing structure, the current density distribution inside the device is difficult to detect by a common method, which causes great obstruction to the research and optimization of the device failure mechanism.
SUMMERY OF THE UTILITY MODEL
In order to overcome prior art's defect, the utility model provides a magnetic field testing arrangement for semiconductor current density inversion solves current high-power crimping formula semiconductor device and is the seal structure of pie or square encapsulation usually, is subject to this kind of seal structure, is difficult to detect the problem of the inside current density distribution condition.
The utility model discloses a following technical scheme realizes:
the utility model discloses a magnetic field testing device for semiconductor current density inversion, which comprises a magnetic field testing component and a crimping component;
the compression joint component is used for compressing and connecting the semiconductor chip to be tested;
and the magnetic field testing component is used for measuring the magnetic field intensity of the crimped tested semiconductor chip.
Further, the magnetic field testing assembly comprises a driving device, a driven device and a magnetic field intensity measuring piece;
the magnetic field intensity measuring and fixing piece is arranged at the bottom end of the driven device;
the bottom end of the driven device is arranged close to the periphery of the tested semiconductor chip;
the driving device is connected with the driven device.
Further, the driven device comprises a first rotating disc, a second rotating disc and a rotating disc connecting piece;
the first rotating disc is arranged above the second rotating disc;
the second turntable is arranged close to the periphery of the tested semiconductor chip;
the magnetic field intensity measuring and fixing piece is arranged on the second turntable;
the driving device is connected with the first rotary disc, and the first rotary disc is connected with the second rotary disc through the rotary disc connecting piece.
Furthermore, a first threaded hole is formed in the first rotary table, and a second threaded hole is formed in the second rotary table;
the turntable connecting piece adopts a connecting screw rod;
the top end of the connecting screw rod is in threaded connection with the first threaded hole;
and the bottom end of the connecting screw rod is in threaded connection with the second threaded hole.
Furthermore, a plurality of magnetic field strength measuring and fixing pieces are adopted;
and the magnetic field intensity measuring and fixing pieces are arranged at intervals along the top surface of the second turntable.
Further, the crimping assembly comprises a support frame, a metal conductor and a contact electrode;
the metal conductor comprises a first metal conductor and a second metal conductor, and the contact electrode comprises a first contact electrode and a second contact electrode;
the driving device is placed at the top end of the support frame;
a tested semiconductor chip is placed in the support frame;
the top surface of the tested semiconductor chip is sequentially contacted with the first metal conductor and the first contact electrode from bottom to top;
the bottom surface of the tested semiconductor chip is sequentially contacted with the second metal conductor and the second contact electrode from top to bottom.
Further, the crimping assembly further comprises a heat sink, wherein the heat sink comprises a first heat sink and a second heat sink;
the bottom end of the first radiator is contacted with the top surface of the tested semiconductor chip, and the top end of the first radiator is contacted with the bottom end of the first metal conductor;
the top end of the second radiator is contacted with the bottom surface of the tested semiconductor chip, and the bottom end of the second radiator is contacted with the top end of the second metal conductor.
Further, the crimping assembly further comprises a leading-out copper bar, and the leading-out copper bar comprises a first leading-out copper bar and a second leading-out copper bar;
the first leading-out copper bar is connected with the first contact electrode;
the second leading-out copper bar is connected with the second contact electrode. Further, the supporting frame comprises a supporting bottom plate, a supporting top plate and a plurality of supporting rods,
the driving device is placed on the supporting top plate;
the supporting bottom plate is provided with a blind hole;
the supporting top plate is provided with a through hole;
the bottom ends of the support rods are fixedly connected with the blind holes;
the top ends of the support rods are fixedly connected with the through holes.
Further, the crimping assembly further comprises a pressure equalizing table, wherein the pressure equalizing table comprises a first pressure equalizing table and a second pressure equalizing table;
the bottom end of the first voltage-sharing platform is contacted with the first contact electrode, and the top end of the first voltage-sharing platform is contacted with the supporting top plate;
the bottom end of the second pressure equalizing platform is in contact with the supporting bottom plate, and the top end of the second pressure equalizing platform is in contact with the second contact electrode.
Furthermore, the crimping assembly further comprises a pressure equalizing plate and a pressure equalizing ball;
the pressure equalizing ball is arranged above the first pressure equalizing table, the top end of the pressure equalizing ball is contacted with the bottom end of the pressure equalizing plate, and the bottom end of the pressure equalizing ball is contacted with the top end of the first pressure equalizing table;
the top end of the pressure equalizing plate is contacted with the supporting top plate.
Furthermore, a plurality of arc-shaped slotted holes are formed in the second turntable, and the number of the arc-shaped slotted holes corresponds to that of the supporting rods;
the rod body of the supporting rod correspondingly penetrates through the arc-shaped slotted hole.
Further, the crimping assembly further comprises a heat dissipation water pipe, and the heat dissipation water pipe is connected with the second radiator.
Compared with the closest prior art, the technical scheme of the utility model possess following beneficial effect:
the utility model provides a magnetic field testing arrangement for semiconductor current density inversion can be under the circumstances of the semiconductor packaging structure of being surveyed that does not change the crimping effectively survey near the magnetic field intensity that is close 360 degrees positions of being surveyed the semiconductor, then is used for the inside current density condition of inversion being surveyed the semiconductor.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a block flow diagram of a magnetic field inversion current calculation method for semiconductor current density analysis according to the present embodiment;
FIG. 2 is a schematic diagram of the present embodiment illustrating the partitioning of the thin-line equivalent current clusters in the semiconductor region under test according to rectangular elements;
FIG. 3 is a schematic diagram of the present embodiment illustrating the partitioning of the thin-line equivalent current clusters in the tested semiconductor region by the sector-shaped elements;
FIG. 4 is a diagram showing the magnetic field measurement points Q in the case where the present embodiment divides the thin line equivalent current clusters of the semiconductor region under test for rectangular elementsjThe schematic diagram of the computing principle of the superposed magnetic field is shown;
FIG. 5 is a schematic view of the overall structure of the magnetic field testing apparatus of the present embodiment;
fig. 6 is a sectional view of the magnetic field test apparatus of the present embodiment;
FIG. 7 is a schematic view of the supporting rod of the present embodiment located at the middle position of the arc-shaped slot on the second turntable;
FIG. 8 is a schematic view of the supporting rod of this embodiment located at one end of the arc slot on the second turntable;
FIG. 9 is a schematic view of the supporting rod of this embodiment located at the other end of the arc slot on the second turntable.
Wherein, 1-a semiconductor to be tested, 2-a driving device, 3-a magnetic field intensity measuring piece, 4-1-a first turntable, 4-2-a second turntable, 4-3-a turntable connecting piece, 5-1-a supporting bottom plate, 5-2-a supporting top plate, 5-3-a supporting rod, 6-1-a first metal conductor, 6-2-a second metal conductor, 7-1-a first contact electrode, 7-2-a second contact electrode, 8-1-a first radiator, 8-2-a second radiator, 9-1-a first leading-out copper bar, 9-2-a second leading-out copper bar, 10-1-a first voltage equalizing table and 10-2-a second voltage equalizing table, 11-pressure equalizing plate, 12-pressure equalizing ball, 13-heat dissipation water pipe and 14-bolt.
Detailed Description
The technical solution of the present invention will be described clearly and completely below with reference to the embodiments of the present invention, and it should be understood that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The technical idea of the embodiment is to invert current density information inside a semiconductor to be tested by detecting the change of a magnetic field in a region near the semiconductor to be tested under the condition of not changing the packaging structure of the semiconductor to be tested, and the theoretical basis is as follows: when a cylindrical conductor structure is in through-current, if the current density of a certain thin cylindrical layer is unevenly distributed, the magnetic field component (such as a radial magnetic field component) on the position of a concentric circle coplanar with the thin cylindrical layer has obvious characteristics, under the influence of controlling a peripheral leading-out loop, the magnetic field strength characteristic of the component of the concentric circle close to the periphery of the uneven through-current layer is changed into the most obvious area, and the change characteristics of the component of the concentric circle are not prominent enough due to the superposition influence of the component magnetic fields of other branches in space outwards.
The magnetic field inversion current calculation method for semiconductor current density analysis in the embodiment, as shown in fig. 1, specifically includes the following steps:
1. firstly, an adaptive value function calculation method needs to be determined, which specifically comprises the following steps:
p1 the tangential magnetic field of the designated concentric circle position near the same plane of the semiconductor to be measured is measured by the magnetic field measuring device, and the tangential magnetic field measuring set is obtained, which is as follows:
setting m magnetic field measurement points Q at specified concentric circle positions near the same plane of the semiconductor to be measured1…Qm；
Measuring the m magnetic field measurement points Q by the magnetic field measuring device1…QmAnd measuring the tangential magnetic field to form a tangential magnetic field measurement set.
P2 calculates the superposed magnetic field of the appointed concentric circle position near the same plane of the semiconductor to be measured, and obtains the tangential magnetic field calculation set, which is as follows:
p2-1 carries out region division on the interior of the tested semiconductor, and constructs an equivalent thin line current set, which is concretely as follows:
the area division in the tested semiconductor of this embodiment can adopt two modes, the first mode is rectangular element division and division according to the distance of Δ x and Δ y, as shown in fig. 2, the first mode is fan-shaped element division and division according to the distance of Δ r and Δ θ, as shown in fig. 3; then, an infinite long thin line current is set on each divided lattice point, and each thin line current is equivalent to approximate the total current in the area nearby the thin line current.
P2-2 calculates n thin line currents I in the equivalent thin line current set according to the tangential magnetic field through the Biao-Saval lawiAt the magnetic field measuring point QjThe magnetic field is superimposed to obtain a tangential magnetic field calculation set, where i is 1.. and n, j is 1.. and m, fig. 4 shows an example of dividing a rectangular element into equivalent thin-line current clusters, and a magnetic field measurement point Q is shownjSchematic diagram of the computing principle of the superposed magnetic field.
Wherein the superimposed magnetic field is calculated by:
wherein, BcjRepresents a superimposed magnetic field,/ijFor measuring point Q of magnetic fieldjDirected thin line current IiA displacement vector of rjFor measuring point Q of magnetic fieldjA displacement vector, θ, pointing to the originijIs a displacement vector lijAnd a displacement vector rjAngle of (d) of0Denotes a vacuum permeability constant, j 1.
Specifically, the relationship between the tangential magnetic field calculation set and the thin line current set satisfies the following matrix:
[Bc]＝[C][I]
wherein [ Bc ] represents a tangential magnetic field calculation set, [ I ] represents a thin line current set, and [ C ] represents a relation matrix.
The matrix is specifically developed as follows:
in the relation matrix [ C ],
wherein, i 1.. m, j 1.. n.
P3, constructing an adaptive value function according to the tangential magnetic field measurement set and the tangential magnetic field calculation set, specifically, the adaptive value function is represented as follows:
wherein f represents an adaptive value function, f is more than 0 and less than or equal to 1, and [ B ]c]Represents a tangential magnetic field calculation set, [ B ]t]Representing the tangential magnetic field measurement set.
2. Then, heuristic search calculation of the semiconductor current is carried out based on the adaptive value function, which specifically comprises the following steps:
s1 randomly generating M thin line current sets [ I ]]t1，[I]t2，…，[I]tMThe upper limits of the n thin-line current elements in each thin-line current set are ImaxLower limits are all IminSetting the maximum iterative computation times N and the convergence error e at the same time, and setting the initial iterative times t as 0;
s2, calculating the adaptive value f of each thin line current set by adopting the adaptive value functiont1,ft2,…,ftM；
S3 adaptive value f according to each thin line current sett1,ft2,…,ftMCalculating the selection weight P of each thin line current set1，P2，…，PMSelecting the weight P1，P2，…，PMSpecifically, it is obtained by the following function:
Pirepresents the selection weight of the ith set of thin line currents, ftiRepresenting a set of thin line currents [ I ]]tiAn adaptation value of, i 1., M;
s4 is according toSelecting weight proportion to randomly select X parent fine line current sets [ I ] from M fine line current sets]ta1，[I]ta2，…，[I]taXCalculating to obtain an average value [ I]tavThen, hybridization was performed in the following manner to obtain X hybridized sets of thin line currents [ I]tb1，[I]tb2，…，[I]tbX：
[I]tb1＝[I]ta1+ε([I]ta1-[I]tav)
[I]tb2＝[I]ta2+ε([I]ta2-[I]tav)
…
[I]tbX＝[I]taX+ε([I]taX-[I]tav)
Each thin line current element in the hybridized thin line current set needs to meet the upper and lower limit requirements in S1, otherwise, the thin line current elements are automatically replaced by the upper and lower limit values; where a1 to aX result from random numbers between 1 and M, which may be repeated, and M is divisible by X, epsilon is between 0 and 1;
s5 repeat the S4 procedure until M sets of hybridized thin line currents [ I ] are generated]tb1，[I]tb2，…，[I]tbM；
S6 pairs of M hybridized thin line currents generated in S5 [ I]tb1，[I]tb2，…，[I]tbMPerforming the following variation operation until obtaining the varied thin line current set [ I]tc1，[I]tc2，…，[I]tcM：
[I]tc1＝[I]tb1+σtN(0,1)
[I]tc2＝[I]tb2+σtN(0,1)
…
[I]tcM＝[I]tbM+σtN(0,1)
Each thin line current element in the variant thin line current set needs to meet the upper and lower limit requirements in S1, otherwise, the element is automatically replaced by the upper and lower limit values, wherein N (0,1) is a standard normal function, and sigma is a standard normal functiontIs the coefficient of variation related to the algebra t;
s7 selecting parent thin line current set [ I ]]t1，[I]t2，…，[I]tMReplacing the variant fine line current set [ I ] with the first Y fine line current sets with the highest medium adaptive value]tc1，[I]tc2，…，[I]tcMThe last Y thin line current sets with the lowest moderate adaptation value are obtained, and then offspring thin line current sets [ I ] are obtained]1 t1，[I]1 t2，…，[I]1 tMWherein Y is between 0 and M, and the iteration time t is automatically added by 1;
s8 determines whether the iterative computation number t is greater than N or whether the error function E is less than the convergence error E,
if the iterative computation times t are greater than N or the error function E is smaller than the convergence error E, stopping computation, and taking the thin line current set with the highest adaptive value in the M thin line current sets obtained by the last computation as a semiconductor current distribution value, otherwise, entering the step S2 to perform the next computation;
the iterative calculation error function E is the difference value between the lowest adaptive value in the M thin line current sets of the latest offspring and 1, and the expression is as follows:
E＝1-min{ft1,ft2,...,ftM}。
specifically, the magnetic field testing device includes a magnetic field testing component and a crimping component, the crimping component is crimped to the semiconductor 1 to be tested, and the magnetic field testing component measures the magnetic field intensity of the crimped semiconductor to be tested, fig. 5 is a schematic view of the overall structure of the magnetic field testing device in this embodiment, and fig. 6 is a cross-sectional view of the magnetic field testing device in this embodiment.
As can be seen from the figure, the magnetic field testing assembly comprises a driving device 2, a driven device and a magnetic field intensity measuring part 3, wherein the magnetic field intensity measuring part 3 is arranged at the bottom end of the driven device, and the bottom end of the driven device is arranged close to the periphery of the semiconductor 1 to be tested; the driving device 2 is connected with the driven device.
The driving device 2 only needs to adopt the existing driving motor, and the driven device comprises a first rotating disk 4-1, a second rotating disk 4-2 and a rotating disk connecting piece 4-3; the first rotating disk 4-1 is arranged above the second rotating disk 4-2, the second rotating disk 4-2 is arranged close to the periphery of the tested semiconductor 1, the magnetic field intensity measuring piece 3 is arranged on the second rotating disk 4-2, the driving device 2 is connected with the first rotating disk 4-1, and the first rotating disk 4-1 is connected with the second rotating disk 4-2 through a rotating disk connecting piece 4-3.
Specifically, the turntable connecting piece 4-3 adopts a connecting screw rod, a first threaded hole is formed in the first turntable 4-1, a second threaded hole is formed in the second turntable 4-2, the top end of the connecting screw rod is fixedly connected with the first threaded hole through a bolt 14, and the bottom end of the connecting screw rod is in threaded connection with the second threaded hole.
The magnetic field intensity measuring and fixing pieces 3 are arranged at intervals along the top surface of the second rotating disk 4-2, the magnetic field intensity measuring and fixing pieces 3 can adopt magnetic field sensors, and the magnetic field sensors preferably adopt tunnel junction reluctance sensors and can meet the alternating current and direct current magnetic field intensity test in a large range;
as shown in fig. 7, 8 or 9, it is illustrated that 4 magnetic field sensors are uniformly arranged on the second turntable 4-2 to respectively test radial magnetic field components of the semiconductor 1 to be tested in four directions, and the magnetic field sensors can move according to the positioning slots on the second turntable 4-2 to further adjust the radius of the concentric circles of the semiconductor 1 to be tested.
The crimping component comprises a support frame, a metal conductor, a contact electrode, a radiator, a lead-out copper bar, a pressure equalizing table, a pressure equalizing plate, a pressure equalizing ball and a heat dissipation water pipe.
Placing a semiconductor to be tested in the support frame;
the supporting frame comprises a supporting bottom plate 5-1, a supporting top plate 5-2 and a plurality of supporting rods 5-3, and the driving device 2 is placed on the supporting top plate 5-2;
the supporting bottom plate 5-1 is provided with a blind hole;
a through hole is formed in the supporting top plate 5-2;
the bottom ends of the support rods 5-3 are fixedly connected with the blind holes;
the top ends of the plurality of support rods 5-3 are fixedly connected with the through holes.
The second turntable 4-2 is provided with a plurality of arc-shaped slotted holes, the radians of the arc-shaped slotted holes do not exceed 90 degrees, the number of the arc-shaped slotted holes corresponds to that of the supporting rods 5-3, the rod bodies of the supporting rods 5-3 correspondingly penetrate through the arc-shaped slotted holes, as shown in fig. 7, 8 or 9, the number of the arc-shaped slotted holes is 4, and the number of the supporting rods 5-3 is also 4.
The metal conductors comprise a first metal conductor 6-1 and a second metal conductor 6-2, the contact electrodes comprise a first contact electrode 7-1 and a second contact electrode 7-2, the radiators comprise a first radiator 8-1 and a second radiator 8-2, the leading-out copper bars comprise a first leading-out copper bar 9-1 and a second leading-out copper bar 9-2, and the voltage equalizing table comprises a first voltage equalizing table 10-1 and a second voltage equalizing table 10-2;
a first radiator 8-1, a first metal conductor 6-1, a first contact electrode 7-1, a first voltage-sharing platform 10-1, a voltage-sharing ball 12 and a voltage-sharing plate 11 are sequentially arranged on the top surface of the semiconductor 1 to be tested from bottom to top;
the first leading-out copper bar 9-1 is connected with the first contact electrode 7-1, and the second leading-out copper bar 9-2 is connected with the second contact electrode 7-2.
The bottom end of the first radiator 8-1 is contacted with the top surface of the tested semiconductor 1, and the top end of the first radiator 8-1 is contacted with the bottom end of the first metal conductor 6-1;
the bottom end of the first contact electrode 7-1 is contacted with the top end of the first metal conductor 6-1, the top end of the first contact electrode 7-1 is contacted with the bottom end of the first voltage-sharing table 10-1, the top end of the first voltage-sharing table 10-1 is contacted with the bottom end of the voltage-sharing ball 12, the top end of the voltage-sharing ball 12 is contacted with the bottom end of the voltage-sharing plate 11, and the top end of the voltage-sharing plate 11 is contacted with the supporting top plate 5-2.
A second radiator 8-2, a second metal conductor 6-2, a second contact electrode 7-2 and a second voltage-sharing platform 10-2 are sequentially arranged on the bottom surface of the semiconductor 1 to be tested from top to bottom.
The top end of the second radiator 8-2 is in contact with the bottom surface of the tested semiconductor 1, the bottom end of the second radiator 8-2 is in contact with the top end of the second metal conductor 6-2, the top end of the second contact electrode 7-2 is in contact with the bottom end of the second metal conductor 6-2, the bottom end of the second contact electrode 7-2 is in contact with the top end of the second voltage-equalizing table 10-2, and the bottom end of the second voltage-equalizing table 10-2 is in contact with the supporting baseplate 5-1.
The heat radiation water pipe 13 is connected with the second contact electrode 7-2.
The assembly operation of the magnetic field testing device is as follows: during assembly, the second rotary disc 4-2 of the crimping component and the magnetic field testing component is installed, then the rest parts of the magnetic field testing component are installed, and finally the heat dissipation water pipe 13 and the leading-out copper bar are connected.
The working process of the magnetic field testing device for measuring the magnetic field intensity of the pressed tested semiconductor 1 is as follows: the driving device 1 controls the first rotary disc 4-1 to rotate, the first rotary disc 4-1 drives the second rotary disc 4-2 to rotate through the connecting screw rod, the magnetic field sensor on the second rotary disc 4-2 carries out reciprocating motion within the angle range of the arc slotted hole, magnetic field strength values around the semiconductor 1 to be tested in different directions can be extracted through the multiple relation of the sampling rate S of the magnetic field sensor and the rotating speed v of the electrode, and finally, the all-dimensional magnetic field information acquisition approaching 360 degrees is realized.
The magnetic field testing device is used for measuring the magnetic field intensity of the tested semiconductor 1, the vertical path length of the crimping component can be ensured, the magnetic field interference amount of currents in other directions superposed on the testing point is reduced, and the height of the crimping component can be adjusted according to the magnetic field testing precision.
The semiconductor 1 to be tested in this embodiment may be a device in a normal operating state or a failure device requiring a long through-current, such as a crimping type IEGT, an IGBT, an IGCT, and the like.
The above embodiments are only used to illustrate the technical solution of the present invention and not to limit the same, although the present invention is described in detail with reference to the above embodiments, those skilled in the art can still modify or equally replace the specific embodiments of the present invention, and any modification or equivalent replacement that does not depart from the spirit and scope of the present invention is within the protection scope of the claims of the present invention.
Claims (13)
1. A magnetic field testing device for semiconductor current density inversion is characterized by comprising a magnetic field testing component and a crimping component;
the compression joint component is used for compressing and connecting the semiconductor chip to be tested;
and the magnetic field testing component is used for measuring the magnetic field intensity of the crimped tested semiconductor chip.
2. The magnetic field testing apparatus for semiconductor current density inversion according to claim 1, wherein the magnetic field testing assembly comprises a driving apparatus, a driven apparatus and a magnetic field strength measuring member;
the magnetic field intensity measuring and fixing piece is arranged at the bottom end of the driven device;
the bottom end of the driven device is arranged close to the periphery of the tested semiconductor chip;
the driving device is connected with the driven device.
3. The magnetic field testing apparatus for semiconductor current density inversion according to claim 2, wherein the driven apparatus comprises a first turntable, a second turntable, and a turntable connector;
the first rotating disc is arranged above the second rotating disc;
the second turntable is arranged close to the periphery of the tested semiconductor chip;
the magnetic field intensity measuring and fixing piece is arranged on the second turntable;
the driving device is connected with the first rotary disc, and the first rotary disc is connected with the second rotary disc through the rotary disc connecting piece.
4. The magnetic field testing device for semiconductor current density inversion according to claim 3, wherein the first rotary table is provided with a first threaded hole, and the second rotary table is provided with a second threaded hole;
the turntable connecting piece adopts a connecting screw rod;
the top end of the connecting screw rod is in threaded connection with the first threaded hole;
and the bottom end of the connecting screw rod is in threaded connection with the second threaded hole.
5. The magnetic field testing apparatus for semiconductor current density inversion according to claim 3, wherein a plurality of magnetic field strength measuring devices are used;
and the magnetic field intensity measuring and fixing pieces are arranged at intervals along the top surface of the second turntable.
6. The magnetic field testing apparatus for semiconductor current density inversion according to claim 3, wherein the crimping assembly comprises a support frame, a metal conductor, a contact electrode;
the metal conductor comprises a first metal conductor and a second metal conductor, and the contact electrode comprises a first contact electrode and a second contact electrode;
the driving device is placed at the top end of the support frame;
a tested semiconductor chip is placed in the support frame;
the top surface of the tested semiconductor chip is sequentially contacted with the first metal conductor and the first contact electrode from bottom to top;
the bottom surface of the tested semiconductor chip is sequentially contacted with the second metal conductor and the second contact electrode from top to bottom.
7. The magnetic field testing apparatus for semiconductor current density inversion according to claim 6, wherein the crimping assembly further comprises a heat sink, the heat sink comprising a first heat sink and a second heat sink;
the bottom end of the first radiator is contacted with the top surface of the tested semiconductor chip, and the top end of the first radiator is contacted with the bottom end of the first metal conductor;
the top end of the second radiator is contacted with the bottom surface of the tested semiconductor chip, and the bottom end of the second radiator is contacted with the top end of the second metal conductor.
8. The magnetic field testing device for semiconductor current density inversion according to claim 6, wherein the crimping assembly further comprises a leading-out copper bar, the leading-out copper bar comprising a first leading-out copper bar and a second leading-out copper bar;
the first leading-out copper bar is connected with the first contact electrode;
the second leading-out copper bar is connected with the second contact electrode.
9. The magnetic field testing apparatus for semiconductor current density inversion according to claim 6, wherein the supporting frame comprises a supporting bottom plate, a supporting top plate and a plurality of supporting rods,
the driving device is placed on the supporting top plate;
the supporting bottom plate is provided with a blind hole;
the supporting top plate is provided with a through hole;
the bottom ends of the support rods are fixedly connected with the blind holes;
the top ends of the support rods are fixedly connected with the through holes.
10. The magnetic field testing apparatus for semiconductor current density inversion according to claim 9, wherein the crimping assembly further comprises a voltage-sharing stage comprising a first voltage-sharing stage and a second voltage-sharing stage;
the bottom end of the first voltage-sharing platform is contacted with the first contact electrode, and the top end of the first voltage-sharing platform is contacted with the supporting top plate;
the bottom end of the second pressure equalizing platform is in contact with the supporting bottom plate, and the top end of the second pressure equalizing platform is in contact with the second contact electrode.
11. The magnetic field testing apparatus for semiconductor current density inversion according to claim 10, wherein the crimping assembly further comprises a pressure equalizing plate and a pressure equalizing ball;
the pressure equalizing ball is arranged above the first pressure equalizing table, the top end of the pressure equalizing ball is contacted with the bottom end of the pressure equalizing plate, and the bottom end of the pressure equalizing ball is contacted with the top end of the first pressure equalizing table;
the top end of the pressure equalizing plate is contacted with the supporting top plate.
12. The magnetic field testing device for semiconductor current density inversion according to claim 9, wherein the second turntable is provided with a plurality of arc-shaped slots, and the number of the arc-shaped slots corresponds to the number of the supporting rods;
the rod body of the supporting rod correspondingly penetrates through the arc-shaped slotted hole.
13. The magnetic field testing apparatus for semiconductor current density inversion according to claim 7, wherein the crimping assembly further comprises a heat dissipating water pipe connected to the second heat sink.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120037788.9U CN214310847U (en) | 2021-01-07 | 2021-01-07 | Magnetic field testing device for semiconductor current density inversion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120037788.9U CN214310847U (en) | 2021-01-07 | 2021-01-07 | Magnetic field testing device for semiconductor current density inversion |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214310847U true CN214310847U (en) | 2021-09-28 |
Family
ID=77823107
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120037788.9U Active CN214310847U (en) | 2021-01-07 | 2021-01-07 | Magnetic field testing device for semiconductor current density inversion |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214310847U (en) |
-
2021
- 2021-01-07 CN CN202120037788.9U patent/CN214310847U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| McIntosh et al. | The choice of silicon wafer for the production of low-cost rear-contact solar cells | |
| CN112858862B (en) | Magnetic field inversion current calculation method for semiconductor current density analysis | |
| CN103904994B (en) | The detection method of a kind of leakage current and device | |
| JP2009105401A (en) | Process tester and testing methodology for thin-film photovoltaic device | |
| CN107704012B (en) | Photovoltaic DC-to-AC converter maximum power tracking method under a kind of non-uniform irradiation | |
| CN115453377B (en) | Battery pack life prediction method based on electrochemistry-thermal-aging and three-dimensional order reduction | |
| CN214310847U (en) | Magnetic field testing device for semiconductor current density inversion | |
| CN106021189A (en) | Multi-loop cable steady-state temperature rise acquisition method adapting to various boundary conditions | |
| CN112834894B (en) | Magnetic field testing device for semiconductor current density inversion | |
| Zhao et al. | Series resistance caused by the localized rear contact in high efficiency silicon solar cells | |
| Marco Tina | Simulation model of photovoltaic and photovoltaic/thermal module/string under nonuniform distribution of irradiance and temperature | |
| Dongaonkar et al. | Geometrical design of thin film photovoltaic modules for improved shade tolerance and performance | |
| Sabry et al. | Influence of temperature on methods for determining silicon solar cell series resistance | |
| JP2011514620A (en) | Shielded monolithic electrochemical system | |
| Nascimento et al. | Parameter estimation technique for double-diode model of photovoltaic modules | |
| Antón et al. | Performance prediction of concentrator solar cells and modules from dark I–V characteristics | |
| CN105811881A (en) | On-line photovoltaic array fault diagnosis system implementing method | |
| CN113536600A (en) | Optimal design method for layout of binding line of power module | |
| CN107508549A (en) | A kind of detection method of the PID decay of group of string | |
| KR20210069150A (en) | Method and apparatus for degradation diagnosis of photovoltaic module | |
| CN115485833A (en) | Test structure and test method | |
| Urban et al. | Front and rear pressure contact degradation in solar modules due to thermal cycle treatment | |
| CN220985628U (en) | Main grid-free battery piece testing device | |
| Qiu et al. | The Simulation Analysis of IGBT Module Based on COMSOL | |
| TWI467194B (en) | Test System of Solar Module and Its Method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |