CN214281274U - Driving device for three-phase sine wave current signals - Google Patents
Driving device for three-phase sine wave current signals Download PDFInfo
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- CN214281274U CN214281274U CN202022742204.6U CN202022742204U CN214281274U CN 214281274 U CN214281274 U CN 214281274U CN 202022742204 U CN202022742204 U CN 202022742204U CN 214281274 U CN214281274 U CN 214281274U
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Abstract
A driving device of three-phase sine wave current signals comprises an MCU controller and a peripheral driving circuit; the MCU controller comprises a PWM modulation signal generating device, the PWM modulation signal generating device comprises a sine digital signal generating device and a PWM modulator, the sine digital signal generating device is used for controlling the PWM modulator, the PWM modulation signal generating device is electrically connected with the peripheral driving circuit, and the PWM modulation signal generating device is used for driving the peripheral driving circuit to output three-phase sine wave current signals. Sinusoidal digital signals are generated through digital control logic, the generation efficiency of three-phase sinusoidal current signals is improved, and the cost is reduced; the problem of among the prior art sine wave generation process receive power and voltage's restriction, the circuit is realized inconveniently is solved.
Description
Technical Field
The utility model relates to a motor control field especially relates to a drive arrangement of three-phase sine wave current signal.
Background
For the control of a three-phase motor, it is the most basic requirement to adopt a three-phase sine wave current signal to drive the motor to rotate, and in the prior art, the driving mode of the three-phase sine wave current signal is generally divided into two modes of forming a square wave inverter circuit by a thyristor and using a special integrated motor driving chip. The square wave inverter circuit mode formed by adopting the thyristors has the following defects: 1. the output signal contains more components and low-order harmonic waves; 2. the output quality is low; likewise, the method of adopting a dedicated integrated motor driving chip has the following defects: 1. the substitutability is almost zero; 2. incompatibility and too low serviceability.
Therefore, it is desirable to provide a driving apparatus that is not limited by power and voltage and is more flexible in application and adjustment to solve the above technical problems.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the utility model provides a three-phase sine wave current signal's drive arrangement. The problems that in the prior art, the sine wave generation process is limited by power and voltage and the circuit is inconvenient to realize are solved.
The technical effects of the utility model are through following realization:
a driving device of three-phase sine wave current signals comprises an MCU controller and a peripheral driving circuit; the MCU controller comprises a PWM modulation signal generating device, the PWM modulation signal generating device comprises a sine digital signal generating device and a PWM modulator, the sine digital signal generating device is used for controlling the PWM modulator, the PWM modulation signal generating device is electrically connected with the peripheral driving circuit, and the PWM modulation signal generating device is used for driving the peripheral driving circuit to output three-phase sine wave current signals. By arranging the sinusoidal digital signal generating means such that a sinusoidal digital signal excitation set is generated, by arranging the PWM modulators such that 3 pairs of complementary PWM signals are generated, the sinusoidal digital signal excitation set is used to modulate the 3 pairs of complementary PWM signals, respectively, generating 3 pairs of PWM modulation signals having a phase angle offset of 120 degrees.
Further, the PWM modulation signal generation device is provided with a U-phase control port, a V-phase control port, and a W-phase control port for outputting 3 pairs of complementary PWM modulation signals.
Further, the peripheral driver circuit comprises a first half-bridge driver and/or a second half-bridge driver and/or a third half-bridge driver;
the first half-bridge driver is provided with a first port, a second port and a third port, and the first port is electrically connected with the U-phase control port; the second half-bridge driver is provided with a fourth port, a fifth port and a sixth port, and the fourth port is electrically connected with the V-phase control port; the third half-bridge driver is provided with a seventh port, an eighth port and a ninth port, and the seventh port is electrically connected with the W-phase control port. Through setting up the half-bridge driver for the PWM modulation signal of U phase control port, V phase control port and W phase control port output produces alternating current trigger signal through the inside power tube of half-bridge driver, thereby produces heavy current and further drives motor.
Further, the peripheral driving circuit further comprises a first bridge arm, the first bridge arm comprises a first MOS transistor and a second MOS transistor which are connected in series, a grid electrode of the first MOS transistor is electrically connected with the second port, and a grid electrode of the second MOS transistor is electrically connected with the third port;
further, the peripheral driving circuit further comprises a second bridge arm, the second bridge arm comprises a third MOS transistor and a fourth MOS transistor which are connected in series, a gate of the third MOS transistor is electrically connected with the fifth port, and a gate of the fourth MOS transistor is electrically connected with the sixth port;
furthermore, the peripheral driving circuit further comprises a third bridge arm; the third bridge arm comprises a fifth MOS tube and a sixth MOS tube which are connected in series, the grid electrode of the fifth MOS tube is electrically connected with the eighth port, and the grid electrode of the sixth MOS tube is electrically connected with the ninth port.
Further, the peripheral driving circuit comprises a first half-bridge driver, the first half-bridge driver is provided with a first port, a second port and a third port, and the first port is electrically connected with the U-phase control port. Through setting up first half-bridge driver for the PWM modulation signal of U phase control port output produces alternating current trigger signal through the inside power tube of first half-bridge driver, thereby produces heavy current and further drives motor.
Further, the peripheral driving circuit further comprises a second half-bridge driver, the second half-bridge driver is provided with a fourth port, a fifth port and a sixth port, and the fourth port is electrically connected with the V-phase control port. Through setting up the second half-bridge driver for the PWM modulation signal of V phase control port output produces alternating current trigger signal through the inside power tube of second half-bridge driver, thereby produces the further driving motor of heavy current.
Further, the peripheral driving circuit further comprises the third half-bridge driver, the third half-bridge driver is provided with a seventh port, an eighth port and a ninth port, and the seventh port is electrically connected with the W-phase control port. Through setting up the third half-bridge driver for the PWM modulation signal of W phase control port output produces alternating current trigger signal through the inside power tube of third half-bridge driver, thereby produces the heavy current and further drives motor.
Further, the peripheral driving circuit further comprises a first bridge arm, the first bridge arm comprises a first MOS transistor and a second MOS transistor which are connected in series, a gate of the first MOS transistor is electrically connected with the second port, and a gate of the second MOS transistor is electrically connected with the third port.
Further, the peripheral driving circuit further includes the second bridge arm, the second bridge arm includes a third MOS transistor and a fourth MOS transistor connected in series, a gate of the third MOS transistor is electrically connected to the fifth port, and a gate of the fourth MOS transistor is electrically connected to the sixth port.
Further, the peripheral driving circuit further includes the third bridge arm, the third bridge arm includes a fifth MOS transistor and a sixth MOS transistor connected in series, a gate of the fifth MOS transistor is electrically connected to the eighth port, and a gate of the sixth MOS transistor is electrically connected to the ninth port.
Further, the peripheral driving circuit further includes a dc power supply having a positive electrode and a negative electrode, the first bridge arm is electrically connected between the positive electrode and the negative electrode, and the first bridge arm, the second bridge arm, and the third bridge arm are connected in parallel.
Further, the peripheral driving circuit further comprises a three-phase motor, the three-phase motor comprises a U-phase port, a V-phase port and a W-phase port, the U-phase port is electrically connected with the midpoint of the first bridge arm, the V-phase port is electrically connected with the midpoint of the second bridge arm, and the W-phase port is electrically connected with the midpoint of the third bridge arm. And a peripheral driving circuit is arranged to complete the inversion process and output a three-phase sine wave current signal.
As described above, the utility model discloses following beneficial effect has:
1) through the cooperation of the MCU controller and the peripheral driving circuit, the circuit is more flexible to realize and is not controlled by power and voltage;
2) by arranging the sine digital signal generating device, a digital sine signal excitation set for modulating the PWM signal can be obtained, so that efficient digital logic control is realized and the cost is reduced;
3) the PWM signal generating device is arranged to complete the modulation process of the PWM signal, so that the phase angle deviation of the three-phase current is accurately controlled to be 120 degrees.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the description of the embodiment or the prior art will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIG. 1 is a schematic circuit diagram of a driving device according to an embodiment of the present disclosure;
FIG. 2 is a block diagram of a driving device according to an embodiment of the present application;
fig. 3 is a schematic flow chart of acquiring 3 pairs of complementary PWM modulation signals according to the embodiment of the present application;
FIG. 4 is a graph of a first quadrant set of sin sine function according to an embodiment of the present application;
FIG. 5 is a schematic diagram of the AC operation of the three-phase motor according to the embodiment of the present application;
fig. 6 is a waveform variation diagram of the U-phase PWM modulation duty ratio according to the embodiment of the present application.
Wherein the reference numerals in the figures correspond to:
the controller includes an MCU controller 1, a PWM modulation signal generation device 11, a sinusoidal digital signal generation device 111, a PWM modulator 112, a U-phase control port 113, a V-phase control port 114, a W-phase control port 115, a peripheral drive circuit 2, a first arm 21, a first MOS transistor 211, a second MOS transistor 212, a second arm 22, a third MOS transistor 221, a fourth MOS transistor 222, a third arm 23, a fifth MOS transistor 231, a sixth MOS transistor 232, a first half-bridge driver 24, a first port 241, a second port 242, a third port 243, a second half-bridge driver 25, a fourth port 251, a fifth port 252, a sixth port 253, a third half-bridge driver 26, a seventh port 261, an eighth port 262, a ninth port 263, a dc power supply 27, a positive electrode 271, a negative electrode 272, a three-phase motor 28, a U-phase port 281, a V-phase port 282, and a W-phase port 283.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Example 1:
as shown in fig. 1-5, a driving apparatus for three-phase sine wave current signals includes an MCU controller 1 and a peripheral driving circuit 2; the MCU controller 1 comprises a PWM modulation signal generating device 11, the PWM modulation signal generating device 11 comprises a sine digital signal generating device 111 and a PWM modulator 112, the sine digital signal generating device 111 is used for controlling the PWM modulator 112, the PWM modulation signal generating device 11 is electrically connected with the peripheral driving circuit 2, and the PWM modulation signal generating device 11 is used for driving the peripheral driving circuit 2 to output three-phase sine wave current signals. In this embodiment, the sine digital signal generating device generates a digital signal excitation set of a sin sine function in the first quadrant, the PWM modulator generates 3 pairs of complementary PWM signals, then the sine digital signal excitation set is used to modulate the 3 pairs of complementary PWM signals respectively to obtain U-phase, V-phase and W-phase PWM modulation signals, the PWM modulation signals are connected to the peripheral driving circuit to complete an inversion process, and three-phase sine wave current signals are output. The driving and inverting principles of the peripheral driving circuit belong to the prior art and are not described herein.
Further, the PWM modulation signal generation device 11 is provided with a U-phase control port 113, a V-phase control port 114, and a W-phase control port 115, where the U-phase control port 113, the V-phase control port 114, and the W-phase control port 115 are used to output 3 pairs of complementary PWM modulation signals;
further, the peripheral drive circuit 2 includes a first half-bridge driver 24, the first half-bridge driver 24 is provided with a first port 241, a second port 242, and a third port 243, and the first port 241 and the U-phase control port 113 are electrically connected; the peripheral driving circuit 2 further comprises a second half-bridge driver 25, the second half-bridge driver 25 is provided with a fourth port 251, a fifth port 252 and a sixth port 253, and the fourth port 251 is electrically connected with the V-phase control port 114; the peripheral drive circuit 2 further comprises a third half-bridge driver 26, the third half-bridge driver 26 being provided with a seventh port 261, an eighth port 262 and a ninth port 263, the seventh port 261 and the W-phase control port 115 being electrically connected. Through setting up the half-bridge driver for the PWM modulation signal of U phase control port, V phase control port and W phase control port output produces alternating current trigger signal through the inside power tube of half-bridge driver, thereby produces heavy current and further drives motor.
Further, the peripheral driving circuit further includes a first bridge arm 21, the first bridge arm 21 includes a first MOS transistor 211 and a second MOS transistor 212 connected in series, a gate of the first MOS transistor 211 is electrically connected to the second port 242, and a gate of the second MOS transistor 212 is electrically connected to the third port 243; the peripheral driving circuit further comprises a second bridge arm 22, the second bridge arm 22 comprises a third MOS tube 221 and a fourth MOS tube 222 which are connected in series, the grid electrode of the third MOS tube 221 is electrically connected with a fifth port 252, and the grid electrode of the fourth MOS tube 222 is electrically connected with a sixth port 253; the peripheral driving circuit further comprises a third bridge arm 23, the third bridge arm 23 comprises a fifth MOS tube 231 and a sixth MOS tube 232 which are connected in series, a gate of the fifth MOS tube 231 is electrically connected with the eighth port 262, and a gate of the sixth MOS tube 232 is electrically connected with the ninth port 263. And the inversion process is completed through a three-phase full-bridge MOS tube array consisting of a first bridge arm, a second bridge arm and a third bridge arm.
Further, the peripheral driving circuit further includes a dc power supply 27 having a positive electrode 271 and a negative electrode 272, the first arm 21 is electrically connected between the positive electrode 271 and the negative electrode 272, and the first arm 21, the second arm 22 and the third arm 23 are connected in parallel.
Further, the peripheral driving circuit further includes a three-phase motor 28, the three-phase motor 28 includes a U-phase port 281, a V-phase port 282, and a W-phase port 283, the U-phase port 281 is electrically connected to a midpoint of the first leg 21, the V-phase port 282 is electrically connected to a midpoint of the second leg 22, and the W-phase port 283 is electrically connected to a midpoint of the third leg 23. And outputting a three-phase sine wave current signal through the middle points of the first bridge arm, the second bridge arm and the third bridge arm of the three-phase full-bridge MOS tube.
As shown in fig. 3 to 6, a driving method of a three-phase sine wave current signal, which is implemented based on the driving apparatus of embodiment 1, includes:
acquiring 3 pairs of complementary PWM modulation signals by using a PWM modulation signal generating device 11;
and driving the peripheral driving circuit 2 by using 3 pairs of complementary PWM modulation signals to obtain a three-phase sine wave current signal.
The PWM modulation signal generating device outputs 3 PWM modulation signals with phase angle difference of 120 degrees, and 3 PWM modulation signals with phase angle difference of 120 degrees control the phase angle deviation of the output three-phase current by 120 degrees.
Further, acquiring 3 pairs of complementary PWM modulation signals by using the PWM modulation signal generating device 11 includes:
s101: acquiring a digital sine wave signal reference model by using a sine digital signal generating device 111;
and calculating the trigonometric function to obtain the digital signal excitation set of the sine function in the first quadrant. The method is characterized by comprising a formula Y, N sin (x), wherein an amplification amplitude coefficient N, 1024(N can be any positive integer with a value larger than 2, the value of N is generally a positive integer smaller than 2048 according to practical experience, N is one of preferred values of the scheme, an angular arc variable x belongs to (0, pi/2), x is an angular arc of 0-pi/2 (0-90 °) and is obtained by dividing time t into 256 equal parts, t belongs to (0, 256) (within the range of 0-90 ° for the angular arc, the value of t can be any subdivision grade larger than 2, and the subdivision grade of the time t according to the practical experience scheme is 256 as a preferred value).
S102: obtaining a digital sine signal excitation set by using a digital sine signal reference model;
in this embodiment, the value of the angular arc variable x corresponding to each scoring time t can be obtained by dividing the angular arc variable x by 256 equal parts, where x is (pi/2)/256 x t, t is e (0, 256), Y is sin (x), sine wave is amplified by N times of amplitude, and then an integer value is obtained to obtain a digital sine signal set Y [ t ] as follows,
Y[t]＝{
0，6，12，18，25，31，37，43，50，56，62，69，75，81，87，94，
100，106，112，119，125，131，137，144，150，156，162，168， 175，181，187，193，
199，205，212，218，224，230，236，242，248，254，260，267， 273，279，285，291，
297，303，309，315，321，327，333，339，344，350，356，362， 368，374，380，386，
391，397，403，409，414，420，426，432，437，443，449，454， 460，466，471，477，
482，488，493，499，504，510，515，521，526，531，537，542， 547，553，558，563，
568，574，579，584，589，594，599，604，609，615，620，625， 629，634，639，644，
649，654，659，664，668，673，678，683，687，692，696，701， 706，710，715，719，
724，728，732，737，741，745，750，754，758，762，767，771， 775，779，783，787，
791，795，799，803，807，811，814，818，822，826，829，833， 837，840，844，847，
851，854，858，861，865，868，871，875，878，881，884，887， 890，894，897，900，
903，906，908，911，914，917，920，922，925，928，930，933， 936，938，941，943，
946，948，950，953，955，957，959，962，964，966，968，970， 972，974，976，978，
979，981，983，985，986，988，990，991，993，994，996，997， 999，1000，1001，1003，
1004，1005，1006，1007，1008，1009，1010，1011，1012，1013， 1014，1015，1016，1017，1017，1018，
1019，1019，1020，1020，1021，1021，1022，1022，1022，1023， 1023，1023，1023，1023，1023，1023，
1024
}；
this set is the set of digital signals for the sin () sine function in the first quadrant, which is plotted in FIG. 4. The angular arc variable x may be divided into equal parts, with an alternative practical range of 64-1024 equal parts, preferably 256 equal parts.
S103: determining the corresponding relation between the phase of the initial moment and the time counter by using the PWM modulator 112 to obtain 3 pairs of complementary PWM signals;
before acquiring 3 pairs of complementary PWM signals, the phase angle relationship of the three-phase currents at each time can be determined according to the principle that the continuous rotation of the three-phase motor requires the continuous operation of the three-phase rotating alternating current, as shown in fig. 5. U, V, W the three-phase alternating current drives the motor continuously, HU, HV and HW are the logics of positive and negative switching of the three-phase current directions, the T0 moment of the U-phase current wave is used as the reference of the initial value, U, V, W the three-phase current keeps 120 degrees phase angle all the time at a certain moment, and the corresponding phase logic relation can be obtained as shown in Table 1.
TABLE 1
Before 3 pairs of complementary PWM signals are acquired, the phase logic at the initial moment and the initial value of the corresponding time counter are determined. A complete sine wave period of the three-phase current is divided into four quadrants, wherein the range of the 1 st quadrant is a phase from 0 to 90 degrees, the range of the 2 nd quadrant is a phase from 90 to 180 degrees, the range of the 3 rd quadrant is a phase from 180 degrees to 270 degrees, and the range of the 4 th quadrant is a phase from 270 degrees to 360 degrees. With the current of the U-phase coil of the motor at time t0 being 0 ° as the initial reference, the phases of the current waveform passing through the 4 quadrants are U _ phase ═ 0, 1, 2, and 3, respectively, and the phase relationship of the three-phase current at any time U, V, W can be determined, as shown in table 2. (negative angle is phase lag)
TABLE 2
The phase relationship of the three-phase currents is as follows:
time t 0: u _ phase ═ 0, v _ phase ═ 2, w _ phase ═ 1;
time t 1: u _ phase ═ 1, v _ phase ═ 3, w _ phase ═ 2;
time t 2: u _ phase 2, v _ phase 0, w _ phase 3;
time t 3: u _ phase is 3, v _ phase is 1, and w _ phase is 0.
The positions of the initial time counters u _ count, v _ count, w _ count of the three-phase currents at time t0 are determined. The position of a time counter at which a corresponding sin () sine wave 256 is equally divided is obtained from a phase angle θ at a certain time, and t e (0, 256) is obtained, so that t0, the time u _ phase is 0, and when the phase angle u _ θ is 0 °, u _ count is 0; v _ phase is 2, and u _ count is 85 (actual value is 171, after control logic is inverted 256 and 171 is 85) when v _ θ is-120 °; w _ phase is 1, and when the phase angle v _ θ is-240 °, w _ count is 171, as shown in table 3.
TABLE 3
The phase and time counter correspondence at the initial time t0 can be found:
time t 0: u _ phase ═ 0, u _ count ═ 0;
v_phase＝2，v_count＝85；
w_phase＝1，w_count＝171。
modulating 3 PWM modulators 112 with the digital sinusoidal excitation set of signals results in 3 pairs of complementary PWM modulated signals S104.
The computation time counters u _ count, v _ count, w _ count increment or decrement the logical relationship with the phase.
When the motor rotates in the forward direction:
1) u _ count + + is increased in a stepping mode, when u _ count >256, u _ count is equal to u _ count-256, and u _ phase + + is increased by 1; when u _ phase >3, u _ phase ═ 0;
2) v _ count + + is incremented in steps, and when v _ count >256, v _ count is v _ count-256, and v _ phase + + is incremented by 1; when v _ phase >3, v _ phase is 0;
3) w _ count + + is incremented in steps, and when w _ count >256, w _ count is w _ count-256; w _ phase + + plus 1; when w _ phase >3, w _ phase ═ 0;
when the motor rotates reversely:
1) u _ count — step decrease, when u _ count <0, u _ count ═ u _ count + 256; u _ phase — minus 1; when u _ phase <0, u _ phase ═ 3;
2) v _ count — step decrease, when v _ count <0, v _ count is v _ count + 256; v _ phase — minus 1; when v _ phase <0, v _ phase is 3;
3) w _ count — step decrease, when w _ count <0, w _ count is w _ count + 256; w _ phase- -minus 1; when w _ phase <0, w _ phase is 3;
the value of the time counter count is input into sin () sine signal excitation set Y [ t ], the required digital signal modulation value can be found, then the digital signal modulation value is input into PWM [ ] modulator, and PWM modulation signal output capable of driving sine wave signal is generated. The PWM modulator is left-aligned, and the PWM modulator is increased or decreased to the left and right sides with a 50% duty ratio as a center, and the subdivision level of the PWM modulator is set to N × 2 to 2048 levels, and a 50% duty ratio modulation signal is output when the input value of the PWM modulator is 1024. The PWM [ ] modulator input value calculation formula is as follows, and a waveform change diagram of the PWM modulation duty ratio when the motor rotates in the forward direction, taking the U phase as an example, is shown in fig. 6.
1) U-phase PWM modulation:
when u _ phase ═ 0: PWM [ U ] ═ 1024-Y [ U _ count ];
when u _ phase ═ 1: PWM [ U ] ═ 1024-Y [256-U _ count ];
when u _ phase is 2: PWM [ U ] ═ 1024+ Y [ U _ count ];
when u _ phase ═ 3: PWM [ U ] ═ 1024+ Y [256-U _ count ];
2) v-phase PWM modulation:
when v _ phase is 0: PWM [ V ] ═ 1024-Y [ V _ count ];
when v _ phase ═ 1: PWM [ V ] ═ 1024-Y [256-V _ count ];
when v _ phase is 2: PWM [ V ] ═ 1024+ Y [ V _ count ];
when v _ phase is 3: PWM [ V ] ═ 1024+ Y [256-V _ count ];
3) w-phase PWM modulation:
when w _ phase is 0: PWM [ W ] ═ 1024-Y [ W _ count ];
when w _ phase ═ 1: PWM [ W ] ═ 1024-Y [256-W _ count ];
when w _ phase is 2: PWM [ W ] ═ 1024+ Y [ W _ count ];
when w _ phase is 3: PWM [ W ] ═ 1024+ Y [256-W _ count ];
as described above, the utility model discloses following beneficial effect has:
1) through the cooperation of the MCU controller and the peripheral driving circuit, the circuit is more flexible to realize and is not controlled by power and voltage;
2) by arranging the sine digital signal generating device, a digital sine signal excitation set for modulating the PWM signal can be obtained, so that efficient digital logic control is realized and the cost is reduced;
3) the PWM signal generating device is arranged to complete the modulation process of the PWM signal, so that the phase angle deviation of the three-phase current is accurately controlled to be 120 degrees.
In this document, the terms front, back, upper and lower are used to define the components in the drawings and the positions of the components relative to each other, and are used for clarity and convenience of the technical solution. It is to be understood that the use of the directional terms should not be taken to limit the scope of the claims.
The embodiments and features of the embodiments described herein above can be combined with each other without conflict.
The above disclosure is only a preferred embodiment of the present invention, and certainly should not be taken as limiting the scope of the invention, which is defined by the claims and their equivalents.
Claims (8)
1. The driving device of the three-phase sine wave current signal is characterized by comprising an MCU (microprogrammed control Unit) controller (1) and a peripheral driving circuit (2); the MCU controller (1) comprises a PWM modulation signal generating device (11), the PWM modulation signal generating device (11) comprises a sine digital signal generating device (111) and a PWM modulator (112), the sine digital signal generating device (111) is used for controlling the PWM modulator (112), the PWM modulation signal generating device (11) is electrically connected with the peripheral driving circuit (2), and the PWM modulation signal generating device (11) is used for driving the peripheral driving circuit (2) to output three-phase sine wave current signals;
the sinusoidal digital signal generating means (111) is arranged to obtain a digital sinusoidal signal reference model to obtain a digital sinusoidal signal excitation set;
the PWM modulator (112) is arranged to modulate by said excitation set of digital sinusoidal signals to obtain 3 pairs of complementary PWM modulated signals.
2. A driving apparatus of a three-phase sine wave current signal according to claim 1, wherein said PWM modulation signal generating means (11) is provided with a U-phase control port (113), a V-phase control port (114) and a W-phase control port (115), said U-phase control port (113), said V-phase control port (114) and said W-phase control port (115) being for outputting 3 pairs of complementary PWM modulation signals.
3. A driving arrangement for a three-phase sinusoidal current signal according to claim 2, wherein the peripheral driving circuit (2) comprises a first half-bridge driver (24) and/or a second half-bridge driver (25) and/or a third half-bridge driver (26);
the first half-bridge driver (24) is provided with a first port (241), a second port (242) and a third port (243), and the first port (241) is electrically connected with the U-phase control port (113);
the second half-bridge driver (25) is provided with a fourth port (251), a fifth port (252) and a sixth port (253), the fourth port (251) and the V-phase control port (114) are electrically connected;
the third half-bridge driver (26) is provided with a seventh port (261), an eighth port (262) and a ninth port (263), and the seventh port (261) and the W-phase control port (115) are electrically connected.
4. A driving apparatus for three-phase sine wave current signal according to claim 3, wherein said peripheral driving circuit further comprises a first bridge arm (21), said first bridge arm (21) comprises a first MOS transistor (211) and a second MOS transistor (212) connected in series, a gate of said first MOS transistor (211) is electrically connected to said second port (242), and a gate of said second MOS transistor (212) is electrically connected to said third port (243).
5. The driving apparatus of a three-phase sine wave current signal according to claim 4, wherein the peripheral driving circuit further comprises a second bridge arm (22), the second bridge arm (22) comprises a third MOS transistor (221) and a fourth MOS transistor (222) connected in series, a gate of the third MOS transistor (221) is electrically connected to the fifth port (252), and a gate of the fourth MOS transistor (222) is electrically connected to the sixth port (253).
6. A drive arrangement for a three-phase sinusoidal current signal according to claim 5, wherein said peripheral drive circuit further comprises a third leg (23); the third bridge arm (23) comprises a fifth MOS tube (231) and a sixth MOS tube (232) which are connected in series, the grid electrode of the fifth MOS tube (231) is electrically connected with the eighth port (262), and the grid electrode of the sixth MOS tube (232) is electrically connected with the ninth port (263).
7. A driving apparatus for a three-phase sine wave current signal according to claim 6, wherein said peripheral driving circuit further comprises a DC power supply (27) having a positive pole (271) and a negative pole (272), said first leg (21) being electrically connected between said positive pole (271) and said negative pole (272), said first leg (21), said second leg (22) and said third leg (23) being connected in parallel.
8. A drive arrangement for a three-phase sinusoidal current signal according to claim 7, wherein said peripheral drive circuit further comprises a three-phase motor (28), said three-phase motor (28) comprising a U-phase port (281), a V-phase port (282), and a W-phase port (283), said U-phase port (281) being electrically connected to a midpoint of said first leg (21), said V-phase port (282) being electrically connected to a midpoint of said second leg (22), and said W-phase port (283) being electrically connected to a midpoint of said third leg (23).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022742204.6U CN214281274U (en) | 2020-11-24 | 2020-11-24 | Driving device for three-phase sine wave current signals |
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| CN115562128A (en) * | 2022-11-03 | 2023-01-03 | 格瑞环保科技(深圳)有限公司 | Intelligent control system for multi-effect high-temperature overlapping type drying of garbage |
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| CN115562128A (en) * | 2022-11-03 | 2023-01-03 | 格瑞环保科技(深圳)有限公司 | Intelligent control system for multi-effect high-temperature overlapping type drying of garbage |
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