CN214101332U

CN214101332U - TIA chip based on MLVD S driver

Info

Publication number: CN214101332U
Application number: CN202023153625.1U
Authority: CN
Inventors: 方鹏程; 许平
Original assignee: Core Technology Wuhan Co ltd
Current assignee: Core Technology Wuhan Co ltd
Priority date: 2020-12-24
Filing date: 2020-12-24
Publication date: 2021-08-31
Anticipated expiration: 2030-12-24

Abstract

The utility model relates to a chip technology field discloses a TIA chip based on MLVD S driver, including enabling circuit, with enabling circuit connection has band gap reference module and common mode feedback circuit, the output of band gap reference module is connected with predrive circuit, predrive circuit ' S input is connected with single-ended commentaries on classics differential signal circuit, predrive circuit ' S output and common mode feedback circuit ' S output are connected with main drive circuit jointly, divide signal circuit input signal through single-ended commentaries on classics differential, through enabling electric power input enable signal, follow main drive circuit output signal, the signal of main drive circuit output still inputs common mode feedback circuit. The utility model discloses an enable circuit, common mode feedback circuit, the integrated module of circuit composition such as band gap reference module have low-power consumption, transmission speed is fast, the termination is simple, advantages such as interference killing feature is strong.

Description

TIA chip based on MLVD S driver

Technical Field

The utility model relates to a chip technology field especially relates to a TIA chip based on MLVD S driver.

Background

With the improvement of data transmission familiarity between processing terminals such as a CPU, a storage medium, multimedia and the like and communication equipment, the application of the traditional parallel interface in modern application is limited due to the disadvantages of low data transmission speed, complex protocol, high design cost and the like of the traditional parallel interface, the low speed of the traditional parallel interface is determined by the transmission mode of the traditional parallel interface, signals between parallel lines are easier to generate interference along with the improvement of transmission code rate, and are easy to be influenced by the outside to generate transmission errors, in order to improve the transmission speed, the parallel interface can be realized by increasing the bit width of data, but the number of wires can be increased, the complexity of a system is increased, in order to adapt to the change of the society, the serial interface gradually breaks through the defects of the parallel interface, becomes a mainstream interface of high-speed data transmission and is applied to various fields of life and industry.

SUMMERY OF THE UTILITY MODEL

In view of this, the utility model aims at providing a TIA chip based on MLVD S driver, the utility model discloses an enable circuit, common mode feedback circuit, the integrated module of circuit composition such as band gap reference module have advantages such as low-power consumption, transmission speed are fast, the termination is simple, the interference killing feature is strong.

The utility model discloses an above-mentioned technical problem is solved to following technical means:

the utility model discloses a TIA chip based on MLVD S driver includes enabling circuit, with enabling circuit connection has band gap reference module and common mode feedback circuit, the output of band gap reference module is connected with predrive circuit, predrive circuit ' S input is connected with single-ended commentaries on classics differential signal circuit, predrive circuit ' S output and common mode feedback circuit ' S output are connected with main drive circuit jointly, through single-ended commentaries on classics differential signal circuit input signal, through enabling electric power input enable signal, from main drive circuit output signal, the signal of main drive circuit output still inputs common mode feedback circuit.

Furthermore, the pre-drive circuit comprises a constant current charge and discharge circuit and an LDO power supply circuit, the constant current charge and discharge circuit is used for controlling the change rate of the grid source voltage of a switch tube in the main drive circuit, and the LDO power supply is used for providing a local power supply which does not change along with the fluctuation of the power supply voltage.

Furthermore, the Vcmf1 end of the common mode feedback circuit is connected with the PMOS end of the main driving circuit, the Vcmf2 end of the common mode feedback circuit is connected with the NMOS end of the main circuit, the common mode feedback circuit firstly adopts large resistors to be connected in series to extract common mode voltage, then reference voltage is compared, and the grid voltage of upper and lower current sources of the double-mode circuit is controlled by the comparison result, so that the difference value of the upper and lower currents has opposite influence on the common mode voltage, and a negative feedback effect is formed.

Further, the bandgap reference module is used for providing a reference voltage for the main driving circuit to output a common mode voltage and the LDO in the chip, and providing accurate bias current for each module, and includes a start circuit and a main circuit, where the start circuit is a start circuit composed of a first power supply M1, a second power supply M2, a transistor Q3, a sixth electron R6, and a seventh resistor R7.

Further, the single-ended to differential signal conversion circuit is used for converting a single-path TTL signal into a double-path differential TTL signal, and specifically comprises two paths, wherein one path is formed by cascading four inverters, and the other path is formed by cascading three inverters and a transmission gate.

Further, the enabling circuit comprises an RC series circuit, a buffer circuit and a logic circuit.

The utility model has the advantages that: the integrated module formed by the circuits such as the enabling circuit, the common-mode feedback circuit, the band-gap reference module and the like has the advantages of low power consumption, high transmission speed, simple termination, strong anti-interference capability and the like.

Drawings

Fig. 1 is a schematic structural diagram of a TIA chip based on an MLVD S driver according to the present invention;

fig. 2 is an overall driving circuit diagram of the present invention;

fig. 3 is a common mode feedback circuit diagram of the present invention;

fig. 4 is a circuit diagram of the bandgap reference circuit of the present invention;

fig. 5 is a circuit diagram of the present invention for single-ended to differential conversion;

fig. 6 is an enable circuit diagram of the present invention.

Detailed Description

The invention will be described in detail with reference to the following drawings and specific embodiments:

as shown in fig. 1-6, the utility model discloses a TIA chip based on MLVD S driver includes enabling circuit, with enabling circuit connection has band gap reference module and common mode feedback circuit, the output of band gap reference module is connected with pre-drive circuit, pre-drive circuit ' S input is connected with single-ended commentaries on classics differential signal circuit, pre-drive circuit ' S output and common mode feedback circuit ' S output are connected with main drive circuit jointly, through single-ended commentaries on classics differential signal circuit input signal, through enabling electric power input enable signal, follow main drive circuit output signal, the signal of main drive circuit output still inputs common mode feedback circuit.

In this embodiment, the pre-driver circuit includes a constant current charging and discharging circuit for controlling a change rate of a gate-source voltage of a switching tube in the main driver circuit, and an LDO power supply circuit for providing a local power supply that does not change with power supply voltage fluctuation.

In this embodiment, the Vcmf1 end of the common mode feedback circuit is connected to the PMOS end of the main driving circuit, the Vcmf2 end is connected to the NMOS end of the main circuit, the common mode feedback circuit first extracts a common mode voltage by connecting a large resistor in series, then compares the common mode voltage with a reference voltage, and controls the gate voltages of the upper and lower current sources of the dual-mode circuit according to the comparison result, so that the difference between the upper and lower currents has an opposite effect on the common mode voltage, thereby forming a negative feedback effect.

In this embodiment, the bandgap reference module is configured to provide a reference voltage for a main driving circuit to output a common mode voltage and an LDO in a chip, and provide accurate bias currents for the respective modules at the same time, and the bandgap reference module includes a start circuit and a main circuit, where the start circuit is a start circuit composed of a first power supply M1, a second power supply M2, a transistor Q3, a sixth electron R6, and a seventh resistor R7.

In this embodiment, the single-ended to differential signal conversion circuit is configured to convert a single-path TTL signal into a two-path differential TTL signal, and specifically includes two paths, where one path is formed by cascading four inverters, and the other path is formed by cascading three inverters and a transmission gate.

In this embodiment, the enabling circuit includes an RC series circuit, a buffer circuit, and a logic circuit.

Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art will understand that the present invention can be modified or replaced with other embodiments without departing from the spirit and scope of the present invention, which should be construed as limited only by the appended claims. The technology, shape and construction parts which are not described in detail in the present invention are all known technology.

Claims

1. A TIA chip based on MLVD S driver, characterized by: the band gap reference circuit comprises an enabling circuit, wherein the enabling circuit is connected with a band gap reference module and a common mode feedback circuit, the output end of the band gap reference module is connected with the common mode feedback circuit, the output end of the band gap reference module is connected with a pre-driving circuit, the input end of the pre-driving circuit is connected with a single-end differential signal conversion circuit, the output end of the pre-driving circuit and the output end of the common mode feedback circuit are connected with a main driving circuit together, signals are input through the single-end differential signal conversion circuit, enabling signals are input through enabling electric power, signals are output from the main driving circuit, and signals output by the main driving circuit are further input into the common mode feedback circuit.

2. The TIA chip based on the MLVD S driver according to claim 1, wherein: the pre-drive circuit comprises a constant current charge-discharge circuit and an LDO power supply circuit, the constant current charge-discharge circuit is used for controlling the change rate of the grid-source voltage of a switch tube in the main drive circuit, and the LDO power supply is used for providing a local power supply which does not change along with the fluctuation of the power supply voltage.

3. The TIA chip based on the MLVD S driver according to claim 1, wherein: the Vcmf1 end of the common mode feedback circuit is connected with the PMOS end of the main driving circuit, and the Vcmf2 end of the common mode feedback circuit is connected with the NMOS end of the main circuit.

4. The TIA chip based on the MLVD S driver according to claim 1, wherein: the band-gap reference module comprises a starting circuit and a main circuit, wherein the starting circuit is composed of a first power supply M1, a second power supply M2, a triode Q3, a sixth electron R6 and a seventh resistor R7.

5. The TIA chip based on the MLVD S driver according to claim 1, wherein: the single-ended to differential signal conversion circuit is used for converting a single-path TTL signal into a double-path differential TTL signal and specifically comprises two paths, wherein one path is formed by cascading four inverters, and the other path is formed by cascading three inverters and a transmission gate.

6. The TIA chip based on the MLVD S driver according to claim 1, wherein: the enabling circuit comprises an RC series circuit, a buffer circuit and a logic circuit.