CN214097812U - Security check circuit and sole security check instrument - Google Patents
Security check circuit and sole security check instrument Download PDFInfo
- Publication number
- CN214097812U CN214097812U CN202022301886.7U CN202022301886U CN214097812U CN 214097812 U CN214097812 U CN 214097812U CN 202022301886 U CN202022301886 U CN 202022301886U CN 214097812 U CN214097812 U CN 214097812U
- Authority
- CN
- China
- Prior art keywords
- resistor
- circuit
- signal
- capacitor
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Alarm Systems (AREA)
Abstract
A safety inspection circuit and a sole safety inspection instrument comprise an oscillation circuit, an amplification circuit, a control circuit and a wired communication circuit; when the oscillating circuit detects that a metal object exists in the preset area, an oscillating signal is generated; the amplifying circuit amplifies the oscillation signal; the control circuit converts the amplified oscillation signal into a first digital signal; the wired communication circuit outputs a wired communication signal according to the first digital signal; because the wired communication circuit sends the wired communication signal carrying the security check information, the upper computer can display according to the wired communication signal, thereby realizing background monitoring of the security check; in addition, the upper computer can be connected with the plurality of security inspection circuits, and the plurality of security inspection circuits can be monitored in a background.
Description
Technical Field
The application belongs to the safety device field, especially relates to a security check circuit and sole security check appearance.
Background
The traditional security check circuit comprises an oscillating circuit, an amplifying circuit, a control circuit and an alarm circuit; the oscillation circuit generates an oscillation signal when detecting metal; the amplifying circuit amplifies the oscillation signal; the control circuit converts the amplified oscillation signal into an indication signal; the alarm circuit gives an alarm according to the indication signal.
Because the function of the traditional safety check circuit is only limited to the alarm function, the traditional safety check circuit cannot be accessed to an upper computer for background monitoring.
SUMMERY OF THE UTILITY MODEL
The utility model provides a purpose of this application is providing a security check circuit and sole security check appearance, aims at solving the problem that traditional security check circuit can't insert the host computer and monitor in order to carry out the backstage.
The embodiment of the application provides a security check circuit, includes:
an oscillation circuit configured to generate an oscillation signal when the presence of a metal object within a preset area is detected;
the amplifying circuit is connected with the oscillating circuit and is configured to amplify the oscillating signal;
the control circuit is connected with the amplifying circuit and is configured to convert the amplified oscillation signal into a first digital signal;
and the wired communication circuit is connected with the control circuit and is configured to output a wired communication signal according to the first digital signal so as to upload the wired communication signal to an upper computer.
In one embodiment, the method further comprises the following steps:
the pressure sensing circuit is connected with the control circuit and is configured to output a pressure signal when the sensed pressure is greater than a preset value;
the control circuit is further configured to output a communication enable signal in accordance with the pressure signal;
the wired communication circuit is specifically configured to output the wired communication signal according to the first digital signal and the communication enable signal.
In one embodiment, the pressure sensing circuit comprises a first operational amplifier, a pressure sensor, a first resistor, a second resistor, and a third resistor;
the first end of the pressure sensor is connected with the first end of the first resistor and the positive phase input end of the first operational amplifier, the negative phase input end of the first operational amplifier is connected with the first end of the second resistor and the first end of the third resistor, the output end of the first operational amplifier and the second end of the third resistor jointly form the pressure signal output end of the pressure sensing circuit, the second end of the first resistor is connected with a first power supply, and the second end of the pressure sensor and the second end of the second resistor are jointly connected to a power supply ground.
In one embodiment, the control circuit is further configured to output a display enable signal according to the pressure signal and output a display signal according to the amplified oscillation signal;
the security check circuit further comprises:
and the display circuit is connected with the control circuit and is configured to display according to the display enabling signal and the display signal.
In one embodiment, the control circuit is further configured to convert the amplified oscillation signal into a second digital signal;
the security check circuit further comprises:
and the wireless communication circuit is connected with the control circuit and is configured to output a wireless communication signal according to the second digital signal.
In one embodiment, the control circuit is further configured to output a prompt signal according to the amplified oscillation signal;
the security check circuit further comprises:
and the alarm circuit is connected with the control circuit and is configured to alarm when receiving the prompt signal.
In one embodiment, the control circuit comprises a microprocessor;
a first data input/output end of the microprocessor is a pressure signal input end of the control circuit, a second data input/output end of the microprocessor is an oscillation signal input end of the control circuit, a third data input/output end of the microprocessor is a communication enabling signal output end of the control circuit, a fourth data input/output end of the microprocessor, a fifth data input/output end of the microprocessor, a sixth data input/output end of the microprocessor and a seventh data input/output end of the microprocessor jointly form a first digital signal output end of the control circuit, an eighth data input/output end of the microprocessor and a ninth data input/output end of the microprocessor jointly form a second digital signal output end of the control circuit, and a power supply end of the microprocessor is connected with a second power supply, and the grounding end of the microprocessor is connected with the power ground.
In one embodiment, the wired communication circuit includes an ethernet protocol stack chip, a first capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;
the power end of the ethernet protocol stack chip is connected to the first end of the fourth resistor and the third power supply, the reset end of the ethernet protocol stack chip, the second end of the fourth resistor and the first end of the first capacitor together form the communication enable signal input end of the wired communication circuit, the serial data output end of the ethernet protocol stack chip, the serial data input end of the ethernet protocol stack chip, the serial clock end of the ethernet protocol stack chip and the chip selection end of the ethernet protocol stack chip together form the first digital signal input end of the wired communication circuit, the ethernet positive data receiving end of the ethernet protocol stack chip, the ethernet negative data receiving end of the ethernet protocol stack chip, the ethernet positive data transmitting end of the ethernet protocol stack chip, the ethernet negative data transmitting end of the ethernet protocol stack chip, The driving end of the ethernet indicator light of the ethernet protocol stack chip, the first end of the fifth resistor, the first end of the sixth resistor, the first end of the seventh resistor, and the first end of the eighth resistor together form a wired communication signal output end of the wired communication circuit, the second end of the fifth resistor, the second end of the sixth resistor, the second end of the seventh resistor, and the second end of the eighth resistor are connected to a fourth power supply in common, and the second end of the first capacitor and the ground end of the ethernet protocol stack chip are connected to a power ground in common.
In one embodiment, the oscillating circuit comprises a first inductor, a second inductor and a second capacitor;
the first end of the second inductor is connected with a power ground, the second end of the second inductor is connected with the first end of the first inductor, the second end of the first inductor is connected with the first end of the second capacitor, and the second end of the second capacitor is an oscillation signal output end of the oscillation circuit.
In one embodiment, the amplifying circuit includes a second operational amplifier, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor;
a positive-phase input terminal of the second operational amplifier and a first terminal of the third capacitor together form an oscillation signal input terminal of the amplifying circuit, an inverting input terminal of the second operational amplifier is connected to a first terminal of the ninth resistor, a first terminal of the fifth capacitor and a first terminal of the tenth resistor, a second terminal of the ninth resistor is connected to a first terminal of the fourth capacitor, an output terminal of the second operational amplifier is connected to a second terminal of the fifth capacitor, a second terminal of the tenth resistor and a first terminal of the sixth capacitor, a second terminal of the sixth capacitor is connected to a first terminal of the eleventh resistor, a second terminal of the eleventh resistor is connected to an inverting input terminal of the third operational amplifier, a first terminal of the eighth capacitor and a first terminal of the fourteenth resistor, a positive-phase input terminal of the third operational amplifier is connected to a first terminal of the seventh capacitor, A first end of the twelfth resistor and a first end of the thirteenth resistor are connected, a second end of the thirteenth resistor is connected to a fifth power supply, an output end of the third operational amplifier is connected to a second end of the eighth capacitor, a second end of the fourteenth resistor and a first end of the fifteenth resistor, a second end of the fifteenth resistor and a first end of the ninth capacitor jointly form an oscillation signal output end of the amplifying circuit, and a second end of the third capacitor, a second end of the fourth capacitor, a second end of the seventh capacitor, a second end of the ninth capacitor and a second end of the twelfth resistor are commonly connected to a power ground.
The embodiment of the utility model provides a sole safety inspection appearance is still provided, sole safety inspection appearance includes:
a security circuit as described above; and
and the upper computer is configured to display according to the wired communication signal.
Compared with the prior art, the embodiment of the utility model beneficial effect who exists is: because the wired communication circuit sends the wired communication signal carrying the security check information, the upper computer can display according to the wired communication signal, thereby realizing background monitoring of the security check; in addition, the upper computer can be connected with the plurality of security inspection circuits, and the plurality of security inspection circuits can be monitored in a background.
Drawings
In order to more clearly illustrate the technical utility model in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a security circuit according to an embodiment of the present disclosure;
fig. 2 is another schematic structural diagram of a security circuit according to an embodiment of the present disclosure;
fig. 3 is another schematic structural diagram of a security circuit according to an embodiment of the present disclosure;
fig. 4 is another schematic structural diagram of a security circuit according to an embodiment of the present disclosure;
fig. 5 is another schematic structural diagram of a security circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram of an exemplary circuit of a security circuit according to an embodiment of the present disclosure.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Fig. 1 shows a schematic structural diagram of a security check circuit provided in a preferred embodiment of the present application, and for convenience of description, only the parts related to this embodiment are shown, which are detailed as follows:
the security check circuit includes an oscillation circuit 11, an amplification circuit 12, a control circuit 13, and a wired communication circuit 14.
The oscillation circuit 11 is configured to generate an oscillation signal when the presence of the metal object within the preset area is detected.
And an amplifying circuit 12 connected to the oscillating circuit 11 and configured to amplify the oscillation signal.
And a control circuit 13 connected to the amplifying circuit 12 and configured to convert the amplified oscillation signal into a first digital signal.
And a wired communication circuit 14 connected to the control circuit 13 and configured to output a wired communication signal according to the first digital signal.
The first digital signal may be a built-in Integrated bus (I2C) signal, a Serial Peripheral Interface (SPI) signal, or a Universal Asynchronous Receiver Transmitter/Transmitter (UART) signal, and the oscillation Circuit 11 may be a high-frequency oscillation Circuit 11, such as an LC high-frequency oscillation Circuit 11; the wired communication circuit 14 may be an ethernet communication circuit; the amplifying circuit 12 may be a high frequency amplifying circuit, may include an operational amplifier and its peripheral circuits, and may also be a switching tube amplifying circuit.
As shown in fig. 2, the security circuit also includes a pressure sensing circuit 15.
And the pressure sensing circuit 15 is connected with the control circuit 13 and is configured to output a pressure signal when the sensed pressure is greater than a preset value.
The control circuit 13 is also configured to output a communication enable signal in accordance with the pressure signal.
The wired communication circuit 14 is specifically configured to output a wired communication signal according to the first digital signal and the communication enable signal.
When the pressure sensing circuit 15 is applied to the sole security check instrument, a human body is sensed to stand on the sole security check instrument through the pressure sensing circuit 15, namely, when the sensed pressure is greater than a preset value, a pressure signal is output, and a communication enabling signal is generated according to the pressure signal to trigger and awaken the wired communication circuit 14, so that the function of enabling the wired communication circuit 14 to sleep when no human body stands on the sole security check instrument is realized, and electric energy is saved.
The control circuit 13 is further configured to output a display enable signal according to the pressure signal and output a display signal according to the oscillation signal after the amplification processing; as shown in fig. 3, the security circuit also includes a display circuit 16.
And a display circuit 16 connected to the control circuit 13 and configured to perform display in accordance with the display enable signal and the display signal.
When the pressure sensing circuit 15 is applied to the sole security check instrument, a human body is sensed to stand on the sole security check instrument through the pressure sensing circuit 15, namely, when the sensed pressure is greater than a preset value, a pressure signal is output, and a display enabling signal is generated according to the pressure signal to trigger and awaken the display circuit 16, so that the function of enabling the display circuit 16 to sleep when no human body stands on the sole security check instrument is realized, and electric energy is saved.
The control circuit 13 is further configured to convert the oscillation signal after the amplification process into a second digital signal; as shown in fig. 4, the security circuit further includes a wireless communication circuit 17.
And a wireless communication circuit 17 connected to the control circuit 13 and configured to output a wireless communication signal according to the second digital signal.
The second digital signal may be an I2C signal, an SPI signal, or a UART signal.
The wireless communication circuit 17 outputs a wireless communication signal according to the second digital signal carrying the security check information so that the upper computer can display according to the wireless communication signal, and the access to the upper computer for background monitoring is realized while the wiring of a wired network is avoided.
The control circuit 13 is further configured to output a cue signal according to the oscillation signal after the amplification processing; as shown in fig. 5, the security circuit also includes an alarm circuit.
And the alarm circuit is connected with the control circuit 13 and configured to alarm when receiving the prompt signal.
The alarm circuit gives an alarm when the security check fails, so that the safety of the security check circuit is improved.
Fig. 6 shows an example circuit structure of a security check circuit provided by an embodiment of the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown, and detailed descriptions are as follows:
the pressure sensing circuit 15 includes a first operational amplifier U1, a pressure sensor L0, a first resistor R1, a second resistor R2, and a third resistor R3.
A first end of the pressure sensor L0 is connected to a first end of the first resistor R1 and a non-inverting input end of the first operational amplifier U1, an inverting input end of the first operational amplifier U1 is connected to a first end of the second resistor R2 and a first end of the third resistor R3, an output end of the first operational amplifier U1 and a second end of the third resistor R3 together form a pressure signal output end of the pressure sensing circuit 15, a second end of the first resistor R1 is connected to the first power supply VAA, and a second end of the pressure sensor L0 and a second end of the second resistor R2 are connected to a power ground.
The pressure sensing circuit 15 senses a pressure sampling signal through the pressure sensor L0, and amplifies the pressure sampling signal through the first operational amplifier U1 to output a pressure signal, so that the accuracy of the pressure sensing circuit 15 in pressure sensing is improved.
The control circuit 13 includes a microprocessor U2.
A first data input/output terminal PA5 of the microprocessor U2 is a pressure signal input terminal of the control circuit 13, a second data input/output terminal PA3 of the microprocessor U2 is an oscillation signal input terminal of the control circuit 13, a third data input/output terminal PA11 of the microprocessor U2 is a communication enable signal output terminal of the control circuit 13, a fourth data input/output terminal PB15 of the microprocessor U2, a fifth data input/output terminal PB14 of the microprocessor U2, a sixth data input/output terminal PB13 of the microprocessor U2 and a seventh data input/output terminal PB12 of the microprocessor U2 together constitute a first digital signal output terminal of the control circuit 13, an eighth data input/output terminal 596pc 8 of the microprocessor U2 and a ninth data input/output terminal PC11 of the microprocessor U2 together constitute a second digital signal output terminal of the control circuit 13, a power terminal VDD of the microprocessor U2 is connected to a second power supply terminal VBB, the ground terminal VSS of the microprocessor U2 is connected to power ground.
The wired communication circuit 14 includes an ethernet protocol stack chip U3, a first capacitor C1, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8.
A power supply terminal VDD of the ethernet protocol stack chip U3 is connected to a first terminal of the fourth resistor R4 and the third power supply VCC, a reset terminal RST1 of the ethernet protocol stack chip U3, a second terminal of the fourth resistor R4 and a first terminal of the first capacitor C1 together form a communication enable signal input terminal of the wired communication circuit 14, a serial data output terminal SDO of the ethernet protocol stack chip U3, a serial data input terminal SDI of the ethernet protocol stack chip U3, a serial clock terminal SCK of the ethernet protocol stack chip U3 and a chip select terminal SCS of the ethernet protocol stack chip U3 together form a first digital signal input terminal of the wired communication circuit 14, an ethernet positive data receiving terminal RXP of the ethernet protocol stack chip U3, an ethernet negative data receiving terminal RXN of the ethernet protocol stack chip U3, an ethernet positive data transmitting terminal p of the ethernet txtxn of the ethernet protocol stack chip U3, an ethernet negative data transmitting terminal TXN of the ethernet protocol stack chip U3, The ethernet indicator light driving terminal ELINK #, the first end of the fifth resistor R5, the first end of the sixth resistor R6, the first end of the seventh resistor R7, and the first end of the eighth resistor R8 of the ethernet protocol stack chip U3 together form a wired communication signal output terminal of the wired communication circuit 14, the second end of the fifth resistor R5, the second end of the sixth resistor R6, the second end of the seventh resistor R7, and the second end of the eighth resistor R8 are commonly connected to the fourth power supply VDD, and the second end of the first capacitor C1 and the ground terminal of the ethernet protocol stack chip U3 are commonly connected to the power ground GND.
The conversion of the first digital signal into the wired communication signal is simply and reliably realized by the wired communication circuit 14 including the ethernet protocol stack chip U3 and its peripheral circuits.
The oscillating circuit 11 includes a first inductor L1, a second inductor L2, and a second capacitor C2.
A first terminal of the second inductor L2 is connected to the ground, a second terminal of the second inductor L2 is connected to a first terminal of the first inductor L1, a second terminal of the first inductor L1 is connected to a first terminal of the second capacitor C2, and a second terminal of the second capacitor C2 is an oscillation signal output terminal of the oscillation circuit 11.
By way of example and not limitation, the first inductor L1 may be a first coil, and the second inductor L2 may be a second coil, wherein the first coil and the second coil have the same size and shape, and are symmetrically distributed in opposite winding directions.
Because the first coil and the second coil have the same size and shape and are symmetrically distributed in opposite winding directions, when no metal approaches, the first coil and the second coil generate induction voltages with the same size and opposite phases, and the oscillating circuit 11 stops generating oscillating signals; when the metal approaches, eddy current is generated by the metal to form a reverse magnetic field, and the non-uniform distribution of the metal causes that the first coil and the second coil cannot generate induced voltages with the same magnitude and opposite phases, so that the oscillation circuit 11 generates an oscillation signal.
The amplifying circuit 12 includes a second operational amplifier U4, a third operational amplifier U5, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, and a fifteenth resistor R15.
A non-inverting input terminal of the second operational amplifier U4 and a first terminal of the third capacitor C3 jointly form an oscillation signal input terminal of the amplifying circuit 12, an inverting input terminal of the second operational amplifier U4 is connected to a first terminal of a ninth resistor R9, a first terminal of a fifth capacitor C5 and a first terminal of a tenth resistor R10, a second terminal of a ninth resistor R9 is connected to a first terminal of a fourth capacitor C4, an output terminal of the second operational amplifier U4 is connected to a second terminal of a fifth capacitor C5, a second terminal of a tenth resistor R10 and a first terminal of a sixth capacitor C6, a second terminal of the sixth capacitor C6 is connected to a first terminal of an eleventh resistor R11, a second terminal of the eleventh resistor R11 is connected to an inverting input terminal of the third operational amplifier U5, a first terminal of an eighth capacitor C8 and a first terminal of a fourteenth resistor R14, a non-inverting input terminal of the third operational amplifier U5 is connected to a first terminal of a seventh capacitor C7, A first end of the twelfth resistor R12 and a first end of the thirteenth resistor R13 are connected, a second end of the thirteenth resistor R13 is connected to the fifth power VEE, an output end of the third operational amplifier U5 is connected to a second end of the eighth capacitor C8, a second end of the fourteenth resistor R14 and a first end of the fifteenth resistor R15, a second end of the fifteenth resistor R15 and a first end of the ninth capacitor C9 jointly constitute an oscillation signal output end of the amplifying circuit 12, and a second end of the third capacitor C3, a second end of the fourth capacitor C4, a second end of the seventh capacitor C7, a second end of the ninth capacitor C9 and a second end of the twelfth resistor R12 are commonly connected to the power ground.
The oscillation signal is amplified in two stages through the second operational amplifier U4 and the third operational amplifier U5, so that the amplitude of the amplified oscillation signal is improved, and the detection reliability of the security detection circuit is improved.
The description of fig. 6 is further described below in conjunction with the working principle:
the following description will be given by taking an example of applying the security check circuit to a sole security check instrument, when a human body stands on the sole security check instrument, the pressure sensed by the pressure sensor L0 is greater than a preset value and outputs a pressure sampling signal, the pressure sampling signal is amplified by the first operational amplifier U1 to output a pressure signal, the pressure signal is input to the first data input/output terminal PA5 of the microprocessor U2, and the microprocessor U2 generates an energy passing signal according to the pressure signal and outputs the energy passing signal from the third data input/output terminal PA11 of the microprocessor U2 to the reset terminal RST1 of the ethernet protocol stack chip U3.
For example, when metal is hidden in the sole of a human body, when the metal is close to the first inductor L1 and the second inductor L2 and enters a preset region, different electromotive forces are induced by the first inductor L1 and the second inductor L2, the oscillation circuit 11 including the first inductor L1, the second inductor L2 and the second capacitor C2 outputs an oscillation signal, the second operational amplifier U4 and the third operational amplifier U5 perform two-stage amplification on the oscillation signal, and the amplified oscillation signal is output to the second data input/output terminal PA3 of the microprocessor U2.
The microprocessor U2 converts the amplified oscillation signal into a first digital signal and outputs the first digital signal from the fourth data input/output terminal PB15 of the microprocessor U2, the fifth data input/output terminal PB14 of the microprocessor U2, the sixth data input/output terminal PB13 of the microprocessor U2, and the seventh data input/output terminal PB12 of the microprocessor U2, the serial data output terminal SDO of the ethernet protocol stack chip U3, the serial data input terminal SDI of the ethernet protocol stack chip U3, the serial clock terminal SCK of the ethernet protocol stack chip U3, and the chip select terminal SCS of the ethernet protocol stack chip U3 receive the first digital signal and convert the first digital signal into a wired communication signal, wherein the wired communication signal is from the ethernet positive data receiving terminal RXP of the ethernet protocol stack chip U3, the ethernet negative data receiving terminal RXN of the ethernet negative data stack chip txn of the ethernet protocol stack chip U3, the ethernet positive data transmitting terminal p of the ethernet protocol stack chip U3, the ethernet positive data transmitting terminal p of the ethernet protocol stack chip U3, An ethernet negative data transmitting terminal TXN of the ethernet protocol stack chip U3 has an ethernet indicator lamp driving terminal ELINK # of the ethernet protocol stack chip U3 and outputs the data to an upper computer.
The embodiment of the utility model also provides a sole security check instrument, which comprises an upper computer and the security check circuit; and the upper computer is configured to display according to the wired communication signal.
The embodiment of the utility model provides a through including oscillating circuit, amplifier circuit, control circuit and wired communication circuit; when the oscillating circuit detects that a metal object exists in the preset area, an oscillating signal is generated; the amplifying circuit amplifies the oscillation signal; the control circuit converts the amplified oscillation signal into a first digital signal; the wired communication circuit outputs a wired communication signal according to the first digital signal; because the wired communication circuit sends the wired communication signal carrying the security check information, the upper computer can display according to the wired communication signal, thereby realizing background monitoring of the security check; in addition, the upper computer can be connected with the plurality of security inspection circuits, and the plurality of security inspection circuits can be monitored in a background.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (11)
1. A security circuit, comprising:
an oscillation circuit configured to generate an oscillation signal when the presence of a metal object within a preset area is detected;
the amplifying circuit is connected with the oscillating circuit and is configured to amplify the oscillating signal;
the control circuit is connected with the amplifying circuit and is configured to convert the amplified oscillation signal into a first digital signal;
and the wired communication circuit is connected with the control circuit and is configured to output a wired communication signal according to the first digital signal so as to upload the wired communication signal to an upper computer.
2. The security circuit of claim 1, further comprising:
the pressure sensing circuit is connected with the control circuit and is configured to output a pressure signal when the sensed pressure is greater than a preset value;
the control circuit is further configured to output a communication enable signal in accordance with the pressure signal;
the wired communication circuit is specifically configured to output the wired communication signal according to the first digital signal and the communication enable signal.
3. The security circuit of claim 2, wherein the pressure sensing circuit comprises a first operational amplifier, a pressure sensor, a first resistor, a second resistor, and a third resistor;
the first end of the pressure sensor is connected with the first end of the first resistor and the positive phase input end of the first operational amplifier, the negative phase input end of the first operational amplifier is connected with the first end of the second resistor and the first end of the third resistor, the output end of the first operational amplifier and the second end of the third resistor jointly form the pressure signal output end of the pressure sensing circuit, the second end of the first resistor is connected with a first power supply, and the second end of the pressure sensor and the second end of the second resistor are jointly connected to a power supply ground.
4. The security circuit of claim 2, wherein the control circuit is further configured to output a display enable signal based on the pressure signal and output a display signal based on the amplified oscillation signal;
the security check circuit further comprises:
and the display circuit is connected with the control circuit and is configured to display according to the display enabling signal and the display signal.
5. The security circuit of claim 1, wherein the control circuit is further configured to convert the amplified oscillating signal to a second digital signal;
the security check circuit further comprises:
and the wireless communication circuit is connected with the control circuit and is configured to output a wireless communication signal according to the second digital signal.
6. The security check circuit of claim 1, wherein the control circuit is further configured to output a prompt signal according to the amplified oscillating signal;
the security check circuit further comprises:
and the alarm circuit is connected with the control circuit and is configured to alarm when receiving the prompt signal.
7. The security circuit of claim 1, wherein the control circuit comprises a microprocessor;
a first data input/output end of the microprocessor is a pressure signal input end of the control circuit, a second data input/output end of the microprocessor is an oscillation signal input end of the control circuit, a third data input/output end of the microprocessor is a communication enabling signal output end of the control circuit, a fourth data input/output end of the microprocessor, a fifth data input/output end of the microprocessor, a sixth data input/output end of the microprocessor and a seventh data input/output end of the microprocessor jointly form a first digital signal output end of the control circuit, an eighth data input/output end of the microprocessor and a ninth data input/output end of the microprocessor jointly form a second digital signal output end of the control circuit, and a power supply end of the microprocessor is connected with a second power supply, and the grounding end of the microprocessor is connected with the power ground.
8. The security circuit of claim 1, wherein the wired communication circuit comprises an ethernet protocol stack chip, a first capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;
the power end of the ethernet protocol stack chip is connected to the first end of the fourth resistor and the third power supply, the reset end of the ethernet protocol stack chip, the second end of the fourth resistor and the first end of the first capacitor together form the communication enable signal input end of the wired communication circuit, the serial data output end of the ethernet protocol stack chip, the serial data input end of the ethernet protocol stack chip, the serial clock end of the ethernet protocol stack chip and the chip selection end of the ethernet protocol stack chip together form the first digital signal input end of the wired communication circuit, the ethernet positive data receiving end of the ethernet protocol stack chip, the ethernet negative data receiving end of the ethernet protocol stack chip, the ethernet positive data transmitting end of the ethernet protocol stack chip, the ethernet negative data transmitting end of the ethernet protocol stack chip, The driving end of the ethernet indicator light of the ethernet protocol stack chip, the first end of the fifth resistor, the first end of the sixth resistor, the first end of the seventh resistor, and the first end of the eighth resistor together form a wired communication signal output end of the wired communication circuit, the second end of the fifth resistor, the second end of the sixth resistor, the second end of the seventh resistor, and the second end of the eighth resistor are connected to a fourth power supply in common, and the second end of the first capacitor and the ground end of the ethernet protocol stack chip are connected to a power ground in common.
9. The security circuit of claim 1, wherein the oscillating circuit comprises a first inductor, a second inductor, and a second capacitor;
the first end of the second inductor is connected with a power ground, the second end of the second inductor is connected with the first end of the first inductor, the second end of the first inductor is connected with the first end of the second capacitor, and the second end of the second capacitor is an oscillation signal output end of the oscillation circuit.
10. The security circuit of claim 1, wherein the amplification circuit comprises a second operational amplifier, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor;
a positive-phase input terminal of the second operational amplifier and a first terminal of the third capacitor together form an oscillation signal input terminal of the amplifying circuit, an inverting input terminal of the second operational amplifier is connected to a first terminal of the ninth resistor, a first terminal of the fifth capacitor and a first terminal of the tenth resistor, a second terminal of the ninth resistor is connected to a first terminal of the fourth capacitor, an output terminal of the second operational amplifier is connected to a second terminal of the fifth capacitor, a second terminal of the tenth resistor and a first terminal of the sixth capacitor, a second terminal of the sixth capacitor is connected to a first terminal of the eleventh resistor, a second terminal of the eleventh resistor is connected to an inverting input terminal of the third operational amplifier, a first terminal of the eighth capacitor and a first terminal of the fourteenth resistor, a positive-phase input terminal of the third operational amplifier is connected to a first terminal of the seventh capacitor, A first end of the twelfth resistor and a first end of the thirteenth resistor are connected, a second end of the thirteenth resistor is connected to a fifth power supply, an output end of the third operational amplifier is connected to a second end of the eighth capacitor, a second end of the fourteenth resistor and a first end of the fifteenth resistor, a second end of the fifteenth resistor and a first end of the ninth capacitor jointly form an oscillation signal output end of the amplifying circuit, and a second end of the third capacitor, a second end of the fourth capacitor, a second end of the seventh capacitor, a second end of the ninth capacitor and a second end of the twelfth resistor are commonly connected to a power ground.
11. The utility model provides a sole safety inspection appearance which characterized in that, sole safety inspection appearance includes:
a security circuit as claimed in any one of claims 1 to 10; and
and the upper computer is configured to display according to the wired communication signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022301886.7U CN214097812U (en) | 2020-10-15 | 2020-10-15 | Security check circuit and sole security check instrument |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022301886.7U CN214097812U (en) | 2020-10-15 | 2020-10-15 | Security check circuit and sole security check instrument |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214097812U true CN214097812U (en) | 2021-08-31 |
Family
ID=77445370
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022301886.7U Active CN214097812U (en) | 2020-10-15 | 2020-10-15 | Security check circuit and sole security check instrument |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214097812U (en) |
-
2020
- 2020-10-15 CN CN202022301886.7U patent/CN214097812U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101057149B (en) | Self-powered power bus sensor employing wireless communication | |
| US7623120B2 (en) | Wireless and passive tablet for inputting to computer | |
| US20110300801A1 (en) | Radio receiver and transmitter circuits and methods | |
| CA2190939A1 (en) | Proximity detector | |
| CN101551469B (en) | Metal detector | |
| CN102880327A (en) | Touch circuit of touch screen and contact point detecting method | |
| CN214097812U (en) | Security check circuit and sole security check instrument | |
| CN201477423U (en) | Intelligent vibration monitoring and protecting apparatus | |
| CN209070006U (en) | A kind of current sensor | |
| CN204945405U (en) | A kind of magnetometer | |
| CN101739592B (en) | The vibration measuring type electronic tag generated based on electric current and system | |
| CN206270943U (en) | A kind of CPU module device for monitoring temperature | |
| CN207345403U (en) | A kind of tyre pressure sensor | |
| CN103698741A (en) | Radio frequency power supply electromagnetic positioning probe | |
| CN211043525U (en) | Measuring instrument with phase sequence testing function | |
| CN103268683A (en) | Circuit of amplifying signal in transformer anti-theft monitoring system | |
| CN216596468U (en) | Anti-theft monitoring device for goods in box | |
| CN207826195U (en) | A kind of vibration signal sensing device for automobile anti-theft alarm | |
| CN219475849U (en) | Convenient wall hidden line detection device | |
| CN107367630A (en) | A kind of digital multimeter adds non-contact alternating current test circuit and method | |
| CN221099931U (en) | Contactless torque measurement system | |
| CN207301300U (en) | A kind of probe for being used for intelligent Magnetic Sensor | |
| CN210243738U (en) | Three-core cable current detection device | |
| CN216351272U (en) | Tensile force inductance detection device of training apparatus | |
| CN216350952U (en) | Electromagnetic radiation sensor with RS485 communication circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |