CN213990875U

CN213990875U - 8k coder-decoder

Info

Publication number: CN213990875U
Application number: CN202022074960.6U
Authority: CN
Inventors: 肖涛
Original assignee: Changzhou Haitu Electronics Technology Co ltd
Current assignee: Changzhou Haitu Information Technology Co ltd
Priority date: 2020-09-21
Filing date: 2020-09-21
Publication date: 2021-08-17
Anticipated expiration: 2030-09-21

Abstract

The utility model discloses an including FPDA, 3559 integrated circuit board, switch and host computer, FPDA, 3559 integrated circuit board, switch and host computer pass through system control, the whole 8K codec operation of system control. The 8K codec is small in size, high in heat dissipation efficiency and coding and decoding compression efficiency, simultaneously supports 8K image cutting, can simultaneously code 8K images and cut 2K images or 1080P images, supports stream pushing through an RTSP network, simultaneously supports white balance correction of the images, and can show the prominent small change of the details of the 8K images on the images, so that the production deployment speed of relevant standards, the online compression efficiency and the like are greatly guaranteed.

Description

8k coder-decoder

Technical Field

The utility model relates to a codec technical field, more specifically says that it relates to an 8k codec.

Background

A codec refers to a device or program capable of transforming a signal or a data stream, the transformation including both an operation of encoding (usually for transmission, storage or encryption) or extracting a signal or a data stream into an encoded stream and an operation of recovering a form suitable for observation or operation from the encoded stream for observation or processing, the codec being composed of a source encoder, a video composite encoder, a transmission buffer, a transmission encoder, and an encoding control section. The image signal of the originating terminal is a composite television signal (analog signal) provided by a camera, a luminance (gray scale) signal and two chrominance signals are separated through digital video conversion, three signals are subjected to A/D conversion to convert the analog signal into a digital signal, each pixel point is 8 bits, the digitized signal is subjected to preprocessing to filter noise in the signal, the noise enters a CIF format conversion circuit to become a CIF standard format, and then the signal enters an information source encoder to perform image compression encoding. The purpose of the preprocessing is to eliminate background noise in the signal, thereby being beneficial to improving the definition of the image, and certainly, the preprocessing can also solve the crosstalk between the luminance signal and the chrominance signal and reduce the effect of folding interference. Codecs are often used in video conferencing and streaming media applications, and are often used mainly in the broadcast and television industry as front-end applications.

Currently, the mainstream 8K codec in the market has single function, and is easy to cause blockage and screen splash in a complex environment. The current 8K encoder has the problems of high hardware complexity, large size, large heat productivity, low compression efficiency and the like, and the quality and the efficiency of the encoder determine the efficiency of video encoding to a great extent. To address this problem, an 8k codec is now designed.

SUMMERY OF THE UTILITY MODEL

Not enough to prior art exists, the utility model aims to provide an 8K codec, it has small, the radiating efficiency is high, the codec compression efficiency is high, support 8K image simultaneously and tailor, can compile 8K image simultaneously and tailor 2K image or 1080P image after, support to push away the flow through the RTSP network, support the white balance correction of image simultaneously, 8K image detail is outstanding small change can both embody on the image, can make the characteristics that compression efficiency etc. obtained very big assurance on the production deployment speed of relevant standard and the line.

In order to achieve the above purpose, the utility model provides a following technical scheme:

the utility model provides an 8K codec, includes FPDA, 3559 integrated circuit board, switch and host computer, FPDA, 3559 integrated circuit board, switch and host computer pass through system control, the whole 8K codec of system control operation.

Further, the system consists of a 3559AV100 chip, an FPGA, a DSP, an HI3559A and a power supply module.

Further, the FPGA collects video data through an external 8K camera and transmits the video data to the HI3559A, and the video data in the HI3559A are compressed in H.265 or H.264 format through an internal DSP.

Further, the video data in the HI3559A decoder card is transmitted through a network, and the video data in the HI3559A decoder card is converted into YUV data through an internal ARM processor.

Furthermore, a memory card is inserted into the 8K codec, compressed audio and video data are stored in the memory card, the audio and video data in the memory card are provided for the ARM processor to read out, the data read out by the ARM processor are transmitted to the MAC, and the data in the MAC are provided for network transmission.

To sum up, the utility model discloses following beneficial effect has:

1. by arranging the system, the system is composed of a 3559AV100 chip, an FPGA, a DSP, an HI3559A and a power module, the purpose of supporting 8K image cutting is achieved, 8K images and cut 2K images or 1080P images can be compiled simultaneously, stream pushing through an RTSP network is supported, white balance correction of the images is supported simultaneously, the purpose of showing small changes of the details of the 8K images can be achieved on the images, the system has the characteristic of ensuring that the production deployment speed of relevant standards, the online compression efficiency and the like are extremely high, and the problems of high hardware complexity, large size, large heat productivity and low compression efficiency of the current 8K encoder are solved.

Drawings

FIG. 1 is a schematic structural view of the present invention;

fig. 2 is a system block diagram of the present invention.

Detailed Description

Example (b):

the present invention will be described in further detail with reference to the accompanying fig. 1-2.

An 8K codec is shown in fig. 1-2 and comprises an FPDA (field programmable data array), a 3559 board card, a switch and an upper computer, wherein the FPDA, the 3559 board card, the switch and the upper computer are controlled by a system, and the system controls the whole 8K codec to operate.

Further, the video data in the HI3559A decoder card is transported through the network, and the video data in the HI3559A decoder card is converted into YUV data by an internal ARM processor.

Furthermore, a memory card is inserted into the 8K codec, compressed audio and video data are stored in the memory card, the audio and video data in the memory card are provided for the ARM processor to be read out, the data read out by the ARM processor are transmitted to the MAC, and the data in the MAC is provided for network transmission.

The working principle is as follows:

the system comprises a 3559AV100 chip, an FPGA, a DSP, an HI3559A and a power module, wherein the FPGA acquires video data through an external 8K camera and transmits the video data to an HI3559A, the video data is compressed in an H.265 or H.264 format through the internal DSP, the data is transmitted to an HI3559A decoding card through a network, an internal ARM processor is used for converting the video data into YUV data, the compressed audio and video data is stored in a memory, the compressed audio and video data is transmitted to an MAC (media access control) through the network after being taken out by the ARM processor, and 8K compressed code streams are locally stored.

The present embodiment is only for explaining the present invention, and it is not limited to the present invention, and those skilled in the art can make modifications to the present embodiment without inventive contribution as required after reading the present specification, but all of them are protected by patent laws within the scope of the claims of the present invention.

Claims

1. The utility model provides an 8k codec, includes FPDA, 3559 integrated circuit board, switch and host computer, its characterized in that: the FPDA, the 3559 board card, the switch and the upper computer are controlled by a system, and the system controls the whole 8K codec to operate;

the system comprises a 3559AV100 chip, an FPGA, a DSP, an HI3559A and a power module, wherein the FPGA acquires video data through an external 8K camera and transmits the video data to an HI3559A, and the video data in the HI3559A are compressed in an H.265 or H.264 format through the internal DSP.

2. The 8k codec of claim 1, wherein: video data in the HI3559A decoding card is transmitted through a network, and the video data in the HI3559A decoding card is converted into YUV data through an internal ARM processor.

3. The 8k codec of claim 1, wherein: a memory card is inserted into the 8K codec, compressed audio and video data are stored in the memory card, the audio and video data in the memory card are provided for an ARM processor to be read out, the data read out by the ARM processor are transmitted to the MAC, and the data in the MAC are provided for network transmission.