CN213990621U - Filter and radio frequency front end module - Google Patents

Abstract

The filter occupies the size great among the prior art for overcoming, has occupied great planar area's in the radio frequency front end module problem, the utility model provides a filter and radio frequency front end module. The utility model discloses an aspect provides a filter, including the base plate and locating the filter circuit on the said base plate; the filter circuit comprises an inductor and a capacitor; the capacitor comprises a first metal layer and a second metal layer which are arranged on the adjacent layers of the substrate; the inductor is a spiral inductor obtained by forming a spiral line on any of the substrates. The utility model discloses a filter sets up electric capacity and inductance wherein on each base plate with metal sheet and spiral inductor's form to reduce the planar area of filter in integrated circuit, realized the miniaturization of filter, reduced the insertion loss of filter, improved the Q value of inductance in the filter.

Description

Filter and radio frequency front end module

Technical Field

The utility model relates to a wave filter field especially indicates the wave filter field of being applied to in the radio frequency front end module.

Background

The radio frequency front end module is a signal processing module arranged between an antenna and a radio frequency transceiving chip in a communication system, and a radio frequency signal transmitting path and a radio frequency signal receiving path are formed in the radio frequency front end module through radio frequency devices such as a power amplifier, a low noise amplifier, a filter, a switch circuit and the like. To ensure that useful rf signals can be picked up and received from the antenna without distortion, or the artifact signals can be transmitted through the antenna without distortion. The filter has the effect of eliminating interference noise in the radio frequency front-end module, allows signals in a certain frequency range to pass through, and blocks or attenuates radio frequency signals outside a working frequency band, so that effective filtering of wave bands outside the working frequency band is realized. For example, with the advent of the 5G network era, the N79 frequency band (4.4G-5.0GHz) is increasingly used in mobile communication, and accordingly, the amount of filters used in the rf front end is rapidly increasing.

In order to improve the communication quality and avoid the interference between adjacent channels, a wave filter is required to have good out-of-band rejection capability; in order to improve the system sensitivity, low insertion loss in the passband is required; in order to reduce signal distortion, flat amplitude-frequency characteristics and group delay characteristics are required in a passband; in order to meet the miniaturization trend of the communication equipment, the filter is required to have smaller volume.

At present, various filters exist at present, some filters have simple structures and are easy to implement, and can obtain a good passband (or called passband), but the out-of-band rejection capability of the filters is the worst. In order to enhance the out-of-band rejection, a steep transition attenuation change between the passband and the stopband is required. In order to achieve a sufficiently high order, a large number of capacitors and inductors are required, the more devices are required, the more complicated the circuit structure is, the larger the size of the corresponding filter is, and at the same time, the insertion loss is correspondingly increased, which contradicts the requirement of low insertion loss, so that it is not easy to actually design a filter which can meet the relevant use requirement.

Meanwhile, it is desirable to obtain a volume as small as possible, and it is important to improve the out-of-band rejection of the filter in the volume as small as possible. In the practical research and development process of the applicant, it is found that no filter with excellent out-of-band rejection capability and relatively small size exists at present, and a new filter is urgently needed to be developed to be suitable for the radio frequency front-end module.

The size of each component in an integrated circuit is an important factor affecting the integrated size of the integrated circuit, and therefore, the requirement for the feature size of the device is higher and higher. The existing filter generally adopts a surface-mounted mode to arrange impedance elements such as an inductor, a capacitor and the like on a top substrate to realize the function of the filter, and the existing filter has a large size and occupies a large plane area in a radio frequency front-end module in an integrated mode. How to improve the integration while ensuring the performance of the filter becomes an important issue for those skilled in the art to consider when designing the filter.

SUMMERY OF THE UTILITY MODEL

The filter occupies the size great among the prior art for overcoming, has occupied great planar area's in the radio frequency front end module problem, the utility model provides a filter and radio frequency front end module.

The utility model discloses an aspect provides a filter, including the base plate and locating the filter circuit on the said base plate; the filter circuit comprises an inductor and a capacitor;

the substrate comprises a plurality of dielectric layers; the capacitor comprises a first metal layer and a second metal layer which are arranged on the substrate of the adjacent layer; the inductor is a spiral inductor obtained by forming a spiral line on a dielectric layer of the substrate.

The utility model discloses a filter sets up electric capacity and inductance wherein on each base plate with metal sheet and spiral inductor's form to reduce the planar area of filter in integrated circuit, realized the miniaturization of filter, reduced the insertion loss of filter, improved the Q value of inductance in the filter.

Further, the filter circuit comprises an input port, an output port and a ground port; a series arm is arranged between the input port and the output port; forming a signal transmission path between the input port and the output port; wherein the series arm includes a first capacitor and a first inductor connected in parallel.

Further, a first parallel arm and a second parallel arm are provided between the signal transmission path and the ground port; the first parallel arm comprises a second capacitor and a second inductor which are connected in series, and the second parallel arm comprises a third inductor and a third capacitor which are connected in series.

Further, the substrate sequentially comprises a first dielectric layer, a second dielectric layer, a third dielectric layer and a fourth dielectric layer from top to bottom; an inductance or a capacitance in the filter circuit is selectively disposed on each of the dielectric layers.

Further, the input port and the output port are arranged on a first medium layer of the substrate; the first metal layer and the second metal layer in the first capacitor are respectively arranged in a first dielectric layer and a second dielectric layer of the substrate, one end of the first inductor is connected with the second metal layer, the other end of the first inductor is connected with the first metal layer in a via hole mode, the first inductor and the second metal layer of the first capacitor are arranged on the same dielectric layer of the substrate, or the first inductor and the second metal layer of the first capacitor are arranged on different dielectric layers of the substrate.

Further, the first metal plate of the second capacitor is connected to the output end of the series arm, the second metal plate of the second capacitor is connected to the first end of the second inductor, and the second end of the second inductor is connected to the ground port; the second metal plate of the second capacitor and the second inductor are arranged on the same dielectric layer of the substrate, or the second metal plate of the second capacitor and the second inductor are arranged on different dielectric layers of the substrate.

Furthermore, a first end of the third inductor is connected to the output end of the series arm, a second end of the third inductor is connected to the first metal plate of the third capacitor, and a second metal plate of the third capacitor is connected to a ground terminal; the second end of the third inductor and the first metal plate of the third capacitor are arranged on the same layer of the substrate, or the second end of the third inductor and the first metal plate of the third capacitor are arranged on different dielectric layers of the substrate.

Furthermore, a first metal layer and a second metal layer in the second capacitor are respectively arranged in a second dielectric layer and a third substrate layer of the substrate;

the second inductor is disposed in a third substrate layer of the substrate; the first metal layer of the second capacitor is connected with the first substrate layer of the substrate in a via hole mode; one end of the second inductor is connected with the second metal layer, and the other end of the second inductor is connected with the grounding port;

or the second inductor is arranged on a fourth substrate layer of the substrate; the first metal layer of the second capacitor is connected with the first substrate layer of the substrate in a via hole mode, the second metal layer of the second capacitor is connected with one end of the second inductor in a via hole mode, and the other end of the second inductor is connected with the grounding port.

Furthermore, a first metal layer and a second metal layer in the third capacitor are respectively arranged in a second dielectric layer and a third substrate layer of the substrate; the third inductor is disposed in a second substrate layer of the substrate; the first metal layer of the third capacitor is connected with one end of a third inductor in a second substrate layer of the substrate, and the other end of the third inductor is connected with the first substrate layer of the substrate in a via hole mode; and the second metal layer of the third capacitor is connected with a grounding port.

Or the first metal layer and the second metal layer in the third capacitor are respectively arranged in a third substrate layer and a fourth substrate layer of the substrate; the third inductor is arranged in a second dielectric layer of the substrate; the first metal layer of the third capacitor is connected with one end of a third inductor in a second substrate layer in a via hole mode, and the other end of the third inductor is connected with the first dielectric layer of the substrate in a via hole mode; and the second metal layer of the third capacitor is connected with a grounding port.

A second aspect of the present invention provides a radio frequency front end module, which includes the filter. The utility model discloses an among the radio frequency front end module, set up electric capacity and inductance with metal sheet and spiral inductance's form on each base plate with wherein on the wave filter of its interior adoption to reduced the planar area of wave filter in integrated circuit, realized the miniaturization of wave filter, reduced the insertion loss of wave filter, improved the Q value of inductance in the wave filter.

Drawings

Fig. 1 is a schematic diagram of a filter frame according to an embodiment of the present invention;

fig. 2 is a schematic circuit diagram of a filter according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a further preferred filter frame provided in an embodiment of the present invention;

fig. 4 a-4 c are schematic diagrams of further preferred filter circuits provided in embodiments of the present invention;

fig. 5 is a schematic diagram of a pass characteristic and an attenuation characteristic of a filter according to an embodiment of the present invention;

fig. 6 is a schematic diagram of forming capacitors on adjacent substrates according to an embodiment of the present invention;

fig. 7 is a schematic diagram of forming a spiral inductor on a substrate according to an embodiment of the present invention;

fig. 8 is a schematic diagram of forming an LC parallel resonant circuit on a multilayer substrate provided in an embodiment of the present invention;

fig. 9 is a schematic diagram of an LC series resonant circuit with a first parallel arm formed on a multilayer substrate according to an embodiment of the present invention;

fig. 10 is another schematic diagram of an LC series resonant circuit provided in an embodiment of the present invention in which a first parallel arm is formed on a multilayer substrate;

fig. 11 is a schematic diagram of an LC series resonant circuit provided in an embodiment of the present invention with a second parallel arm formed on a multilayer substrate;

fig. 12 is another schematic diagram of an LC series resonant circuit provided in an embodiment of the present invention in which a second parallel arm is formed on a multilayer substrate;

fig. 13 is a schematic diagram of a frame of an antenna device according to an embodiment of the present invention;

fig. 14 is a schematic diagram of a framework of a communication terminal according to an embodiment of the present invention.

Wherein, 1, a substrate; 2. a radio frequency transceiver module; 3. an antenna link module; 4. a baseband module; 5. a radio frequency front end module; 11. a first dielectric layer; 12. a second dielectric layer; 13. a third dielectric layer; 14. a fourth dielectric layer;

10. a series arm; 20. a first parallel arm; 30. a second parallel arm; 40. a matching network; l, spiral inductance; m1, a first metal layer; m2, a second metal layer; c1, a first capacitance; l1, a first inductor; c2, a second capacitor; l2, a second inductor; c3, a third capacitance; l3, third inductance; c4, a fourth capacitance; l4, fourth inductance; c5, a first adjusting capacitor; c6, a second adjusting capacitor; c7, resonance adjusting capacitor;

pin and an input port; pout, output port; pgnd, ground port.

Detailed Description

In order to make the technical problem, technical solution and advantageous effects solved by the present invention more clearly understood, the following description is given in conjunction with the accompanying drawings and embodiments to further explain the present invention in detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

In the description of the present invention, it is to be understood that the terms "longitudinal", "radial", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience of description and to simplify the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present invention. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Example 1

The structure of the filter disclosed in the present invention will be specifically explained in this example, and as shown in fig. 6, the filter includes a substrate 1 and a filter circuit disposed on the substrate 1; the filter circuit comprises an inductor and a capacitor; note that these substrates 1 do not require additional design, but are implemented directly in the integrated circuit on which the filter is built. For example, if the filter is to be used in an rf front-end module, which is an integrated circuit, the substrate 1 is directly the substrate 1 of the rf front-end module, and the filter in this example is directly formed on the substrate 1 of the rf front-end module.

As shown in fig. 6, the substrate 1 includes several dielectric layers; the capacitor comprises a first metal layer M1 and a second metal layer M2 which are arranged on the substrate 1 of the adjacent layer; as shown in fig. 7, the inductor is a spiral inductor L obtained by forming a spiral line on an arbitrary dielectric layer on the substrate 1. As is well known in integrated circuits, the substrate includes a plurality of dielectric layers on which various circuit patterns may be formed. The manner of forming the first metal layer M1, the second metal layer M2, or the spiral inductor L on the substrate 1 may be obtained by etching or the like on the circuit pattern of the dielectric layer. A capacitor is formed between the first metal plate and the second metal plate, so that the capacitor is used for replacing a patch capacitor in the prior art, and the capacitance value of the capacitor is related to the overlapping area of the first metal plate M1 and the second metal plate M2 and the distance between the first metal plate M1 and the second metal plate M2. The spiral inductor L in this example is used to replace the chip inductor in the prior art, and the value of the spiral inductor L is related to the length of the spiral inductor L and the length of the connection between the spiral inductor L and the capacitor. The longer the length of the spiral inductor L and the longer the length of the connection between the spiral inductor L and the capacitor, the larger the value of the spiral inductor L.

The filter circuit in this example is the specific filter circuit introduced in embodiment 1, and the filter circuit includes an input port Pin, an output port Pout, and a ground port Pgnd; a series arm 10 is arranged between the input port Pin and the output port Pout; a signal transmission path is formed between the input port Pin and the output port Pout;

a first parallel arm 20 and a second parallel arm 30 are provided between the signal transmission path and the ground port Pgnd;

wherein, the series arm 10 includes an LC parallel resonant circuit therein; the first parallel arm 20 and the second parallel arm 30 include LC series resonant circuits therein.

The following will describe how the filter circuit is specifically arranged on the multilayer substrate 1. Preferably, the substrate 1 sequentially includes a first dielectric layer 11, a second dielectric layer 12, a third dielectric layer 13, and a fourth dielectric layer 14 from top to bottom; an inductor or a capacitor in the filter circuit is selectively arranged on each dielectric layer; of course, the dielectric layer is not limited to only 4 layers, and may have only two dielectric layers, or may include more than 5 dielectric layers. The via connections between dielectric layers as referred to herein are not necessarily connected, but are connected as desired.

As shown in fig. 8, in this example, the LC parallel resonant circuit in the series arm 10 includes a first capacitor C1 and a first inductor L1 connected in parallel;

the input port Pin and the output port Pout are arranged on the first medium layer 11 of the substrate 1; in other words, the first dielectric layer 11 is provided with an input port Pin and an output port Pout; the first metal layer M1 and the second metal layer M2 in the first capacitor C1 are respectively arranged in the first dielectric layer 11 and the second dielectric layer 12; the first inductor L1 is arranged on the second medium layer 12; one end of the first inductor L1 is connected to the second metal layer M2, and the other end is connected to the first metal layer M1 by a via. Of course, it is also contemplated to dispose the first and second metal layers M1 and M2 and the first inductor L1 in the first capacitor C1 at other layers.

The first metal plate M1 of the second capacitor C2 is connected to the output end of the series arm 10, the second metal plate M2 of the second capacitor C2 is connected to the first end of the second inductor L2, and the second end of the second inductor L2 is connected to the ground port Pgnd; the second metal plate M2 of the second capacitor C2 and the second inductor L2 are disposed on the same dielectric layer of the substrate 1, or the second metal plate M2 of the second capacitor C2 and the second inductor L2 are disposed on different dielectric layers of the substrate 1. The following will be further explained with reference to the drawings.

A first end of the third inductor C3 is connected to the output end of the series arm 10, a second end of the third inductor C3 is connected to the first metal plate M1 of the third capacitor C3, and the second metal plate M2 of the third capacitor C3 is connected to the ground port Pgnd; the second end of the third inductor L3 and the first metal plate M1 of the third capacitor C3 are disposed on the same layer of the substrate 1, or the second end of the third inductor L3 and the first metal plate M1 of the third capacitor C3 are disposed on different dielectric layers of the substrate 1.

As shown in fig. 9, the LC series resonant circuit in the first parallel arm 20 includes a second capacitor C2 and a second inductor L2 connected in series;

the first metal layer M1 and the second metal layer M2 in the second capacitor C2 are respectively arranged in the second dielectric layer 12 and the third dielectric layer 13;

the second inductor L2 is arranged in the third medium layer 13; the first metal layer M1 of the second capacitor C2 is connected to the first dielectric layer 11 by a via, specifically, connected to a signal transmission path on the first substrate, that is, connected to the first metal plate and the output port Pout in fig. 8; one end of the second inductor L2 is connected to the second metal layer M2, and the other end is connected to a ground port Pgnd;

alternatively, as shown in fig. 10, the second inductor L2 is disposed on the fourth dielectric layer 14; the first metal layer M1 of the second capacitor C2 is connected with the first dielectric layer 11 in a via hole mode, the second metal layer M2 of the second capacitor C2 is connected with one end of the second inductor L2 in a via hole mode, and the other end of the second inductor L2 is connected with the ground port Pgnd.

It should be noted that each substrate 1 may be provided with a ground port Pgnd, or a ground port Pgnd may be provided on one substrate 1 (for example, the first dielectric layer 11), and when devices on the other substrates 1 need to be connected to the ground port Pgnd, the ground port Pgnd may be connected through a via hole.

As shown in fig. 11, the LC series resonant circuit in the second parallel arm 30 includes a third inductor L3 and a third capacitor C3 connected in series;

the first metal layer M1 and the second metal layer M2 in the third capacitor C3 are respectively arranged in the second dielectric layer 12 and the third dielectric layer 13; the third inductor L3 is arranged in the second medium layer 12; the first metal layer M1 of the third capacitor C3 is connected with one end of a third inductor L3 in the second dielectric layer 12, and the other end of the third inductor L3 is connected with the first dielectric layer 11 in a via hole mode; the second metal layer M2 of the third capacitor C3 is connected to the ground port Pgnd.

Alternatively, as shown in fig. 12, the following arrangement may be adopted: the first metal layer M1 and the second metal layer M2 in the third capacitor C3 are respectively arranged in the third dielectric layer 13 and the fourth dielectric layer 14; the third inductor L3 is arranged in the second medium layer 12; the first metal layer M1 of the third capacitor C3 is connected with one end of a third inductor L3 in the second dielectric layer 12 in a via hole mode, and the other end of the third inductor L3 is connected with the first dielectric layer 11 in a via hole mode; the second metal layer M2 of the third capacitor C3 is connected to the ground port Pgnd.

This application sets up on each base plate 1 through the form with metal sheet and spiral inductance L with electric capacity and inductance in the wave filter to reduced the planar area of wave filter in integrated circuit, realized the miniaturization of wave filter, reduced the insertion loss of wave filter, improved the Q value of inductance in the wave filter.

Example 2

The present embodiment will explain a specific circuit principle of the filter provided by the present application, as shown in fig. 1, including an input port Pin, an output port Pout, and a ground port Pgnd; a series arm 10 is arranged between the input port Pin and the output port Pout; a signal transmission path is formed between the input port Pin and the output port Pout; in other words, the signal transmission path includes the series arm 10 and the connection line.

At least one parallel arm is provided between the signal transmission path and the ground port Pgnd, and in this example, the number of the parallel arms preferably includes a first parallel arm 20 and a second parallel arm 30; the first parallel arm and the second parallel arm are connected in parallel between the signal transmission path and a ground port. Thus, the built filter circuit can build a filter with 3 attenuation poles and a passband meeting the design requirement. So as to realize further steep attenuation change and have more excellent out-of-band inhibition capability.

Wherein, the series arm 10 includes an LC parallel resonant circuit therein; the first parallel arm 20 and the second parallel arm 30 include LC series resonant circuits therein. The first parallel arm 20 and the second parallel arm 30 are connected in parallel between the signal transmission path and a ground port Pgnd.

In this example, the series arm 10 is connected in series between the input port Pin and the output port Pout, and the first parallel arm 20 and the second parallel arm 30 are connected to the signal transmission path at both ends thereof and to the ground port Pgnd at the other end thereof. Specifically, in this example, one end of each of the first parallel arm 20 and the second parallel arm 30 is connected to a connection line between the series arm 10 and the output port Pout, and the other end thereof is connected to the ground port Pgnd. To prevent misunderstanding, it is described here that: the series arm 10 does not mean that it employs a series resonant circuit, and the first parallel arm 20 and the second parallel arm 30 do not mean that a parallel resonant circuit is employed therein.

As shown in fig. 2, in this example, the LC parallel resonant circuit in the series arm 10 includes a first capacitor C1 and a first inductor L1 connected in parallel; a connection node between a first terminal of the first capacitor C1 and a first terminal of the first inductor L1 is connected to the input port Pin, and a connection node between a second terminal of the first capacitor C1 and a second terminal of the first inductor L1 is connected to the output port Pout.

For the sake of distinction, the LC series resonant circuits in the first and second parallel arms 20 and 30 are named a first LC series resonant circuit and a second LC series resonant circuit, respectively;

the first LC series resonant circuit in the first parallel arm 20 includes a second capacitor C2 and a second inductor L2 connected in series, one end of the second capacitor C2 is connected to the transmission path, and the other end is connected to one end of the second inductor L2; the other end of the second inductor L2 is connected to the ground port Pgnd;

the second LC series resonant circuit in the second parallel arm 30 includes a third inductor L3 and a third capacitor C3 connected in series, where one end of the third inductor L3 is connected to the transmission path, and the other end is connected to one end of the third capacitor C3; the other end of the third capacitor C3 is connected to the ground port Pgnd.

Preferably, as shown in fig. 3, a matching network 40 is further provided on a transmission path between the serial arm 10 and the output port Pout; the matching network 40 is located between the first parallel arm 20 and the second parallel arm 30. The matching network 40 is well known, and in general, in an rf circuit, the impedance of an rf signal source is not matched with the impedance of a load in a conjugate manner, and in order to maximize the power transmission efficiency, an impedance matching condition must be satisfied. Thus, it is generally necessary to provide a matching network 40 between the input and the output. The matching network 40 commonly includes an L-type network, a T-type network, a C-type network, and the like. For example, in this example, as shown in fig. 4a, the matching network 40 in this example is an L-type network. An L-network is generally composed of capacitors and inductors, and eight modes are common. In this example, the selected one is selected for use. The L-type network comprises a fourth capacitor C4 and a fourth inductor L4; the fourth capacitor C4 is connected in series to the transmission path between the series arm 10 and the output port Pout, and the fourth inductor L4 has one end connected to the transmission path between the fourth capacitor C4 and the output port Pout and the other end connected to the ground port Pgnd. The matching network 40 is used to block low-pass and high-pass frequencies to form a high-pass filtering structure, thereby realizing adjustment of in-band return loss.

As shown in fig. 4b, as a modified manner, a first adjusting capacitor C5 to ground is provided between the input port Pin and the input end of the signal transmission path, and a second adjusting capacitor C6 to ground is provided between the output port Pout and the output end of the signal transmission path. The first adjusting capacitor C5 and the second adjusting capacitor C6 are used for impedance adjustment and impedance optimization, so that the performance of the filter circuit is improved.

In a further improvement, as shown in fig. 4C, the input end node and the output end node of the signal transmission path are connected by a resonance adjusting capacitor C7. The resonance adjusting capacitor C7 has the function of forming resonance with the first inductor L1, the second inductor L2 and the third inductor L3 on the signal transmission path, and finally forms an attenuation point at each of two ends of the formed band-pass filter, so that the resonance adjusting capacitor C7 can be applied to a system with higher requirements on resonance suppression.

The operation of this example will be explained in detail below. As is well known, in a parallel resonant circuit or a series resonant circuit, the single series resonant circuit and the single parallel resonant circuit both have their independent pass characteristics, that is, each has a pass band and an attenuation pole (referred to as an attenuation pole); the transmission characteristics of the series arm 10, the first parallel arm 20, and the second parallel arm 30 are known, and in a specific filter, a frequency band in which the passband of the parallel arm overlaps with the passband of the series arm 10 is the passband of the entire filter. The attenuation poles of the parallel arm and the attenuation poles of the series arm 10 form a plurality of attenuation poles of the entire filter.

In the series arm 10, the parallel resonance circuit is used to form the attenuation pole, and the series resonance is used to form the passband; in the parallel arm, a series resonant circuit is used to form an attenuation pole, and a parallel resonant circuit is used to form a pass band. In this example, the series arm 10 employs a parallel resonant circuit, and the first parallel arm 20 and the second parallel arm 30 employ a series resonant circuit. In this way, in the filter constituted by the series arm 10, the first parallel arm 20, and the second parallel arm 30, the pass characteristics of the respective filters are superimposed to obtain the pass characteristics having 3 attenuation poles. In this way, in the series arm 10, the parallel resonance frequency is located on the lower frequency side, the throughput of signals is minimized at the parallel resonance frequency on the lower frequency side, and the attenuation pole is formed at the parallel resonance frequency. In the parallel arm, the series resonance frequency is located on the higher frequency side, and the series resonance frequency on the higher frequency side minimizes the signal throughput and forms an attenuation pole at the series resonance frequency. A steeper decay change is achieved at the decaying pole.

The filter circuit obtained by the present embodiment has a characteristic curve as shown in fig. 5, in which the horizontal axis represents frequency and the vertical axis represents insertion loss; the insertion loss curve is shown in curve S1. Curve S2 represents a return loss curve. Among them, it can be found that A, B, C three attenuation poles are formed on the curve S1. The figure is marked with m2, m3, m4, m7, m8 and other selection points. In the present application, the LC parallel resonant circuit in the series arm 10 is mainly used to suppress a harmonic at the point a, the LC series resonant circuit in the first parallel arm 20 is mainly used to suppress a harmonic at the point B, and the LC series resonant circuit in the second parallel arm 30 is mainly used to suppress a harmonic at the point C. Wherein, the frequency of m2 point is 2.7GHz, the insertion loss is-23.759, the frequency of m3 point is 4.4GHz, the insertion loss is-0.599, and the gain on the point is-26.197; the frequency of the m4 point is 5.0GHz, the insertion loss is-0.539, and the gain on the m4 point is-21.988; the frequency of the m7 point is 8.8GHz, and the insertion loss is-12.345; the frequency at point m8 was 9.9GHz and the insertion loss was-15.515. It can be seen that the filter obtained by the design of the scheme of the present embodiment has very flat amplitude-frequency characteristics in the frequency band between 4.4Ghz and 5.0Ghz, and has obvious gain and extremely low insertion loss.

In this case, the first capacitor C1 may be preferably configured as a variable capacitor with adjustable frequency. By changing the frequency of the variable capacitor, the parallel resonance frequency in the filter can be controlled and adjusted, so that the passband and the attenuation pole of the filter can be adjusted. Similarly, the second capacitor C2 and the third capacitor C3 may be variable capacitors. The series resonance frequencies in the first parallel arm 20 and the second parallel arm 30 are also made adjustable to realize adjustment of the passband and the attenuation pole.

The filter disclosed in the application comprises a series arm 10 and two parallel arms, wherein an LC parallel resonance circuit is adopted in the series arm 10, and an LC series resonance circuit is adopted in the parallel arms, so that the filter with 3 attenuation poles and a passband meeting the design requirement can be constructed. The filter realizes steeper attenuation change at the attenuation pole, has excellent out-of-band rejection capability, has good gain and extremely low insertion loss in a pass band, and has smaller volume.

Example 3

This example discloses a radio frequency front end module, wherein the radio frequency front end module includes the filters described in embodiments 1 and 2. In this example, the rf front-end module has a plurality of signal transmission paths, and each signal transmission path is capable of processing the rf signal in a specific frequency band, for example, N77 or N79, by selecting a specific frequency band in the signal transmission path. The radio frequency device generally comprises a power amplifier, a low noise amplifier, a filter, a switch circuit and the like, and the signal transmission path comprises a radio frequency signal transmitting path and a radio frequency signal receiving path. The innovation of this example is mainly the improvement of the filter in the rf front-end module, and the concept of the filter has been specifically explained in embodiment 1 and embodiment 2, and is not described again.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims (10)

1. A filter is characterized by comprising a substrate and a filter circuit arranged on the substrate; the filter circuit comprises an inductor and a capacitor;

the substrate comprises a plurality of dielectric layers; the capacitor comprises a first metal layer and a second metal layer which are arranged on adjacent dielectric layers of the substrate; the inductor is a spiral inductor obtained by forming a spiral line on a dielectric layer of the substrate.

2. The filter of claim 1, wherein the filter circuit comprises an input port, an output port, and a ground port; a series arm is arranged between the input port and the output port; a signal transmission path is formed between the input port and the output port, wherein the series arm includes a first capacitor and a first inductor connected in parallel.

3. The filter of claim 2, wherein a first parallel arm and a second parallel arm are provided between the signal transmission path and the ground port, the first parallel arm comprising a second capacitor and a second inductor connected in series, the second parallel arm comprising a third inductor and a third capacitor connected in series.

4. The filter of claim 2, wherein the substrate comprises a first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer in sequence from top to bottom; an inductance or a capacitance in the filter circuit is selectively disposed on each of the dielectric layers.

5. The filter of claim 4, wherein the input port and the output port are disposed on a first dielectric layer of the substrate; the first metal layer and the second metal layer in the first capacitor are respectively arranged in a first dielectric layer and a second dielectric layer of the substrate, one end of the first inductor is connected with the second metal layer, the other end of the first inductor is connected with the first metal layer in a via hole mode, the first inductor and the second metal layer of the first capacitor are arranged on the same dielectric layer of the substrate, or the first inductor and the second metal layer of the first capacitor are arranged on different dielectric layers of the substrate.

6. The filter of claim 3, wherein the first metal plate of the second capacitor is connected to the output of the series arm, the second metal plate of the second capacitor is connected to the first end of the second inductor, and the second end of the second inductor is connected to a ground port; the second metal plate of the second capacitor and the second inductor are arranged on the same dielectric layer of the substrate, or the second metal plate of the second capacitor and the second inductor are arranged on different dielectric layers of the substrate.

7. The filter of claim 4, wherein a first terminal of the third inductor is connected to the output terminal of the series arm, a second terminal of the third inductor is connected to the first metal plate of the third capacitor, and a second metal plate of the third capacitor is connected to ground; the second end of the third inductor and the first metal plate of the third capacitor are arranged on the same layer of the substrate, or the second end of the third inductor and the first metal plate of the third capacitor are arranged on different dielectric layers of the substrate.

8. The filter of claim 6, wherein the first metal layer and the second metal layer of the second capacitor are disposed in a second dielectric layer and a third substrate layer of the substrate, respectively;

the second inductor is disposed in a third substrate layer of the substrate; the first metal layer of the second capacitor is connected with the first substrate layer of the substrate in a via hole mode; one end of the second inductor is connected with the second metal layer, and the other end of the second inductor is connected with the grounding port;

or the second inductor is arranged on a fourth substrate layer of the substrate; the first metal layer of the second capacitor is connected with the first substrate layer of the substrate in a via hole mode, the second metal layer of the second capacitor is connected with one end of the second inductor in a via hole mode, and the other end of the second inductor is connected with the grounding port.

9. The filter of claim 6, wherein the first metal layer and the second metal layer of the third capacitor are disposed in a second dielectric layer and a third substrate layer of the substrate, respectively; the third inductor is disposed in a second substrate layer of the substrate; the first metal layer of the third capacitor is connected with one end of a third inductor in a second substrate layer of the substrate, and the other end of the third inductor is connected with the first substrate layer of the substrate in a via hole mode; the second metal layer of the third capacitor is connected with a grounding port;

or the first metal layer and the second metal layer in the third capacitor are respectively arranged in a third substrate layer and a fourth substrate layer of the substrate; the third inductor is arranged in a second dielectric layer of the substrate; the first metal layer of the third capacitor is connected with one end of a third inductor in a second substrate layer in a via hole mode, and the other end of the third inductor is connected with the first dielectric layer of the substrate in a via hole mode; and the second metal layer of the third capacitor is connected with a grounding port.

10. A radio frequency front end module, characterized in that the filter of any one of claims 1-9 is included in the radio frequency front end module.

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