CN2139812Y

CN2139812Y - Multifunctional tester for language reaction

Info

Publication number: CN2139812Y
Application number: CN 92234153
Authority: CN
Inventors: 朱竣; 周骏
Original assignee: Individual
Current assignee: Individual
Priority date: 1992-10-05
Filing date: 1992-10-05
Publication date: 1993-08-11
Anticipated expiration: 2002-10-05

Abstract

A multifunctional language reaction tester is composed of CPU, data memory, program memory, keyboard, miniature printer interface, nixie tube display circuit, indicator light, analog circuit and sound pick-up. The character is that the voice response of the tested person to the stimulating signal generated by the tester is detected by the pick-up, the time base circuit is triggered after the voice response is amplified by the triode in the analog circuit, the voice response is input to the central processing unit after being shaped, the central processing unit stops the counting of the counter in the central processing unit when the stimulating signal is sent, and the test result is sent to the nixie tube display circuit to be displayed when the voice response of the tested person is detected.

Description

Multifunction test instrument for language reaction

Multifunctional tester when this utility model relates to a kind of language response, be particularly related to and be applicable to language response Research on ability and the teaching of psychology, the multifunctional tester during language response that can measure the response time of the reaction of people's simple language, complex language reaction, name language response or rather human body.

Measuring instrument during existing reaction, require the testee to see light signal after, press specified button as early as possible.This measuring instrument can only be measured the speed of finger to irritant reaction, the measurement in the time of promptly can only pointing reaction, and its function singleness, the test result error is bigger.And can't measure the testee when different visual material are made the reaction of language response.

This utility model is at the shortcomings and deficiencies of prior art, the utilization Computer Control Technology, multifunctional tester when designing a kind of language response of measuring can be to the reaction of the reaction of people's simple language, complex language reaction, name language response the time, it can accurately be measured the people visual stimulus is made time of language response, and degree of accuracy can reach 10 ^-4The S order of magnitude, data when it can show, writes down and store reaction are in real time extracted any one group of data arbitrarily, and data have been done pretreatment, can print with mini-printer in case of necessity, and this tester outage can be preserved data.Function when this tester also has the tachistoscopic vision material and measures the finger reaction simultaneously.

This utility model is achieved in that it is made up of nine parts, as shown in Figure 1.Comprising central processing unit 1, data memory 2, memory under program 3, keyboard 4, mini-printer interface 5, charactron display circuit 6, display lamp 7, analog circuit 8, pick up 9.

The tester produces stimulus signal by Keyboard Control: the instruction time of the display lamp of different colours or test card, open the enumerator in the central processing unit simultaneously, pick up counting, the testee makes language response as early as possible to this stimulus signal, speech signal is sent into analog circuit 8 through pick up 9, send into central processing unit 1 after analog circuit amplifies shaping, the enumerator in the central processing unit stops counting, and these data show on charactron during as testee's reaction.In data memory 2, the processing procedure of whole counting is by procedure auto-control with the deposit data that records for central processing unit.Test finishes, and the central processing unit disposal data carries out pretreatment, can connect mini-printer at printer interface 5 in case of necessity and print test result.

Below in conjunction with accompanying drawing this utility model is described in detail.

Fig. 1 is a circuit block diagram of the present utility model.

Fig. 2 is

square frame

1,2,3,4 and 7 a electrical schematic diagram among Fig. 1.

Fig. 3 is the electrical schematic diagram of square frame 6 among Fig. 1.

Fig. 4 is the electrical schematic diagram of square frame 8 among Fig. 1.

Fig. 5 a, 5b are program flow diagrams of the present utility model.

With reference to Fig. 2, the P0 mouth (P0.0-P0.7) of central processing unit V11 is received the D0-D7 port of address latch V12 successively, the also D0-D7 port of the O0-O7 port of linker memory V13 and data memory V17 successively simultaneously, these eight is the least-significant byte line of data wire; The outfan Q0-Q7 of latch V12 receives the address end A0-A7 of V13 and V17 successively, these eight lines are the least-significant byte address wire, the P2.0-P2.5 of the P2 mouth of central processing unit V11 receives A0-A12, the CE end of memory under program V13 successively, also connects A8-A12, the CS1 of data memory V17 simultaneously successively

End, it is the high address of address wire; The P2.6 of central processing unit V11, P2.7 port connect printer interface, provide data wire for connecting printer.Central processing unit V ₁₁RD and the WR OE and the WE that connect data memory V17 respectively, these two is the read-write control signal line; The PSEN end of central processing unit V11 is linked the OE end of memory under program V13 and the CS2 end of data memory V17, and this is the chip selection signal of external storage; The ALE/P of central processing unit V11 links the G end of address latch V12, and this is that address latch allows end, makes address latch V12 receive behind the address signal latch address effectively, in order to avoid and data collision; Central processing unit U ₁₁TXD end link serial data and parallel data conversion chip U ₁₅CLK end and data latches U ₁₆D ₁End, U ₁₁RXD end link U ₁₅A and B, and U ₁₆D ₂End, TXD and RXD are serial communication interfaces, it will send serial data.

Central processing unit U ₁₁X ₁End and X ₂End connects crystal Y ₁Two ends, X simultaneously ₁And X ₂Pass through capacitor C respectively ₁₉And C ₁₈With U ₁₁EA/VP end be connected to ground, this is central processing unit U ₁₁Clock circuit, for it provides clock signal.U ₁₁RESET end pass through capacitor C ₂₃Meet V _CcOn the high level, form central processing unit U ₁₁Reset circuit.

Central processing unit U ₁₁INTO, INT1, T0, T1 meet keyboard U respectively ₁₄A, b, c, d end, and meet power supply V by resistance _Cc, keyboard V ₁₄Other port e, f, g, h connect serial data and parallel data conversion chip U respectively ₁₅QE, QF, QG, QH end, form the scanning circuit of keyboard, data latches U ₁₆Q ₄The fluorescent lifetime of relay termination control display lamp, data latches V ₁₆G termination central processing unit U ₁₁The P1.7 mouth, this is a light controling signal, the P1.6 of central processing unit end is the speech signal input, central processing unit U ₁₁The P1.0-P1.5 port connect the control bus BUSI of charactron display circuit, serial data and parallel data conversion chip V ₁₅The data/address bus BUS2 of QA-QH termination charactron display circuit.

With reference to Fig. 3, the charactron display circuit.U among the figure ₁₈, V ₁₉, V ₂₀Be respectively even numbers sign indicating number tube display, show six bit digital altogether, preceding four show the response time, back two numberings that show testing time or tester.Charactron U ₁₈, V ₁₉, V ₂₀COM end meet phase inverter P respectively _12A-P _12FOutfan, phase inverter P _12A-P _12FInput receive respectively on the control bus BUS1 from Fig. 2, just open or close demonstration by the voltage of control bus BUS1.Phase inverter P _12A-P _12FFor the demonstration of charactron provides enough electric currents.Charactron U ₁₈, V ₁₉, V ₂₀0 all A, B, C, D, E, F, G end are received phase inverter P respectively _13B, P _13CAn and and door P _14A-P _14FOutfan, P _13B, P _13CInput connect phase inverter P _13A, P _13DOutfan, phase inverter P _13A, P _13DInput and with door P _14A-P _14FInput receive respectively on the data/address bus BUS2 from Fig. 2, when wanting video data, data/address bus BUS2 sends into data, through and door P _14A-P _14FWith phase inverter P _13A, P _13B, P _13DTo P _13CDriving add on the charactron, by control bus BUS1, which charactron decision lights.

With reference to Fig. 4, the speech signal that the testee sends is by pick up MIC input, through capacitor C ₁Audion Q is sent in 2 couplings ₁Base stage, after audion amplifies, export by colelctor electrode.Signal is through capacitor C ₁₃Be coupled, receive the input TR of time base circuit NE555, the CV pin of NE555 connects capacitor C ₂₀To ground, capacitor C ₂₀Be decoupling capacitor.The DIS of NE555 and THR foot meet power supply V by resistance R 12 _Cc, pass through capacitor C simultaneously ₁₄Ground connection is by R ₁₂, C ₁₄The width of the time that discharges and recharges control output end trigger impulse, make it less than 50ms.The outfan Q map interlinking 2 central processing unit V of NE555 ₁₁P _1.6Mouthful.Speech signal is converted into pulse signal through this circuit.When voice signal was imported, NE555 was output as high level (about 3.6V), input central processing unit V ₁₁NE555 output low level (0～0.5V) during no signal.Resistance R ₁₀, R ₁₁Be divider resistance, the voltage of the input TR of assurance NE555 is at 2/3Vcc.Central processing unit V ₁₁Inner intervalometer is arranged, can arbitrarily open, close, put number, reading.When measuring reaction, after test macro enters running status.The tester produces a stimulus signal by keyboard operation by computer, opens central processing unit V simultaneously ₁₁Inner intervalometer is arranged, constantly inquire about V ₁₁P _1.6Mouth has the no signal input.When testee's microphone was sounded signal reaction, voice signal transferred the signal of telecommunication to through pick up MIC, through Q ₁Amplification is added in time base circuit NE555 input TR, causes triggering.The outfan Q output high level of NE555 is to central processing unit V ₁₁P _1.6Port makes V ₁₁P _1.6The mouth level becomes high level, and at this moment computer program has detected the signal input, then writes down timing value at that time at once, and storage, has just been measured exactly when reacting like this.

The program flow diagram of this utility model is described as follows:

Fig. 5 a is the test mastery routine, the 1st, the central processor CPU initialization, 2 charactrons show " A " and keyboard scan, and 3 have looked into the no signal input, and 4 ask whether carry number, 5 deposit testee's number in, 6 input testee testing times, 7 look into and have or not the testing time input, and 8 deposit testing time, 9 look into and have or not test-types, 10 deposit test-types and display reminding character " H ", 11 setup tests, and 12 ask that test begins not, 13 open corresponding display lamp, 14 intervalometers begin counting, and 15 look into and have or not phonetic entry, and 16 intervalometers stop counting, 17 deposit datas and video data, whether 18 look into testing time finishes.

Fig. 5 b is a data extraction program.1 keyboard input testee number, 2 ask whether put forward data, certain of 3 input testees tests once, 4 find out corresponding data and show this number from the data base, 5 ask that also carrying number denys.

Claims

1, multifunctional tester during a kind of language response, by central processing unit, data memory, memory under program, keyboard, the mini-printer interface, the charactron display circuit, display lamp, analog circuit, pick up is formed, it is characterized in that described analog circuit is made up of transistor amplifier and time base circuit NE555, trigger time base circuit NE555 behind the speech signal that audion amplification pick up detects, time base circuit is imported central processing unit with shaped pulse signal, central processing unit stops the counting that its internal counter begins after receiving the high level pulse signal when stimulus signal produces, test result send the charactron display circuit to show, the Po mouth of central processing unit is received the data terminal of memory under program and data memory, the P2 notch portion port of central processing unit connects the address end of data memory and memory under program, and other port of P2 mouth is received the mini-printer interface.