CN213958244U - IP transmission circuit based on LoRa - Google Patents

Abstract

The utility model discloses an IP transmission circuit based on loRa, including host system, interface module and loRa wireless communication module, wherein: the interface module comprises an RS232 interface module, an RS485 interface module and an RJ45 interface module; the interface module and the LoRa wireless communication module are respectively connected to the main control module; the utility model discloses regard STM32F103ZET6 as the core processor, demand for compatible multiple equipment is connected, node and equipment communication compatibility RJ45, general interfaces such as RS485 and RS232, wherein RJ 45's physical layer chip adopts DM9000, can support 10 Mpbs's communication rate, and RS485 interface and RS232 interface adopt MAX3232 chip and MAX485 chip as level conversion chip respectively, and through 6N136 opto-coupler, PC4D10 optical coupler carries out asynchronous serial communication with host system, with the potential isolation that reduces interference and different equipment.

Description

IP transmission circuit based on LoRa

Technical Field

The utility model relates to a wireless communication field, more specifically say, relate to an IP transmission circuit based on loRa.

Background

In the traditional classroom control and part of industrial equipment connection, in order to ensure interface universality and signal stability, a wired network transmission mode is generally utilized. However, wired connection requires wiring construction, the problems of interface looseness, cable aging, lightning surge impact and the like exist in the long-term use process, and the later maintenance cost is high. Meanwhile, in order to ensure normal teaching operation and connection stability of industrial equipment, the connection fault needs to be timely processed, and higher requirements are provided for professional quality and maintenance convenience of maintenance personnel. Therefore, in the application scenario with low requirement on data delay sensitivity, the wireless connection scheme implemented by the LoRa technology has a significant advantage.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model lies in, to the not high defect of prior art to the high requirement of data delay sensitivity, provide an IP transmission circuit based on loRa.

The utility model provides a technical scheme that its technical problem adopted is: construct an IP transmission circuit based on loRa, including host system, IP transmission circuit still includes interface module and loRa wireless communication module, wherein:

the interface module comprises an RS232 interface module, an RS485 interface module and an RJ45 interface module;

the interface module and the LoRa wireless communication module are respectively connected to the main control module.

Furthermore, the main control module adopts a main control chip with the model number of STM32F103ZET6 as a processor.

Further, the IP transmission circuit further includes a data storage module, the data storage module is connected to the main control module, wherein:

the data storage module comprises a Flash chip, and the Flash chip is used for storing and caching communication data.

Further, the RS232 interface module includes a P1 plug, a MAX3232 level shift chip, and a PC4D10 optical coupler, wherein:

pin 1 and pin 2 of the P1 plug connector are respectively connected to a DOUT2 pin and a RIN2 pin of the MAX3232 level conversion chip;

the ROUT2 pin and the DIN2 pin of the MAX3232 level conversion chip are connected to the V1 pin and the A2 pin of the PC4D10 optical coupler;

finally, the a1 pin and the V2 pin of the optocoupler via PC4D10 are connected to the STM32F103ZET6 master chip.

Further, the RS485 interface module includes a P2 plug, a UM3085 level conversion chip, a 6N136 optical coupler, and a PC4D10 optical coupler, wherein:

pin 1 and pin 2 of the P4 connector are connected to pin a and pin B, respectively, which are connected to the UM3085 level shifting chip;

the RO pin and the DI pin of the UM3085 level conversion chip are respectively connected to the V1 pin and the A2 pin of the PC4D10 optical coupler, and the RE pin of the UM3085 level conversion chip is connected to the VO pin of the 6N136 optical coupler;

the VF + pin of the 6N136 optocoupler was connected to the STM32F103ZET6 master chip via the A1 pin and V2 pin of the PC4D10 optocoupler.

Further, the LoRa wireless communication module includes an E22-400T30S chip, wherein:

m0 pin and M1 pin of the E22-400T30S chip are connected to corresponding IO access pin under the STM32F103ZET6 main control chip, and RXD pin and TXD pin are connected to corresponding USART pin under the STM32F103ZET6 main control chip.

Further, the LoRa wireless communication module further includes an energy storage capacitor C27 and a decoupling capacitor C28, wherein:

the pin 6 of the E22-400T30S chip is respectively connected to one ends of an energy storage capacitor C27 and a decoupling capacitor C28, and the other ends of the energy storage capacitor C27 and the decoupling capacitor C28 are grounded on one hand and connected to the pin 7 of the E22-400T30S chip on the other hand.

Further, the RJ45 interface module is connected to the main control module via ethernet.

An IP transmission circuit based on loRa in, utilize STM32F103ZET6 chip to have abundant interface resource, satisfy essential information transmission requirement. In order to meet the requirements of connection of various devices, the node and the device are compatible with universal interfaces such as RJ45, RS485 and RS232 in communication, a physical layer chip of the RJ45 adopts DM9000 and can support the communication rate of 10Mpbs, and an MAX232 chip and an UM3085 chip are respectively adopted as level conversion chips for an RS485 interface and an RS232 interface, and asynchronous serial port communication is carried out with a main control module through an optical coupler 6N136 and an optical coupler PC4D10 so as to reduce interference and potential isolation of different devices.

Drawings

The invention will be further explained with reference to the drawings and examples, wherein:

fig. 1 is a first system structure diagram of an IP transmission circuit based on LoRa disclosed in the present invention;

fig. 2 is a second system structure diagram of an IP transmission circuit based on LoRa disclosed in the present invention;

FIG. 3 is a circuit schematic of an RS232 interface module;

FIG. 4 is a circuit schematic of an RS485 interface module;

fig. 5 is a circuit diagram of the LoRa wireless communication module.

Detailed Description

In order to clearly understand the technical features, objects, and effects of the present invention, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Please refer to fig. 1 and fig. 2, which are first and second system structure diagrams of an LoRa-based IP transmission circuit disclosed in the present invention, the LoRa-based IP transmission circuit disclosed in the present invention includes a main control module, the IP transmission circuit further includes an interface module and an LoRa wireless communication module (i.e., the LoRa front end shown in fig. 2), wherein:

the interface module comprises an RS232 interface module (i.e. the RS232 interface shown in fig. 2), an RS485 interface module (i.e. the RS485 interface shown in fig. 2) and an RJ45 interface module (i.e. the RJ45 interface shown in fig. 2);

the interface module and the LoRa wireless communication module are respectively connected to a master control module (i.e., STM32F103ZET6 shown in fig. 2), and in an embodiment, the master control module uses a master control chip of the model STM32F103ZET6 as a processor. The STM32F103ZET6 chip has abundant interface resources and can be applied to various application occasions. The RJ45 interface module is connected to the main control module (refer to fig. 2) via ethernet, wherein the physical layer chip of the RJ45 interface module adopts a DM9000 chip, the DM9000 is a fully integrated and cost-effective chip, and the single-chip fast ethernet MAC controller can support a communication rate of 10 mbps.

In order to store the interactive data in real time, in this embodiment, a data storage module is further arranged in the IP transmission circuit, the data storage module is connected to the main control module and is used for storing the received data or the data fed back by the main control module, when the data is stored, an SD card is arranged in the data storage module, and in one embodiment, a Flash chip included in the SD card is used for storing and caching the communication data.

Referring to fig. 2 and fig. 3, based on the circuit schematic diagram of the RS232 interface module shown in fig. 3, the RS232 interface module includes a P1 plug connector, a MAX3232 level shift chip, and a PC4D10 optical coupler, wherein:

the optical coupler is connected to a main control chip through a P1 plug connector, a MAX3232 level conversion chip and a PC4D10 optical coupler, and specifically:

pin 1 and pin 2 of the P1 plug connector are respectively connected to a DOUT2 pin and a RIN2 pin of the MAX3232 level conversion chip; it should be noted that, the second path of RS232 logic level output is performed based on a DOUT2 pin, and is output to an RS232 interface RXD terminal; and a second path of RS232 logic level input is carried out based on a RIN2 pin, and the input is from a TXD end of an RS232 interface.

The ROUT2 pin and the DIN2 pin of the MAX3232 level conversion chip are connected to the V1 pin and the A2 pin of the PC4D10 optical coupler; it should be noted that, the second path of CMOS and TTL logic level output is performed based on the ROUT2 pin and is output to the RXD terminal of the main control chip; and a second path of input of CMOS and TTL logic levels is carried out based on a DIN2 pin, and the input is from a TXD terminal of the main control chip.

Finally, the a1 pin and the V2 pin of the optocoupler via PC4D10 are connected to the STM32F103ZET6 master chip.

Referring to fig. 2 and 4, based on the circuit schematic diagram of the RS485 interface module shown in fig. 4, the RS485 interface module includes a P2 plug connector, a MAX485 level conversion chip, a 6N136 optical coupler, and a PC4D10 optical coupler, wherein:

the optical coupler is connected to a main control chip through a P2 plug connector, a MAX485 level conversion chip, a 6N136 optical coupler and a PC4D10 optical coupler, and specifically:

pin 1 and pin 2 of the P4 plug connector are respectively connected to pin A and pin B of the MAX485 level conversion chip; it should be noted that the pin a and the pin B are ports for receiving and transmitting differential signals, respectively.

The RO pin and the DI pin of the MAX485 level conversion chip are respectively connected to the V1 pin and the A2 pin of the PC4D10 optical coupler, and the RE pin of the MAX485 level conversion chip is connected to the VO pin of the 6N136 optical coupler; it should be noted that, the RO pin is used as an input of the receiver, when the level of the pin a is higher than that of the pin B, the RO is at a high level, otherwise, the RO is at a low level; the DI pin is the input of the driver, and outputs a high level when the low level of the DI is forced to be a low level, and similarly, outputs a low level when the high level of the DI is forced to be a high level.

Finally, the VF + pin of the 6N136 optocoupler was connected to the STM32F103ZET6 master chip via the A1 pin and V2 pin of the PC4D10 optocoupler.

Referring to fig. 2 and 5, based on the circuit schematic diagram of the LoRa wireless communication module shown in fig. 5, the LoRa wireless communication module includes an E22-400T30S chip, wherein:

m0 pin and M1 pin of the E22-400T30S chip are connected to corresponding IO access pin under the STM32F103ZET6 main control chip, and RXD pin and TXD pin are connected to corresponding USART pin under the STM32F103ZET6 main control chip.

Specifically, the central control wireless internet of things system of LoRa adopts the latest SX1262 wireless spread spectrum chip in the industry as the radio frequency processing front end, as shown in fig. 2, the chip architecture of SX1262 is shown, and SX1262 is a sub-GHz wireless transceiver newly introduced by Semtech corporation. The SX1262 chip is mainly characterized in that the chip can realize low power consumption and ultra-long distance transmission. SX1262 receives current less than 6.5mA, and can be less than 4.2mA at the lowest, realizes low-power consumption chip in the true sense. And the super-long transmission distance of 10km can be realized, and the strong function of the SX1262 chip is embodied. The working frequency band of the SX1262 chip covers 150-960 MHz, and the wireless transceiver chip mainly comprises four main parts, namely an analog front end, a modulation and demodulation module, a power supply unit and an interface.

The LoRa front-end chip is connected with the main control module through the serial port, because when sending signals, need great instantaneous current, need design great energy storage capacitor, consequently, LoRa wireless communication module still includes energy storage capacitor C27 and decoupling capacitor C28, wherein:

the pin 6 of the E22-400T30S chip is respectively connected to one ends of an energy storage capacitor C27 and a decoupling capacitor C28, and the other ends of the energy storage capacitor C27 and the decoupling capacitor C28 are grounded on one hand and connected to the pin 7 of the E22-400T30S chip on the other hand.

Finally, based on the above embodiments, when designing a circuit, the specific requirements are as follows:

1. the LoRa terminal and the central control are connected in a mode of at least comprising three communication interfaces of RJ45, RS232 and RS 485;

2. the power supply mode of the LoRa terminal comprises DC12V/DC5V and AC220V, and the power supply of the LoRa concentrator adopts AC 220V;

3. the number of the expandable node channels of a single LoRa concentrator is not less than 100, and the communication distance between the expandable node channels and the nodes in the unobstructed environment is more than 3 km;

4. the LoRa concentrator is hung on a LoRa terminal in a side ear manner, so that the antenna is supported to be extended and expanded;

5. the LoRa concentrator and the server are in communication in an RJ45 network link mode;

6. the signal delay of the LoRa concentrator and the LoRa terminal is not more than 3s, and the communication bandwidth is more than 1 Kbps;

7. the LoRa system supports an upper computer and remote configuration maintenance;

8. the LoRa system interface is greater than 15kVESD protection requirements, and the signal and power interface has an identifier and an anti-reverse connection function;

9. the LoRa system supports the communication control and IP registration function of the server to the central control end;

10. the system supports the reconstruction of the existing central control connection system by using the proxy server.

The utility model discloses an among IP transmission circuit based on loRa, utilize STM32F103ZET6 chip to have abundant interface resource, satisfy essential information transmission requirement. In order to meet the requirements of connection of various devices, the node and the device are compatible with universal interfaces such as RJ45, RS485 and RS232 in communication, a physical layer chip of the RJ45 adopts DM9000 and can support the communication rate of 10Mpbs, and an MAX232 chip and an UM3085 chip are respectively adopted as level conversion chips for an RS485 interface and an RS232 interface, and asynchronous serial port communication is carried out with a main control module through an optical coupler 6N136 and an optical coupler PC4D10 so as to reduce interference and potential isolation of different devices.

While the embodiments of the present invention have been described with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many modifications may be made by one skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.

Claims (7)

1. The utility model provides an IP transmission circuit based on loRa, includes host system, its characterized in that, IP transmission circuit still includes interface module and loRa wireless communication module, wherein:

the interface module comprises an RS232 interface module, an RS485 interface module and an RJ45 interface module;

the interface module and the LoRa wireless communication module are respectively connected to the main control module;

the IP transmission circuit further includes a data storage module connected to the main control module, wherein:

the data storage module comprises an SD card, and the SD card stores and caches communication data by using a Flash chip.

2. The IP transmission circuit based on LoRa as claimed in claim 1, wherein the main control module uses a main control chip of model STM32F103ZET6 as a processor.

3. The LoRa-based IP transport circuit of claim 2, wherein the RS232 interface module comprises a P1 plug, a MAX3232 level shift chip, and a PC4D10 optical coupler, wherein:

pin 1 and pin 2 of the P1 plug connector are respectively connected to a DOUT2 pin and a RIN2 pin of the MAX3232 level conversion chip;

the ROUT2 pin and the DIN2 pin of the MAX3232 level conversion chip are connected to the V1 pin and the A2 pin of the PC4D10 optical coupler;

the A1 pin and the V2 pin of the optocoupler connected to the STM32F103ZET6 master chip via PC4D 10.

4. The LoRa-based IP transmission circuit of claim 2, wherein the RS485 interface module comprises a P2 plug, a MAX485 level conversion chip, a 6N136 optical coupler, and a PC4D10 optical coupler, wherein:

pin 1 and pin 2 of the P4 plug connector are respectively connected to pin A and pin B of the MAX485 level conversion chip;

the RO pin and the DI pin of the MAX485 level conversion chip are respectively connected to the V1 pin and the A2 pin of the PC4D10 optical coupler, and the RE pin of the MAX485 level conversion chip is connected to the VO pin of the 6N136 optical coupler;

the VF + pin of the 6N136 optocoupler was connected to the STM32F103ZET6 master chip via the A1 pin and V2 pin of the PC4D10 optocoupler.

5. The IP transmission circuit based on LoRa according to claim 2, wherein the LoRa wireless communication module comprises an E22-400T30S chip, wherein:

m0 pin and M1 pin of the E22-400T30S chip are connected to corresponding IO access pin under the STM32F103ZET6 main control chip, and RXD pin and TXD pin are connected to corresponding USART pin under the STM32F103ZET6 main control chip.

6. The IP transmission circuit based on LoRa is characterized in that,

the LoRa wireless communication module further includes an energy storage capacitor C27 and a decoupling capacitor C28, wherein:

the pin 6 of the E22-400T30S chip is respectively connected to one ends of an energy storage capacitor C27 and a decoupling capacitor C28, and the other ends of the energy storage capacitor C27 and the decoupling capacitor C28 are grounded on one hand and connected to the pin 7 of the E22-400T30S chip on the other hand.

7. The LoRa-based IP transport circuit of claim 1, wherein the RJ45 interface module is connected to the main control module via ethernet.

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