CN213904338U - Novel PCIE connector - Google Patents
Novel PCIE connector Download PDFInfo
- Publication number
- CN213904338U CN213904338U CN202022894420.2U CN202022894420U CN213904338U CN 213904338 U CN213904338 U CN 213904338U CN 202022894420 U CN202022894420 U CN 202022894420U CN 213904338 U CN213904338 U CN 213904338U
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- China
- Prior art keywords
- connector
- pcie
- mainboard
- signal transmission
- slot
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- 230000008054 signal transmission Effects 0.000 abstract description 26
- 238000003780 insertion Methods 0.000 abstract description 5
- 230000037431 insertion Effects 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model discloses a novel PCIE connector, including quick-witted case, there is the mainboard at the internally mounted of quick-witted case, install connector slot on the mainboard, install the PCIE connector with it on the connector slot. The utility model discloses a heighten the connector slot on the mainboard, realize that the switching is done to the riser card in PCIE connector disect insertion connector slot, not only guaranteed signal transmission's between PCIE and the mainboard quality, reduced manufacturing cost moreover.
Description
Technical Field
The utility model belongs to the technical field of the server, in particular to novel PCIE connector.
Background
The connector is a common part of a server product and a personal computer mainboard, and is mainly used for connecting other external equipment or connecting a cable to other equipment or the mainboard, and when PCIE is connected with the mainboard, the connector is also required to be used as a bridge.
However, in an actual use process, as shown in fig. 1, since the connector slot on the motherboard is short, a riser card needs to be used as a switch card, so as to implement connection between the PCIE and the motherboard, but this connection manner not only has a problem of unstable signal transmission, but also wastes resources, and increases production cost.
Disclosure of Invention
The utility model aims at overcoming not enough among the prior art, providing a novel PCIE connector, the device realizes during PCIE connector disect insertion connector slot through increasing the connector slot on the mainboard, does not need the riser card to do the switching, has not only guaranteed signal transmission's quality between PCIE and the mainboard, has reduced manufacturing cost moreover.
In order to realize the purpose, the utility model discloses a technical scheme is:
the utility model provides a novel PCIE connector, includes the quick-witted case, has the mainboard at the internally mounted of quick-witted case, install connector slot on the mainboard, install matched with PCIE connector with it on the connector slot.
Preferably, the connector slots are provided with a plurality of connector slots, and the plurality of connector slots are installed on the mainboard, so that the signal transmission between the mainboard and the PCIE is ensured, and the quality of the signal transmission between the PCIE and the mainboard is ensured.
Preferably, the number of the slots of the connector is five, and the slots are used for being connected with the PCIE, so that signal transmission is ensured.
Preferably, the height of the connector slot is not lower than the side wall of the chassis, so that the vertical insertion of the PCIE connector is facilitated, the stable connection between the connector slot and the PCIE connector is ensured, the signal transmission efficiency is improved, and the signal transmission quality is ensured.
Preferably, five PCIE connectors are provided, and the five PCIE connectors correspond to the five connector slots one to one, so that the PCIE connectors can be connected to the connector slots, transmission of signals is ensured, and quality of signal transmission is improved.
Preferably, the PCIE connector is provided with a wear-resistant layer, so that the PCIE connector is prevented from being frequently pulled out and worn, and the service life of the PCIE connector is greatly prolonged.
The utility model has the advantages that:
1) this device realizes that the PCIE connector disect insertion connector slot in through increasing the connector slot on the mainboard, does not need the riser card to do the switching, has not only guaranteed signal transmission's between PCIE and the mainboard quality, has reduced manufacturing cost moreover.
2) The device is provided with a plurality of connector slots, and the plurality of connector slots are arranged on the mainboard, so that the signal transmission between the mainboard and the PCIE is ensured, and the quality of the signal transmission between the PCIE and the mainboard is ensured; five connectors slots are arranged and used for being connected with the PCIE, so that signal transmission is guaranteed; the height of the connector slot is not lower than the side wall of the chassis, so that the PCIE connector can be conveniently and vertically inserted, the stable connection of the connector slot and the PCIE connector is ensured, the signal transmission efficiency is improved, and the signal transmission quality is ensured.
3) Five PCIE connectors are arranged in the device, correspond to the five connector slots one by one, and can be connected with the connector slots, so that signal transmission is ensured, and the quality of signal transmission is improved; be equipped with the wearing layer on the PCIE connector, prevent often to pull out and insert wearing and tearing PCIE connector, improved the life of PCIE connector greatly.
Drawings
Fig. 1 is a schematic diagram of a prior art structure.
Fig. 2 is a schematic structural diagram of a novel PCIE connector of the present invention.
In the figure: 1. a chassis; 2. a connector slot; 3. a main board; 4. a PCIE connector; 5. a riser card.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to fig. 1-2, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description of the present invention, and do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the present invention.
A novel PCIE connector comprises a case 1, wherein a mainboard 3 is installed inside the case 1, a connector slot2 is installed on the mainboard 3, and a PCIE connector 4 matched with the connector slot2 is installed on the connector slot 2; this device is through increasing connector slot2 on the mainboard 3, realizes in 4 disect insertions connector slot2 of PCIE connector, does not need the riser card 5 to do the switching, has not only guaranteed signal transmission's between PCIE and the mainboard 3 quality, has reduced manufacturing cost moreover.
Connector slot2 is equipped with a plurality ofly, and a plurality of connector slot2 are installed on mainboard 3, have guaranteed the signal transmission between mainboard 3 and the PCIE, have guaranteed the quality of signal transmission between PCIE and the mainboard 3.
The five connectors slot2 are used for being connected with the PCIE, and signal transmission is guaranteed.
The height of the connector slot2 is not lower than that of the side wall of the chassis 1, so that the PCIE connector 4 can be conveniently and vertically inserted, the stable connection of the connector slot2 and the PCIE connector 4 is ensured, the signal transmission efficiency is improved, and the signal transmission quality is ensured.
Five PCIE connectors 4 are arranged, and the five PCIE connectors 4 are in one-to-one correspondence with the five connector slots 2, so that the PCIE connectors are ensured to be connected with the connector slots 2, the transmission of signals is ensured, and the quality of signal transmission is improved.
Be equipped with the wearing layer on PCIE connector 4, prevent often to pull out and insert wearing and tearing PCIE connector 4, improved the life of PCIE connector 4 greatly.
The foregoing is merely exemplary and illustrative of the structure of the invention, and various modifications, additions and substitutions as described in the detailed description may be made by those skilled in the art without departing from the structure or exceeding the scope of the invention as defined in the claims.
Claims (5)
1. A novel PCIE connector comprises a chassis, wherein a mainboard is arranged in the chassis, and a connector slot is arranged on the mainboard;
and the height of the connector slot is not lower than that of the side wall of the case.
2. The novel PCIE connector of claim 1, wherein there are a plurality of connector slots, and a plurality of connector slots are mounted on a motherboard.
3. The novel PCIE connector of claim 1, wherein there are five of said connector slots.
4. The novel PCIE connector of claim 1, wherein there are five PCIE connectors, and five PCIE connectors are in one-to-one correspondence with five connector slots.
5. The novel PCIE connector of claim 1, wherein a wear layer is provided on the PCIE connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022894420.2U CN213904338U (en) | 2020-12-03 | 2020-12-03 | Novel PCIE connector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022894420.2U CN213904338U (en) | 2020-12-03 | 2020-12-03 | Novel PCIE connector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213904338U true CN213904338U (en) | 2021-08-06 |
Family
ID=77100512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022894420.2U Active CN213904338U (en) | 2020-12-03 | 2020-12-03 | Novel PCIE connector |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213904338U (en) |
-
2020
- 2020-12-03 CN CN202022894420.2U patent/CN213904338U/en active Active
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| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |