CN213813783U - Detection apparatus for train vehicle antenna - Google Patents
Detection apparatus for train vehicle antenna Download PDFInfo
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- CN213813783U CN213813783U CN202022454269.0U CN202022454269U CN213813783U CN 213813783 U CN213813783 U CN 213813783U CN 202022454269 U CN202022454269 U CN 202022454269U CN 213813783 U CN213813783 U CN 213813783U
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Abstract
The application discloses detection device of train-mounted antenna, including treater, signal synthesis circuit, power amplifier circuit, current detection circuit, power supply circuit, display module and at least one control unit. The control component is used for outputting an amplitude adjusting signal, a frequency adjusting signal and/or a mode selecting signal to the processor based on the operation of a user; the processor is also used for outputting a digital signal to the signal synthesis circuit; the signal synthesis circuit converts the digital signal into an analog signal and outputs the analog signal to the power amplification circuit; the power amplification circuit is used for amplifying the power of the analog signal and outputting the obtained antenna driving signal to a train-mounted antenna; the current detection circuit is used for detecting the power amplifier current and outputting the power amplifier current to the processor; the display module is used for displaying the test content and the test information related to the mode selection signal. Therefore, the detection of various electrical parameters of the train-mounted antenna is completed, and the detection of the antenna can be completed without dismounting of the detection device, so that the detection efficiency is improved.
Description
Technical Field
The application relates to the technical field of railway equipment, and more particularly relates to a detection device for a train-mounted antenna.
Background
The train-mounted antenna is generally installed at the bottom of a train and is connected with the train-mounted signal equipment through a cable, when the train passes through a ground detection point, the train-mounted antenna resonates with the ground antenna of the ground detection point to realize information exchange, and then the train-mounted signal equipment performs information processing on signals received by the train-mounted antenna from the ground antenna and realizes automatic control on the train according to the obtained information.
In order to ensure effective information exchange between the train-mounted antenna and a ground antenna, impedance and resonance point frequency parameters of the train-mounted antenna need to meet corresponding standards, and therefore, when the train-mounted antenna leaves a factory and before installation, electrical parameters of the train-mounted antenna need to be detected. Need many times dismouting when testing, efficiency is lower.
SUMMERY OF THE UTILITY MODEL
In view of this, the present application provides a detection apparatus for a train antenna, which is used for detecting an electrical parameter of the train antenna to improve detection efficiency.
In order to achieve the above object, the following solutions are proposed:
the utility model provides a train vehicle antenna's detection device, includes treater, signal synthesis circuit, power amplifier circuit, current detection circuit, power supply circuit, display module and at least one control unit, the treater is provided with first output, second output, first input and second input, wherein:
the control component is in signal connection with the first input end and is used for outputting an amplitude adjusting signal, a frequency adjusting signal and/or a mode selecting signal to the processor based on the operation of a user;
the first output end is connected with the input end of the signal synthesis circuit and is used for outputting a digital signal related to the amplitude adjusting signal and/or the frequency adjusting signal;
the output end of the signal synthesis circuit is connected with the input end of the power amplifier circuit and is used for converting the digital signal into an analog signal;
the input end of the power amplifier circuit is connected with the output end of the signal synthesis circuit and is used for receiving the analog signal and amplifying the power of the analog signal to obtain an antenna driving signal;
the power amplification circuit is provided with a driving output end, and the driving output end is used for connecting a signal input end of a train-mounted antenna to be detected through a cable and outputting an antenna driving signal to the train-mounted antenna;
the current detection circuit is connected with the drive output end and used for detecting the power amplifier current of the drive output end, the current detection circuit is also connected with the second input end, and the second input end is used for receiving the power amplifier current;
the display module is connected with the second output end and is used for displaying test content and test information related to the mode selection signal, wherein the test information comprises the power amplifier current and/or the frequency and amplitude of the antenna driving signal;
the power supply circuit is used for supplying power to other components based on a mains supply network or a battery.
Optionally, the processor includes an FPGA element and a DSP element, wherein:
the FPGA element is respectively in signal connection with the control component, the display module and the signal synthesis circuit;
the DSP element is connected with the FPGA element and is also in signal connection with the current detection circuit.
Optionally, the DSP element is further connected to a watchdog circuit.
Optionally, the signal synthesis circuit includes a DA conversion circuit.
Optionally, the current detection circuit includes a current sensor and an AD sampling circuit, wherein:
the current sensor is used for acquiring an output current signal of the driving output end;
the AD sampling circuit is in signal connection with the current sensor and is used for performing AD conversion on the output current signal to obtain the power amplifier current.
Optionally, the power circuit includes a power adapter, a battery management module, a power switch, a power conversion circuit, and a rechargeable battery.
Optionally, the control component is a mode selection key, a frequency adjustment key or an amplitude adjustment key.
Optionally, the detection apparatus further includes a display panel, wherein:
the control part, the display module and the driving output end are arranged on the display panel.
Optionally, further comprising a suitcase, wherein:
the processor, the signal synthesis circuit, the power amplifier circuit, the current detection circuit, the power supply circuit, the display module, the control component and the display panel are all arranged in the suitcase.
According to the technical scheme, the detection device for the train-mounted antenna comprises a processor, a signal synthesis circuit, a power amplification circuit, a current detection circuit, a power supply circuit, a display module and at least one control component. The control component is used for outputting an amplitude adjusting signal, a frequency adjusting signal and/or a mode selecting signal to the processor based on the operation of a user; the processor is also used for outputting a digital signal related to the amplitude adjusting signal and/or the frequency adjusting signal to the signal synthesis circuit; the signal synthesis circuit converts the digital signal into an analog signal and outputs the analog signal to the power amplification circuit; the power amplification circuit is used for amplifying the power of the analog signal to obtain an antenna driving signal and outputting the antenna driving signal to a train-mounted antenna through a driving output end of the antenna driving signal; the current detection circuit is used for detecting the power amplifier current at the output end of the power amplifier and outputting the power amplifier current to the processor; the display module is used for displaying the test content and the test information related to the mode selection signal. Therefore, the detection of various electrical parameters of the train-mounted antenna is completed, and the detection of the antenna can be completed without dismounting of the detection device, so that the detection efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a detection device for a train antenna according to an embodiment of the present application;
fig. 2 is a circuit diagram of a detection device for a train antenna according to an embodiment of the present application;
fig. 3 is a circuit diagram of a detection device for a train antenna according to an embodiment of the present application;
fig. 4 is a circuit diagram of a detection device for a train antenna according to an embodiment of the present application;
fig. 5 is a schematic view of a display panel of the detecting device according to the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
Fig. 1 is a circuit diagram of a detection device for a train-mounted antenna according to an embodiment of the present application.
As shown in fig. 1, the detection apparatus provided in this embodiment is used for detecting an electrical parameter of a train antenna, and specifically includes a processor 10, a signal synthesis circuit 20, a power amplifier circuit 30, a current detection circuit 40, a power supply circuit 50, a display module 60, and one or more control components 70. In order to enable connection to peripheral devices, the processor is provided with at least a first output 11, a second output 12, a first input 13 and a second input 14.
The first input end is connected with the control part, and the second output end is connected with the current detection circuit; the first output end is connected with the signal synthesis circuit, and the second output end is connected with the display module. The power module in this application provides the electric energy that work needs to other components and parts based on commercial power network or battery.
The control component is actually a control key or a control knob capable of receiving a user operation instruction, and when a user presses or twists, one or more signals including an amplitude adjustment signal, a frequency adjustment signal and a mode selection signal are input to the user through the first input end based on the input action of the user. The processor outputs a digital signal with a preset amplitude and a preset frequency through a first output end of the processor based on the signal; the mode selection signal determines the operation mode of the detection apparatus, such as a fixed frequency test mode or a frequency sweep test mode.
The input end of the signal synthesis circuit is connected with the first output end of the processor, and when the first output end outputs a digital signal, the signal synthesis circuit is used for performing digital-to-analog conversion on the digital signal to obtain an analog signal with corresponding frequency, and outputting the analog signal to the power amplification circuit through the output end of the signal synthesis circuit.
The input end of the power amplifier circuit is connected with the output end of the signal synthesis circuit and is used for amplifying the power of the analog signal output by the signal synthesis circuit so as to obtain an analog signal with the amplitude meeting the requirement, and for the sake of distinction, the amplified signal is called as an antenna driving signal; the power amplifier circuit is provided with a driving output end 31, the driving output end is a power amplifier output connector in actual implementation, and the power amplifier output connector is used for being connected with a signal input end of a train-mounted antenna to be detected through a circuit, so that the antenna driving signal is loaded to the train-mounted antenna.
The current detection circuit is connected with the power amplification circuit or the power amplification output end of the power amplification circuit and is used for detecting the power amplification current output by the power amplification circuit; the output end of the current detection circuit is connected with the second input end of the processor and used for outputting the power amplifier current to the processor, so that the processor can detect the working current of the train-mounted antenna in the working state of corresponding frequency, and the power amplifier current is the working current.
The input end of the display module is connected with the second output end of the processor and is used for receiving corresponding data which are output by the processor and need to be displayed and displaying corresponding contents based on the received data, the displayed contents include but are not limited to test contents and test information, and the test information includes but is not limited to power amplifier current, frequency and amplitude of the antenna and the like.
According to the technical scheme, the detection device for the train-mounted antenna comprises a processor, a signal synthesis circuit, a power amplifier circuit, a current detection circuit, a power supply circuit, a display module and at least one control component. The control component is used for outputting an amplitude adjusting signal, a frequency adjusting signal and/or a mode selecting signal to the processor based on the operation of a user; the processor is also used for outputting a digital signal related to the amplitude adjusting signal and/or the frequency adjusting signal to the signal synthesis circuit; the signal synthesis circuit converts the digital signal into an analog signal and outputs the analog signal to the power amplification circuit; the power amplification circuit is used for amplifying the power of the analog signal to obtain an antenna driving signal and outputting the antenna driving signal to a train-mounted antenna through a driving output end of the antenna driving signal; the current detection circuit is used for detecting the power amplifier current at the output end of the power amplifier and outputting the power amplifier current to the processor; the display module is used for displaying the test content and the test information related to the mode selection signal. Therefore, the detection of various electrical parameters of the train-mounted antenna is completed, and the detection of the antenna can be completed without dismounting of the detection device, so that the detection efficiency is improved.
The detection device can work in two working modes, including a frequency sweep test mode and a fixed frequency test mode. When in a frequency sweep test mode, the device automatically generates an impedance curve and a current curve of the antenna under different frequencies so as to determine the resonance point of the antenna; while in the fixed frequency test mode, the impedance, voltage and current of the antenna are tested at a fixed frequency.
In one embodiment of the present application, the processor is comprised of FPGA components and DSP components, which are connected by a data bus, as shown in fig. 2. The FPGA element is respectively in signal connection with the control component, the display module and the signal synthesis circuit; the DSP element current detection circuit is in signal connection. And a watchdog circuit 80 is also connected to the DSP element.
FPGA design is not simple chip research, and is mainly used for designing products in other industries by utilizing an FPGA mode. Unlike ASICs, FPGAs have found widespread use in the communications industry. Through analysis of global FPGA product markets and related suppliers, the development direction of related technologies in the future can be found by combining the actual situation of China and the leading FPGA products in China, and the method has a very important promoting effect on the comprehensive improvement of the scientific and technological level of China.
Compared with the chip design in the traditional mode, the FPGA chip is not only limited to research and design chips, but also can be optimally designed by means of a specific chip model aiming at products in more fields. From the viewpoint of chip devices, the FPGA itself constitutes a typical integrated circuit in a semi-custom circuit, which includes a digital management module, an embedded unit, an output unit, an input unit, and the like. On the basis, the FPGA chip needs to be comprehensively designed by focusing attention on comprehensive chip optimization, and brand new chip functions are added by improving the current chip design, so that the simplification and the performance improvement of the whole chip structure are realized.
Compared with other kinds of chip designs, a higher threshold is generally set and a more strict basic design flow is formulated for an FPGA chip. Particularly, in the design, the relevant schematic diagram of the FPGA should be closely combined, so that the large-scale special chip design is realized. By using the Matlab and the C language special design algorithm, the comprehensive and smooth conversion can be realized, so that the design idea of the current mainstream chip is ensured to be met. On the premise, if the design idea is selected, various components and corresponding design languages are required to be integrated in order, so that chip program design with high usability and readability is guaranteed. The debugging of the board computer, the code simulation and other related design operations can be realized by using the FPGA, and the current code writing mode and the design scheme can be ensured to meet the specific design requirements. Besides, the rationality should be placed in the primary position with respect to the design algorithm, thereby realizing the optimized project design effect and optimizing the effectiveness of chip operation. Therefore, as a designer, firstly, a specific algorithm module is constructed, so as to complete the chip code design related to the specific algorithm module. The reason is that the pre-designed codes help to ensure the reliability of the algorithm, and the overall chip design effect can be obviously optimized. On the premise of comprehensively completing the debugging and simulation testing of the board computer, the consumption period of the whole chip can be fundamentally shortened, and meanwhile, the existing hardware overall structure is optimized. For example, when some non-standard hardware interfaces are developed, the new product design mode is usually used.
The main difficulty of FPGA design is to be familiar with hardware systems and internal resources, ensure that the designed language can realize effective cooperation between components and improve the readability and the utilization rate of programs. This also places relatively high demands on the designer, and experience accumulation over multiple projects is required to meet the relevant demands.
Rationality needs to be considered in the algorithm design, the final completion effect of the project is guaranteed, a problem solving scheme is provided according to the actual situation of the project, and the running efficiency of the FPGA is improved. And after the algorithm is determined, a module should be reasonably constructed, so that code design at the later stage is facilitated. The pre-designed codes can be utilized during code design, so that the working efficiency is improved, and the reliability is enhanced. And compiling a test platform, performing simulation test and board-level debugging on the codes, and completing the whole design process. The FPGA is different from the ASIC, the development period is short, the structure of hardware can be changed by combining with design requirements, and under the condition that a communication protocol is immature, an enterprise can be helped to rapidly launch a new product, so that the requirement of non-standard interface development is met.
A DSP is a digital signal processing technology, and a DSP chip is a chip capable of implementing the digital signal processing technology. The DSP chip is a fast and powerful microprocessor, and is characterized in that the DSP chip can process data in real time. The DSP chip adopts a Harvard structure with separated programs and data, is provided with a special hardware multiplier and can be used for quickly realizing various digital signal processing algorithms. In the background of the present digital age, DSP has become a fundamental device in the fields of communications, computers, consumer electronics, and the like.
The emergence of DSP chips is a requirement of the times, and with the rapid development of computers and information technologies, digital signal processing technologies are developed and rapidly developed. Digital signal processing can only be done by means of a microprocessor before the DSP chip is present. However, the low processing speed of the microprocessor is not fast, and the high-speed real-time requirement of larger and larger information volume cannot be met at all. Therefore, the application of faster and more efficient signal processing methods is an increasingly urgent social demand.
The signal synthesis circuit in the application comprises a DA conversion circuit, namely, the DA conversion circuit is used for realizing digital-to-analog conversion.
The current detection circuit includes a current sensor 41 and an AD sampling circuit 42, as shown in fig. 3. The current sensor is a Hall current sensor and is used for acquiring an output current signal of the driving output end; the AD sampling circuit is in signal connection with the current sensor and is used for performing AD conversion on the output current signal to obtain power amplifier current.
The power circuit includes a power adapter 51, a battery management module 52, a power switch 53, a power conversion circuit 54, and a rechargeable battery (not shown), as shown in fig. 4. The power adapter adopts a finished product power module, and an interface of the power adapter is transformed to be used as a charging/power supply of the testing device; the battery management module adopts a power management chip BQ24133 of TI company to perform charge and discharge management on the battery, and has the functions of electric quantity detection, overvoltage and undervoltage protection, charge and discharge overcurrent protection, over-temperature monitoring and the like;
the power switch adopts a switch control chip LTC2954 to control the on and off of the switch; when the battery voltage is low, the switch is automatically closed; the power conversion circuit is used for converting the voltage of the battery or the voltage of the power adapter into the voltage required by the circuit components.
The detection device in this embodiment further includes a suitcase, wherein the processor, the signal synthesis circuit, the power amplifier circuit, the current detection circuit, the power circuit, the display module, and the control unit are disposed in the suitcase, and the corresponding display panel is disposed in the suitcase, as shown in fig. 5. The control part, the display module and the driving output end are all arranged on the panel.
And the control part comprises a mode selection key, a frequency adjustment key and an amplitude adjustment key.
Considering that the nominal frequency of the train-mounted antenna is 500Hz, 1000Hz and 2000Hz, when the automatic frequency sweep test is carried out:
500Hz coil sweep range: 450 Hz, 550Hz and 1Hz step by step;
1000Hz coil sweep range: 950 and 1050Hz, stepping by 1 Hz;
sweep range of 2000Hz coil: 1950 and 2050Hz, and the step is 1 Hz.
When any frequency point is adjusted:
500Hz frequency range: 450 Hz, 550Hz and 1Hz step by step;
1000Hz frequency range: 950 and 1050Hz, stepping by 1 Hz;
2000Hz frequency range: 1950 and 2050Hz, and the step is 1 Hz.
Adjusting range of power amplifier output amplitude: 5-20 Vrms.
Current measurement range: 0-1A, and direct current output.
The battery capacity in this application is 6500mAh, charger voltage: 15V, charging time: 3h, the standby time is 7 days.
The detection device can be used as a universal test platform, and different software can be compiled to realize different test functions. The device can output power amplification signals with different frequencies, different voltages and different modulation signals, provides test conditions for different antennas, meets the test requirements of various antennas, and comprises the functions of antenna coil resonance point test, current, voltage and impedance measurement,
the embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one of skill in the art, embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the true scope of the embodiments of the application.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The technical solutions provided by the present application are introduced in detail, and specific examples are applied in the description to explain the principles and embodiments of the present application, and the descriptions of the above examples are only used to help understanding the method and the core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (9)
1. The utility model provides a detection apparatus for train vehicle antenna, its characterized in that, includes treater, signal synthesis circuit, power amplifier circuit, current detection circuit, power supply circuit, display module and at least one control unit, the treater is provided with first output, second output, first input and second input, wherein:
the control component is in signal connection with the first input end and is used for outputting an amplitude adjusting signal, a frequency adjusting signal and/or a mode selecting signal to the processor based on the operation of a user;
the first output end is connected with the input end of the signal synthesis circuit and is used for outputting a digital signal related to the amplitude adjusting signal and/or the frequency adjusting signal;
the output end of the signal synthesis circuit is connected with the input end of the power amplifier circuit and is used for converting the digital signal into an analog signal;
the input end of the power amplifier circuit is connected with the output end of the signal synthesis circuit and is used for receiving the analog signal and amplifying the power of the analog signal to obtain an antenna driving signal;
the power amplification circuit is provided with a driving output end, and the driving output end is used for connecting a signal input end of a train-mounted antenna to be detected through a cable and outputting an antenna driving signal to the train-mounted antenna;
the current detection circuit is connected with the drive output end and used for detecting the power amplifier current of the drive output end, the current detection circuit is also connected with the second input end, and the second input end is used for receiving the power amplifier current;
the display module is connected with the second output end and is used for displaying test content and test information related to the mode selection signal, wherein the test information comprises the power amplifier current and/or the frequency and amplitude of the antenna driving signal;
the power supply circuit is used for supplying power to other components based on a mains supply network or a battery.
2. The detection apparatus of claim 1, wherein the processor comprises an FPGA element and a DSP element, wherein:
the FPGA element is respectively in signal connection with the control component, the display module and the signal synthesis circuit;
the DSP element is connected with the FPGA element and is also in signal connection with the current detection circuit.
3. The detection device of claim 2, wherein a watchdog circuit is further coupled to the DSP element.
4. The detection apparatus of claim 1, wherein the signal synthesis circuit comprises a DA conversion circuit.
5. The sensing device of claim 1, wherein the current sensing circuit comprises a current sensor and an AD sampling circuit, wherein:
the current sensor is used for acquiring an output current signal of the driving output end;
the AD sampling circuit is in signal connection with the current sensor and is used for performing AD conversion on the output current signal to obtain the power amplifier current.
6. The detection device of claim 1, wherein the power circuit comprises a power adapter, a battery management module, a power switch, a power conversion circuit, and a rechargeable battery.
7. The detecting device for detecting the rotation of a motor rotor as claimed in claim 1, wherein the control component is a mode selecting key, a frequency adjusting key or an amplitude adjusting key.
8. The inspection device of any one of claims 1 to 7, further comprising a display panel, wherein:
the control part, the display module and the driving output end are arranged on the display panel.
9. The test device of claim 8, further comprising a suitcase, wherein:
the processor, the signal synthesis circuit, the power amplifier circuit, the current detection circuit, the power supply circuit, the display module, the control component and the display panel are all arranged in the suitcase.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022454269.0U CN213813783U (en) | 2020-10-29 | 2020-10-29 | Detection apparatus for train vehicle antenna |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022454269.0U CN213813783U (en) | 2020-10-29 | 2020-10-29 | Detection apparatus for train vehicle antenna |
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| CN213813783U true CN213813783U (en) | 2021-07-27 |
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| CN202022454269.0U Active CN213813783U (en) | 2020-10-29 | 2020-10-29 | Detection apparatus for train vehicle antenna |
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