CN213780276U - Power output module of analog battery - Google Patents

Abstract

The utility model relates to a simulation battery technical field, in order to solve the technical problem that power output is not high among the prior art, the output stability is poor, the utility model provides a power output module of simulation battery, power output module includes first group power pipe and second group power pipe, power output module still includes constant current source control circuit, constant current source control circuit is provided with NPN triode Q14, NMOS pipe Q12, and NPN triode Q14's collecting electrode is connected and leads to ground resistance R36 ground connection with NMOS pipe Q12's grid, and NPN triode Q14's base and NMOS pipe Q12's source electrode are connected, and NPN triode Q14's projecting pole and negative power-V are connected, and the parallel connection has resistance R41 and R42 between NPN triode Q14's projecting pole and its base, NMOS pipe Q12's drain electrode with the base of second group power pipe is connected.

Description

Power output module of analog battery

Technical Field

The utility model relates to a simulation battery technical field particularly, relates to a power output module of simulation battery.

Background

With the use of a large number of lithium batteries and polymer batteries in consumer electronics, testing of the electronic products with real batteries affects testing efficiency, and simulated batteries are often used to replace the real batteries, which can also be referred to as battery simulators. The fast-charging mobile power supply product needs to use a large-current detection function, higher requirements are provided for power output strength and output stability, the conventional analog battery is difficult to meet corresponding requirements, and great inconvenience is encountered during product research, development, debugging and production line production testing.

SUMMERY OF THE UTILITY MODEL

In order to solve the technical problems of low power output and poor output stability in the prior art, the utility model provides a power output module, which comprises a constant current source control circuit, a first group of power tubes and a second group of power tubes which are connected in parallel and flow-equalized for improving the output power, and power resistors for preventing surge pulse and resisting impact are connected between the emitting electrodes of the first group of power tubes and the emitting electrodes of the second group of power tubes and output lines; implement the utility model provides a power output unit circuit has promoted output and power output's stability, has reached the purpose of constant current control.

In order to achieve the above purpose, the technical scheme of the utility model is realized like this:

a power output module of a simulated battery comprises a first group of power tubes and a second group of power tubes, and further comprises a constant current source control circuit, wherein the constant current source control circuit is provided with an NPN triode Q14 and an NMOS tube Q12, a collector of the NPN triode Q14 is connected with a grid electrode of the NMOS tube Q12 and is grounded through a ground resistor R36, a base electrode of the NPN triode Q14 is connected with a source electrode of the NMOS tube Q12, an emitter electrode of the NPN triode Q14 is connected with a negative power supply-V, resistors R41 and R42 are connected between the emitter electrode of the NPN triode Q14 and the base electrode of the NPN triode Q14 in parallel, and a drain electrode of the NMOS tube Q12 is connected with the base electrode of the second group of power tubes.

Further, the drain of the NMOS transistor Q12 is further connected to the cathode of the diode D3, the anode of the diode D3 is connected to the cathode of the diode D1, the anode of the diode D1 is connected to the voltage control module (21), and the cathode of the diode D1 is connected to the base of the first group of power transistors.

Further, the emitter of the NPN transistor Q14 is connected to ground through a capacitor C65.

Preferably, the emitters of the first group of power tubes are connected with the emitters of the second group of power tubes, the collectors of the first group of power tubes are connected with a power supply V + P, the collectors of the second group of power tubes are connected with the ground, and a connection node between the emitters of the first group of power tubes and the emitters of the second group of power tubes is an output line of the power output module.

Furthermore, power resistors for preventing surge pulse and resisting impact are connected between the emitting electrodes of the first group of power tubes and between the emitting electrodes of the second group of power tubes and the output line.

Further, resistors R13, R14 and R15 are connected between the base of the first group of power tubes and the output line of the power output module.

Implement the utility model discloses the beneficial effect who brings is: implement the utility model provides a power output unit circuit has promoted output and power output's stability, has reached the purpose of constant current control.

Drawings

Fig. 1 is a system block diagram of a four-string analog battery provided in an embodiment of the present invention;

fig. 2 is a control block diagram of a power output unit of a four-string analog battery according to an embodiment of the present invention;

fig. 3 is a block diagram of an input voltage branch according to an embodiment of the present invention;

fig. 4 is a block diagram of a power conversion two-stage branch provided in the embodiment of the present invention;

fig. 5 is a block diagram of a reference voltage branch provided by an embodiment of the present invention;

fig. 6 is a schematic diagram of a first digital-to-analog conversion module according to an embodiment of the present invention;

fig. 7 is a schematic diagram of a combination of a plurality of circuit modules according to an embodiment of the present invention;

fig. 8 is a system block diagram of a low-power analog battery unit according to an embodiment of the present invention;

fig. 9 is a block diagram of a power supply of a low-power analog battery unit according to an embodiment of the present invention;

fig. 10 is a schematic diagram of a second digital-to-analog conversion module according to an embodiment of the present invention;

fig. 11 is a schematic diagram of a low power analog battery unit power supply provided by an embodiment of the present invention;

fig. 12 is a schematic diagram of a series connection of low-power analog batteries according to an embodiment of the present invention.

In the figure: a power frequency transformer 1; an intermediate voltage tap interface 2; a power panel 3; a power output interface 4; a control panel 5; a first master control module 15; a first digital-to-analog conversion module 20; a voltage control module 21; an output voltage amplification module 22; an output current amplification module 23; a power output module 24; an output protection module 25; a current gear switching module 26; a current sampling module 27; a voltage analog-to-digital conversion module 28; a current analog-to-digital conversion module 29; an analog battery voltage control module 31; an analog battery constant current source control module 32; a gear A protection circuit 33; uA gear protection circuit 34; a current detection module 35; a second master control module 41; a second digital-to-analog conversion module 42; and a current gear protection module 43.

Detailed Description

In order to make the technical solution of the present invention better understood, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Referring to fig. 1, fig. 1 is a system diagram of four strings of analog batteries provided by the embodiment of the present invention, which includes a power supply unit, a power output unit, a low-power analog battery unit, and a control panel 5, wherein the power supply unit includes a power frequency transformer 1 and a power panel 3.

The power frequency transformer reduces the voltage of AC 220V into low-voltage alternating current, and the power panel 3 rectifies and filters the low-voltage alternating current into direct current to supply power to the control panel 5, the power output unit and the low-power analog battery unit.

The low-power simulation battery unit is formed by connecting 3 independent low-power simulation batteries in series, namely a first string of simulation batteries, a second string of simulation batteries and a third string of simulation batteries, and simulates the middle tap voltage of 4 strings of batteries; 3 paths of independent low-power analog batteries, voltage can be independently set for each string of low-power analog batteries through the control panel 5, and the voltage is independently calibrated; the power output unit and the low-power simulation battery unit are both provided with fans, and the power module is cooled through air convection, so that the stable work of the module is guaranteed; the average power in the 3 paths of total power 30s is greater than 3W, the fan is started, and the fan is closed for 1 minute when the average power is less than 3W; the control panel 5 is used for displaying information such as voltage, current and power, and can control the output voltage of the whole machine through the operation of the LCD touch screen.

It can be seen that the four strings of analog batteries provided by the embodiment of the utility model adopt the power output unit and the low-power analog battery unit, the power output unit can output a high-power supply, and the battery pack is suitable for high-current detection; the low-power analog battery unit can output a low-power supply and is suitable for low-current detection; the output voltage VOut + of the power output unit is higher than the voltage of the low-power analog battery unit, the voltage difference between the power output unit and the third string of analog batteries forms a virtual fourth string of analog batteries, the cathode of the power output unit is connected with the cathode of the first string of analog batteries, the anode of the first string of analog batteries is connected with the cathode of the second string of analog batteries, the anode of the second string of analog batteries is connected with the cathode of the third string of analog batteries, the anodes of the first string of analog batteries, the anodes of the second string of analog batteries and the anodes of the third string of analog batteries respectively output voltages VOut1+, VOut2+, VOut3+, and the three strings of analog batteries are connected in series, and a middle voltage tap is respectively arranged between two adjacent strings of analog batteries. With reference to fig. 2 and 8, the output interface includes a power output interface 4 and an intermediate voltage tap interface 2, the power output unit is connected to the power output interface 4, and the intermediate voltage tap is connected to the intermediate voltage tap interface 2; compared with the prior art, the combined implementation mode can well adapt to the functions of large current detection and small current detection, and has strong adaptability and low cost.

The embodiment of the utility model provides a four cluster of analog batteries adopt power frequency transformer as primary power supply, and non-ordinary switching power supply, and the linear DC power supply ware that produces through rectification filtering and steady voltage has high stability, low noise, low drift and the powerful strong beneficial effect of load.

Referring to fig. 2, fig. 2 is a control block diagram of a power output unit of four strings of analog batteries according to an embodiment of the present invention, which includes a first main control module 15, a first digital-to-analog conversion module 20, a voltage control module 21, a power output module 24, a current sampling module 27, an output current amplification module 23, an output voltage amplification module 22, and a power output interface 4.

The first main control module 15 is connected to the first digital-to-analog conversion module 20, the current sampling module 27, the output current amplifying module 23, and the output voltage amplifying module 22, respectively.

The first main control module 15 is used for system control of the power output unit, and the first digital-to-analog conversion module 20 is used for converting a digital data signal of the first main control module 15 into an analog signal and generating a reference voltage;

the first digital-to-analog conversion module 20 is connected to the voltage control module 21, and is configured to set a VSet control voltage of the voltage control module 21;

the voltage control module 21 is connected with the power output module 24 and is used for setting the output voltage of the power output unit;

the output current amplifying module 23 is connected with the power output module 24 and used for collecting output current; the output current amplification module 23 is further connected with the voltage control module 21, and is configured to obtain a voltage VOutClt at the non-inverting input end of the operational amplifier in the voltage control module 21;

the output current amplifying module 23 is connected to the first digital-to-analog conversion module 20, and is configured to obtain an ISet control current of the first digital-to-analog conversion module 20;

the output current amplifying module 23 is connected to the first main control module 15, and is configured to feed back the output current to the first main control module 15;

the output voltage amplifying module 22 is respectively connected with the power output module 24 and the first main control module 15, and the output voltage amplifying module 22 is used for obtaining the output voltage of the power output module 24 and feeding the output voltage back to the first main control module 15;

the current sampling module 27 is respectively connected with the power output module 24 and the first main control module 15, and the current sampling module 27 samples the current of the power output module 24 and feeds the current back to the first main control module 15;

further, in order to improve the resolution ratio, a high-precision voltage value is obtained, and is used for a display screen to display a high-precision numerical value, the voltage analog-to-digital conversion module 28 is further included, the voltage analog-to-digital conversion module 28 is respectively connected with the output voltage amplification module 22 and the first main control module 15, and the voltage analog-to-digital conversion module 28 converts an analog quantity into a digital quantity through high-resolution sampling and feeds the digital quantity back to the first main control module 15. Although the same output voltage feedback is used, the difference from the output voltage amplifying module 22 is that the output voltage amplifying module 22 sends an analog signal to the first main control module 15, which is fast in speed and timely in response, so that the first main control module 15 can process the analog signal quickly, but the first main control module 15 cannot process the analog signal into high-precision data, and the voltage analog-to-digital conversion module 28 has a very high resolution, and directly sends the digital signal to the first main control module 15 after processing, and finally, the digital high-precision voltage value can be displayed through a display screen, and the high precision and the high resolution can reach 1mV, so that the voltage analog-to-digital conversion module has a very important reference function for testers.

Furthermore, in order to improve the resolution ratio, obtain the high accuracy current value for the display screen shows high accuracy numerical value, still include current analog-to-digital conversion module 29, current analog-to-digital conversion module 29 is connected with current sampling module 27, first host system 15 respectively, and current analog-to-digital conversion module 29 is through the high resolution sampling, converts the analog quantity into the digital quantity, feeds back to first host system 15, can the accurate stand-by current and the stand-by power consumption who tests out the product. The current sampling module 27 sends analog signals, so that the speed is high, the response is timely, the first main control module 15 can process the analog signals quickly, but the first main control module 15 cannot process the analog signals into high-precision data, the current analog-to-digital conversion module 29 has high resolution, the processed analog signals are directly sent to the first main control module 15, and finally, the high-precision current values can be displayed through the display screen.

Further, in order to provide output protection and prevent the power output module 24 from being damaged by large current and other conditions, an output protection module 25 is further arranged, the output protection module 25 is respectively connected with the power output module 24, the first main control module 15 and the power output interface 4, and the output protection module 25 is controlled by the first main control module 15 to realize on-off between the power output module 24 and the power output interface 4;

further, in order to adapt to the functions of large current detection and small current detection, the power output module 24, the first main control module 15 and the power output interface 4 are respectively connected to the current gear switching module 26, and the current gear switching module 26 is controlled by the first main control module 15 to realize the switching of the current gear between the power output module 24 and the power output interface 4;

further, in order to communicate with an external device, the wireless communication device further comprises an RS485 communication module 12, the RS485 communication module 12 is connected with the first main control module 15, and the external device can communicate with the first main control module 15 through a DB9 communication interface;

further, in order to start the fan to blow air and reduce the temperature when the temperature reaches a threshold value, a fan control module 13 is further arranged, and the fan control module 13 is connected with a first main control module 15, so that the fan can be started or closed;

furthermore, in order to adjust the output parameters through manual rotation, the device further comprises an encoder control module 14, the encoder control module 14 is connected with the first main control module 15, and the adjustment of the output voltage and other parameters can be realized through a voltage adjusting knob installed on the encoder.

Referring to fig. 3, fig. 3 is a block diagram of an input voltage branch provided in an embodiment of the present invention, in which a power board outputs a plurality of voltages, the power board is connected to an input power socket, and the input power socket is configured to provide a working voltage to each module of a power output unit, in an embodiment of the present invention, the input power socket outputs a plurality of voltages, wherein a +12V power is allocated to the fan control module 13, the voltage control module 21, the output voltage amplification module 22, the first digital-to-analog conversion module 20, the output current amplification module 23, and the power conversion module 16, a +5V power is allocated to the power conversion module 16, the current analog-to-digital conversion module 29, the current sampling module 27, the current gear switching module 26, and the output current amplification module 23, a-5V source voltage is allocated to the voltage control module 21, the output voltage amplification module 22, the first digital-to-analog conversion module 20, and the output current amplification module 23, the V + H power is distributed to the voltage control module 21, the V + P power is distributed to the power output module 24, and the power output module 24 outputs the VO +1 power to the input power socket.

Referring to fig. 4, fig. 4 is the power conversion second grade branch block diagram that the embodiment of the utility model provides, power conversion module 16 steps down the +12V of input and +5V voltage, and the 3.3V power of step-down distributes to RS485 communication module, first host system 15, encoder control module 14, voltage analog-to-digital conversion module 28 and first digital-to-analog conversion module 20, and the VSW +1 and VSW-1 power of step-down distributes to output protection module 25.

Referring to fig. 5, fig. 5 is a block diagram of a reference voltage branch provided by an embodiment of the present invention, the first digital-to-analog conversion module 20 further provides Ref and 1/2Ref reference voltages besides performing digital-to-analog conversion, wherein Ref is allocated to the first main control module 15, the fan control module 13, the output current amplification module 23 and the voltage analog-to-digital conversion module 28, and 1/2Ref is allocated to the current sampling module 27.

Referring to fig. 6, fig. 6 is a schematic diagram of a digital-to-analog conversion module according to an embodiment of the present invention, a digital-to-analog conversion module 20 is connected to a first main control module 15 through an SPI bus, the first main control module 15 outputs a preset voltage VSet, a preset current ISet and a reference voltage Ref through the digital-to-analog conversion module 20, and the reference voltage Ref outputs a half reference voltage 1/2Ref through an operational amplifier U13.

Referring to fig. 7, fig. 7 is a schematic diagram of a combination of a plurality of circuit modules according to an embodiment of the present invention, specifically showing a connection relationship and a working principle between the main modules. The VOut + output voltage in fig. 1 refers to the output voltage of the power output module 24 in fig. 7, including VO +1 and VO +2, and only the VO +1 and VO +2 are used to distinguish the front and rear voltages of the output protection module 25 when passing through the output protection module 25.

The voltage control module 21 comprises an operational amplifier U3 and a power amplifier U2, the VSet is connected with a non-inverting input end of the operational amplifier U3 through a resistor R11, when the VSet is increased, an output end of the U3 is increased accordingly and is output to a non-inverting output end of a U2, an output end of the U2 outputs out of a control power output module 24, and the power output module 24 comprises a first group of power tubes and a second group of power tubes, wherein the first group of power tubes are composed of a plurality of NPN type triple diffusion silicon transistors and comprise triodes Q2, Q3, Q4 and Q5, and the four are connected in parallel; the second group of power tubes consists of a plurality of PNP type high-power triodes, and comprises Q8, Q9, Q10 and Q11 which are connected in parallel; when the diode D1 outputs a high level, the transistors Q2, Q3, Q4 and Q5 are turned on, the V + P power falls on the VO +1 line, and the power output module 24 discharges to the outside.

The first group of power tubes and the second group of power tubes are connected in parallel through a plurality of power type triodes for current sharing, and high stability of outputting large current is achieved.

The constant current source control circuit is provided with an NPN triode Q14 and an NMOS tube Q12, wherein a collector of the NPN triode Q14 is connected with a grid electrode of the NMOS tube Q12 and is grounded through a ground resistor R36, a base electrode of the NPN triode Q14 is connected with a source electrode of the NMOS tube Q12, an emitter electrode of the NPN triode Q14 is connected with a negative power supply-V, resistors R41 and R42 are connected between the emitter electrode of the NPN triode Q14 and the base electrode of the NPN triode Q14 in parallel, and a drain electrode of the NMOS tube Q12 is connected with a base electrode of the second group of power tubes.

The grid of an NMOS tube Q12 is connected with the ground through a resistor R36, the source of an NMOS tube Q12 is connected with a negative voltage-V through a resistor R42, when the grid voltage of Q12 reaches a starting voltage, Q12 is conducted, a base voltage is provided for Q14 in a loop, when the current reaches a certain degree to enable the base voltage of Q14 to rise enough to enable Q14 to be conducted, the grid potential of Q12 is pulled down, and therefore the current flowing through Q12 is reduced. By reasonably taking the values of the resistors R41, R42 and R36, the circuit finally achieves a dynamic balance, so that the current flowing through the Q12 is basically constant.

The drain of the NMOS tube Q12 is also connected with the cathode of a diode D3, the anode of the diode D3 is connected with the cathode of a diode D1, the anode of the diode D1 is connected with a voltage control module (21), and the cathode of the diode D1 is connected with the base of the first group of power tubes. The emitter of NPN transistor Q14 is connected to ground through capacitor C65.

The emitter electrodes of the first group of power tubes are connected with the emitter electrodes of the second group of power tubes, the collector electrodes of the first group of power tubes are connected with a power supply V + P, the collector electrodes of the second group of power tubes are connected with the ground, and the connection node of the emitter electrodes of the first group of power tubes and the emitter electrodes of the second group of power tubes is an output line of the power output module. And power resistors for preventing surge pulse and resisting impact are connected between the emitting electrodes of the first group of power tubes and the emitting electrodes of the second group of power tubes and the output line. Resistors R13, R14 and R15 are connected between the base of the first group of power tubes and the output line of the power output module. When the diode D1 outputs a low level, the transistors Q2, Q3, Q4, and Q5 are turned off, and at this time, the output terminal of the diode D3 is at a low level, and the external device applies a voltage to the power output module 24, so that the transistors Q8, Q9, Q10, and Q11 are in a conducting state, and the power output module 24 is in a charged state.

It can be seen that the embodiment of the utility model provides a power output unit has charge-discharge function, and automated inspection realizes the quick automatic switch-over of charge-discharge. The power output module has large output power and stable output.

The resistors R21 and R26 form a voltage divider circuit, the output voltage of the power output module 24 is fed back to the inverting output terminal of the U2, and when the output voltage is too high, the U2 obtains negative feedback, so that the U2 reduces the output voltage, and the output voltage maintains dynamic balance.

The output end of the power output module 24 is connected with an output protection module 25, which comprises an optocoupler PC1, an NMOS tube Q6 and a Q7, the optocoupler comprises a light emitting end and a light sensing end, the light emitting end is a light emitting diode, the light sensing end is a phototriode, the 1 st end in the PC1 is the anode of the light emitting diode, the 3 rd end is the cathode of the light emitting diode, the 6 th end is the collector of the phototriode, the 5 th end is the emitter of the phototriode, the 6 th end Vcc and the 4 th end Gnd of the PC1 are respectively connected with VSW +1 and VSW-1 output by the isolation module M1, the 1 st end of the PC1 is connected with an over resistance R4 and the 13 th end of the first main control module 15, the first main control module 15 is used for controlling the PC1, when the first master module 15 detects that the output current is greater than the predetermined threshold, the output level state of the OutOn terminal of the first master module 15 can control the turn-off of the NMOS transistors Q6 and Q7 through the PC 1.

Further, in order to reduce power supply ripple, a filter capacitor C4 is connected between the terminal Vcc 6 and the terminal Gnd 4 of the PC 1.

The gates G of the NMOS transistors Q6 and Q7 are connected with the 5 th end of the PC1, and when the 5 th end of the PC1 is in a low level, the NMOS transistors Q6 and Q7 are not conducted; when the 5 th terminal of the PC1 is at a high level, the NMOS transistors Q6 and Q7 are turned on.

Specifically, the source S of Q6 and the source S of Q7 are connected to the 4 th terminal of PC1, a resistor R12 is connected between the gate G and the source S of Q6, the drain D of Q6 is connected to the output terminal of the power output module 24, and the drain D of Q7 is connected to the power output interface 4.

Furthermore, in order to improve the loading capacity, power type NMOS transistors are selected as the NMOS transistors Q6 and Q7.

The negative output end of the power output module 24 is connected with a current gear switching module 26, which comprises an ampere gear switching path and a milliampere gear switching path;

the gear switching path comprises a resistor R37, a triode Q13 and an NMOS tube Q15, a +5V power supply is respectively connected with one end of the resistor R37 and a collector of the triode Q13, a gear control end of the first main control module 15 is respectively connected with the other end of the resistor R37, a grid electrode of the NMOS tube Q15 is respectively connected with an emitter of the triode Q13, a source electrode S of the NMOS tube Q15 is connected with a negative electrode output end of the power output module 24, and a drain electrode D of the NMOS tube Q15 is connected with the power output interface 4.

Further, in order to prevent the emitter from being broken down by a high voltage, a reverse diode D5 is connected in parallel with the base and emitter of the transistor Q13 to prevent a high voltage from being applied to the emitter in the reverse direction, thereby forming a protective clamp.

The milliampere gear switching path comprises a resistor R49, a triode Q16 and an NMOS tube Q17, a +5V power supply is respectively connected with one end of the resistor R49 and a collector of the triode Q16, a milliampere gear control end of the first main control module 15 is respectively connected with the other end of the resistor R49, a grid of the NMOS tube Q16 is respectively connected with an emitter of the triode Q16, a source S of the NMOS tube Q16 is connected with a negative electrode output end of the power output module 24 through a diode D6, a diode D8 and a capacitor C27, the diodes D6 and D8 are reversely connected in parallel and then connected with a capacitor C27 in parallel, and a drain D of the NMOS tube Q16 is connected with the power output interface 4.

Further, in order to prevent the emitter from being broken down by a high voltage, a reverse diode D9 is connected in parallel with the base and emitter of the transistor Q16 to prevent a high voltage from being applied to the emitter in the reverse direction, thereby forming a protective clamp.

A current detection resistor R43 is arranged between the safety gear access point and the milliampere gear access point, the current detection resistor R43 is a four-wire precision detection resistor, the 1 st end of the current detection resistor R43 is connected with the cathode of a diode D6, and the 2 nd end of the current detection resistor R43 is connected with the source S of an NMOS tube Q15.

The safety gear switching path and the milliampere gear switching path are controlled by the first main control module 15, when the end a of the safety gear is at a high level, the triode Q13 is conducted, the NMOS transistor Q15 is conducted, the safety gear is in a path state, the milliampere gear switching path is the same, but the safety gear switching path and the milliampere gear switching path are designed without being simultaneously communicated, and one of the safety gear switching path and the milliampere gear switching path is selected as a path.

It can be seen that the current can be automatically detected, and the instrument is automatically switched to the milliampere gear when the small current of the product is detected.

The current sampling module 27 is connected with a current detection resistor R43, specifically, the current sampling module 27 comprises two current sensitive amplifiers U10 and U11, the 4 th end and the 6 th end of the U10 are respectively connected with the 6 th end and the 4 th end of the U11, the 4 th end of the U10 is connected with the 1 st end of the R43 through resistors R64 and R59 which are connected in series, the 6 th end of the U10 is connected with the 2 nd end of the R43 through resistors R60 and R54 which are connected in series,

the current sense amplifiers U10 and U11 are respectively connected with the first main control module 15 through resistors R66 and R67, the 3 rd ends of the current sense amplifiers U10 and U11 are connected with a +5V power supply and are respectively grounded through filter capacitors C68 and C69, a filter capacitor C39 is connected between the 3 rd ends and the 5 th ends of the current sense amplifiers U10 and U11, and the 3 rd ends of the current sense amplifiers U10 and U11 are connected with 1/2Ref reference voltage.

According to ohm's law, when the current to be measured flows through the resistor, the voltage across the resistor is in direct proportion to the current, and by connecting the two ends of the current detection resistor R43, the current sense amplifiers U10 and U11 can obtain the voltage across the current detection resistor R43 from the positive and negative directions, and then amplify the detection voltage and feed back the detection voltage to the first main control module 15.

The output current amplification module 23 is connected with the current detection resistor R43, the output current amplification module 23 comprises a dual-channel operational amplifier U8A and an operational amplifier U7, the non-inverting input end and the inverting input end of the U8A are respectively connected to the 1 st end and the 2 nd end of the current detection resistor R43 through resistors R55 and R61, and the output end of the U8A is connected with the inverting input end of the U7.

The U7 compares the preset current ISet with the actual current, when the actual current is larger than the preset current ISet, the U7 outputs a low level, and since the non-inverting input terminal of the U2 is connected with the output terminal of the U7 through the resistor R48 and the diode D7, the voltage of the input terminal of the U2 is pulled low at the same time, and under the control of the U2, the output voltage of the power output module 24 is reduced, so that the output current is reduced.

The output voltage VO +2 is connected with the non-inverting input end of the operational amplifier U5, and CN3 represents a far-end sampling interface and is used for solving the problem of large-current voltage drop. In a general power supply, voltage sampling is performed at an output terminal of the power supply, and although the voltage of the output terminal can be ensured to be stable, a connection line from the output terminal to a load causes voltage drop, so that the voltage actually obtained by the load is lower than the voltage of the output terminal of the power supply and is influenced by the magnitude of current. The voltage drop is avoided by providing a remote sampling interface which is connected directly to the load by a separate wire, so that the power supply senses the actual voltage across the load. When the far-end sampling circuit finds that the voltage is too low, the output voltage of the operational amplifier U5 is reduced, so that the output of the operational amplifier U3 is increased, the output of the operational amplifier U2 is increased, the whole output voltage is increased, and the problem of too low load end voltage is solved.

When the first main control module 15 generates a high level through OutOn, the PC2A is controlled to emit light, the PC2B is turned on after sensing light, the resistor R38 is shorted out, the PC2 is connected in parallel with the resistor R35, the PC2 is connected with the resistor R35, the resistor R33 is a sampling resistor, VO +1 is input to the non-inverting input terminal of the U5 through the R35, VO-is input to the inverting input terminal of the U5 through the R29, the R35 and the R29 are current-limiting protection resistors for protecting the differential amplifier U5, the output terminal of the U5 is connected with the inverting input terminal of the U3 through a voltage dividing circuit formed by the R31 and the R34, the U5 compares the amplified output voltage with a preset voltage VSet, when the output voltage is greater than the preset voltage VSet, the output of the U3 becomes low, so as to control the U2 to reduce the output, the power output module is controlled by the U2 to reduce the output voltage, and maintain the stable output of the voltage. The output end of the U5 is further connected with a voltage division circuit composed of R45, R47, R50 and R52, voltage division is fed back to the first main control module 15 from two ends of the R47 through resistors R46 and R51, and the output ends of the resistors R46 and R51 are further connected with a filter capacitor C19.

Further, in order to obtain a high-precision voltage value for displaying a high-precision numerical value on a display screen, the voltage analog-to-digital conversion module 28 is connected with R50 through ADOut + and ADOut-, voltage division at two ends of R50 is input to the voltage analog-to-digital conversion module 28, and then the voltage analog-to-digital conversion module 28 feeds back the voltage divided by U12 to the first main control module 15.

Referring to fig. 8, fig. 8 is a system diagram of a low power analog battery unit provided in the embodiment of the present invention, the low power analog battery includes a first string of analog batteries, a second string of analog batteries and a third string of analog batteries, the three strings of analog batteries have substantially the same principle and circuit structure, and the difference is that the negative electrode of the first string of analog batteries is grounded, and the positive electrodes of the three strings of analog batteries respectively output VOut1+, VOut2+ and VOut3+ to the intermediate voltage tap interface 2; taking the first string of analog batteries as an example, the first string of analog batteries includes a second main control module 41, a second digital-to-analog conversion module 42, an analog battery voltage control module 31, an analog battery constant current source control module 32 and a current detection module 35;

further, for the purpose of current output protection, a current level protection module 43 is further provided, and with reference to fig. 11, the current level protection module 43 includes an a level protection circuit 33 and a uA level protection circuit 34.

Referring to fig. 9, fig. 9 is a power supply block diagram of a low power analog battery unit provided by the embodiment of the present invention, a plurality of ac voltages outputted from a low voltage ac output interface of the aforementioned power board are converted into dc voltages through independent rectifying and filtering modules, and further stabilized voltages are further applied through an independent voltage reduction module, so that a first to a third series of voltages required for the operation of the analog battery are provided through a linear power supply module of the voltage reduction module. Referring to FIG. 12, the first string of analog batteries is supplied with Vin1+ and Vin 1-power, the first string of analog batteries is supplied with Vin2+ and Vin 2-power, and the first string of analog batteries is supplied with Vin3+ and Vin 3-power. The voltage required by the low-power analog battery is provided by the linear power supply, so that clutter interference can be reduced, and the performance is more reliable.

Referring to fig. 10, fig. 10 is a schematic diagram of a second digital-to-analog conversion module provided by an embodiment of the present invention, the second digital-to-analog conversion module 42 is connected to the second main control module 41 through an SPI bus, and is similar to the principle of the first digital-to-analog conversion module, which is different in that the low-power analog battery is composed of a plurality of strings, and therefore needs a plurality of preset voltages, in this embodiment, the low-power analog battery is composed of three low-power analog batteries, three groups of preset voltages are needed, at most two preset voltages are output by each analog-to-digital conversion chip, so that the two analog-to-digital conversion chips U31 and U32 are included, U31 and U32 are connected to the second main control module 41 through the SPI bus, the second main control module 41 is connected to output VSet1 through U31 and U32, VSet2, VSet3 and reference voltage Ref, and the reference voltage Ref is output through an operational amplifier U33, and is connected to each string of analog batteries.

It can be seen that each string of analog cells is independently adjustable in voltage.

Referring to fig. 11, fig. 11 is a schematic diagram of a low-power analog battery according to an embodiment of the present invention, which takes a first string of analog batteries as an example, and includes an analog battery voltage control module 31, an analog battery constant current source control module 32, an a-shift protection circuit 33, a uA-shift protection circuit 34, and a current detection module 35.

Specifically, the analog battery voltage control module 31 includes operational amplifiers U43 and U44, a non-inverting input terminal of U44 is connected to a preset voltage VSet1, an inverting input terminal of U44 is connected to an output terminal of U43 through a resistor R161, an output terminal of U44 is connected to a gate G of an NMOS transistor Q111 through a resistor R331, and a drain D of the NMOS transistor is connected to Vin1 +. A proportional integral network consisting of C471 and R151 is added between the output end and the inverting end of the U44, the proportional part can rapidly respond to the control action, the integral part finally eliminates the steady-state deviation, and the effective effect is that the transfer function of the U44 can be improved, so that the system is more stable.

VSet1 controls the output state of U44, and when U44 outputs a high level, Q111 is turned on and the third string of analog batteries powers the load.

It can be seen that, as with VSet1, VSet2 and VSet3 can independently set the calibration voltage for each string of low-power analog cells.

The analog battery constant current source control module 32 comprises operational amplifiers U45 and U46, the output end of U46 is connected with the grid electrode of the NMOS tube Q121 through a resistor R171, and Vin1 is connected with the source electrode S and VOut1 of the NMOS tube Q121 through a sampling resistor R831; the non-inverting output end of the operational amplifier U45 is equivalently connected with VOut1+ through a resistor R431, the output end of U45 is connected with the non-inverting input end of U43 through a resistor R241, when the external input voltage is higher than the output voltage of the first string of analog batteries, the sampled input voltage is isolated and amplified through U45 serving as a voltage follower, U43 outputs high level, further U44 outputs low level, and Q111 is turned off. When an external power source charges the first string of analog batteries, the charging current may be consumed through Q121.

In the embodiment, the voltage regulation range is 0-5V, the voltage stability is within 2mV, and the output current reaches 10A.

Fig. 12 shows the series connection relationship of three strings of analog batteries, the negative electrode of the first string of analog batteries is grounded, the positive electrode of the first string of analog batteries is connected with the negative electrode of the second string of analog batteries, the positive electrode of the second string of analog batteries is connected with the negative electrode of the third string of analog batteries, and R831, R832 and R833 are constant current source sampling resistors of the first string of analog batteries, the second string of analog batteries and the third string of analog batteries, respectively.

It can be seen that the embodiment of the utility model provides an every cluster of simulation battery has charge-discharge function, and automated inspection realizes the quick automatic switch-over of charge-discharge.

The VOut1+ line is connected in series with a 0 ohm resistor R391 and a 10 ohm resistor R222.

The current detection module 35 includes an inductive sense amplifier U47, the 4 th end of U47 is connected to the Vin1+ output through an electrical resistor 322, the 4 th end of U47 is connected to the 1 st end of a resistor R391 through an electrical resistor 322, the 5 th end of U47 is connected to the 2 nd end of a resistor R222 through an electrical resistor 181, and U47 is configured to collect the positive or reverse current flowing through the resistor R222, amplify the current and feed the current back to the second master control module 41.

PC11, PC21 and PC31 are optical couplers, PC11A, PC21A and PC31A are light-emitting ends, PC11B, PC21B and PC31B are photosensitive ends, the light-emitting ends are light-emitting diodes, and the photosensitive ends are phototransistors.

The A-gear protection circuit 33 comprises triodes Q21, Q51, an NMOS transistor Q122, Q31, a resistor R122 and an optocoupler PC11, wherein a source of Q31 is respectively connected with a source of Q122, a collector of Q51 and a 2 nd end of the resistor R122, a drain of Q31 is connected with VOut1+, a grid of Q31 is respectively connected with an emitter of Q21, an emitter of Q51 and a grid of Q122, a drain of Q122 is connected with a 1 st end of a resistor R222, a light-sensing end of the optocoupler PC11 is connected between the collector and a base of Q21 in parallel, a base of Q21 is connected with a base of Q51 and the 1 st end of the resistor R122, a collector of Q21 is connected with a power supply 1, and a light-emitting end of the optocoupler PC11 is connected with an mA 1 end of the second main control module 41 through a resistor R891. When the mAOn1 terminal is at high level, Q21 is turned on, Q51 is turned off, so that Q122 and Q31 are turned on; when the mAOn1 terminal is low, Q21 is turned off, Q51 is turned on, and Q122 and Q31 are turned off. The protection function of the A gear is realized.

The uA gear protection circuit 34 comprises optocouplers PC21, PC31, NMOS transistors Q41 and Q61, wherein the source of Q41 is respectively connected with the source of Q61 and the 2 nd end of a resistor R188, the drain of Q41 is connected with the 2 nd end of R222, the grid of Q41 is respectively connected with the grid of Q61, the photosensitive ends of PC21 and PC31, the photosensitive end of P21 is connected with a power supply Vin1, the photosensitive end of P31 is connected with the 1 st end of the resistor R188, the light emitting ends of PC21 and PC31 are connected in series, the cathode of the light emitting end of PC21 is connected with the anode of the light emitting end of PC31 through resistors R751 and R761, and a control node uAOn1 between the resistors R751 and R761 is connected with the second main control module 41. The cathodes of the light emitting terminals of the PC11 and the PC31 are grounded, and the anode of the light emitting terminal of the PC21 is connected with a 3.3V power supply. When the second main control module 41 can control whether the light emitting end of the PC21 or the PC31 emits light, the phototriode corresponding to the light emitting end is turned on or off, and finally the Q41 and the Q61 are turned on or off, so as to realize the uA grade protection function.

The embodiment of the utility model provides a four cluster simulation batteries, including power output unit and miniwatt simulation battery cell, output interface includes power output interface 4 and intermediate voltage tap interface 2, and power output unit is connected with power output interface 4, and miniwatt simulation battery cell is connected with intermediate voltage tap interface 2. The output voltage of the power output unit is higher than the voltage of the low-power analog battery unit, the voltage difference between the power output unit and the third analog battery string forms a virtual fourth analog battery string, the negative electrode of the power output unit is connected with the negative electrode of the first analog battery string, the positive electrode of the first analog battery string is connected with the negative electrode of the second analog battery string, the positive electrode of the second analog battery string is connected with the negative electrode of the third analog battery string, and the three analog battery strings respectively form middle tap voltages VOut1+, VOut2+ and VOut3 +.

Compared with the prior art, implement the embodiment of the utility model provides a beneficial effect who brings is:

the power output unit can output a high-power supply, is suitable for large-current detection and has high output stability; the low-power analog battery unit can output a low-power supply and is suitable for low-current detection; compared with the prior art, the combined implementation mode can well adapt to the functions of large current detection and small current detection, achieves the purpose of simulating a plurality of strings of real batteries, solves the problem of poor current adaptability, and has strong adaptability and low cost.

The embodiment of the utility model provides a four-string simulation battery still has output power supply and input two kinds of functions of charging, can simulate the charging, discharging of product battery; the instrument is mainly used for research and development debugging and production line testing of mobile power supplies, Bluetooth, chargers and battery power supply equipment, and can also be used as a common adjustable power supply, the output voltage and input and output current protection values can be set, and charging and discharging can be rapidly and automatically switched; each string of batteries can be independently provided with voltage, and the voltage is independently calibrated; the device has the function of automatically switching current gears, and when the small current of a product is detected, the device is automatically switched to a milliampere gear; the high precision and the high resolution can reach 1mV/1uA, and the high resolution can detect the standby current and the standby power consumption of the product; the linear programmable DC power supply has the advantages of high stability, low noise, low drift and the like; the communication interface with the electrical isolation serial port is communicated with the PC, and is conveniently integrated with other integrated equipment for matched use, such as an AET automatic test system.

Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that the present invention can be modified in the technical solutions described in the foregoing embodiments, and the present specification takes the simulation of four strings of batteries as an example for illustration, and it is not limited to the simulation of four strings of batteries, and the increase and decrease can be performed according to the same principle, or the equivalent replacement can be performed on some technical features of the batteries.

Claims (6)

1. The power output module (24) comprises a first group of power tubes and a second group of power tubes, and is characterized in that the power output module (24) further comprises a constant current source control circuit, the constant current source control circuit is provided with an NPN triode Q14 and an NMOS tube Q12, a collector of the NPN triode Q14 is connected with a grid electrode of the NMOS tube Q12 and is grounded through a ground resistor R36, a base electrode of the NPN triode Q14 is connected with a source electrode of the NMOS tube Q12, an emitter electrode of the NPN triode Q14 is connected with a negative power source (-V), resistors R41 and R42 are connected between the emitter electrode of the NPN triode Q14 and the base electrode of the NPN triode Q14 in parallel, and a drain electrode of the NMOS tube Q12 is connected with the base electrode of the second group of power tubes.

2. The power output module of an analog battery as claimed in claim 1, wherein the drain of the NMOS transistor Q12 is further connected to the cathode of a diode D3, the anode of the diode D3 is connected to the cathode of a diode D1, the anode of the diode D1 is connected to the voltage control module (21), and the cathode of the diode D1 is connected to the base of the first group of power transistors.

3. The power output module as claimed in claim 2, wherein the emitter of the NPN transistor Q14 is connected to ground through a capacitor C65.

4. The battery-emulating power output module of claim 1, wherein emitters of said first set of power tubes are connected to emitters of said second set of power tubes, wherein collectors of said first set of power tubes are connected to a power source (V + P), wherein collectors of said second set of power tubes are connected to ground, and wherein a junction of said emitters of said first set of power tubes and said emitters of said second set of power tubes is an output line of said power output module (24).

5. The battery-simulating power output module of claim 4, wherein power resistors for surge protection and surge resistance are connected between the emitters of the first group of power tubes, the emitters of the second group of power tubes and the output line.

6. A power output module simulating a battery as claimed in any one of claims 1 to 5, characterised in that resistors R13, R14 and R15 are connected between the bases of the first group of power tubes and the output line of the power output module (24).

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