CN213547386U

CN213547386U - Circuit for reducing standby power consumption of switching power supply

Info

Publication number: CN213547386U
Application number: CN202022537367.0U
Authority: CN
Inventors: 沈洪杰; 李俊需; 伍佼; 张志伟; 王其才; 徐进远
Original assignee: Xiamen City Keli Electronics Co ltd
Current assignee: Xiamen City Keli Electronics Co ltd
Priority date: 2020-11-05
Filing date: 2020-11-05
Publication date: 2021-06-25
Anticipated expiration: 2030-11-05

Abstract

The utility model discloses a reduce switching power supply stand-by power consumption's circuit, this circuit includes: the alternating current input EMC circuit, the rectification filter circuit and the A circuit, the B circuit, the peak absorption circuit, the constant voltage constant current loop and the output rectification filter circuit, wherein the alternating current power supply outputs direct current through the alternating current input EMC circuit and the rectification filter circuit; a B circuit consisting of a resistor, a PNP triode Q1 and an NPN triode is adopted, a starting circuit of the switching power supply is formed through the combination of the resistor and the triodes, and after the switching power supply is started, the starting circuit is closed, so that the standby power consumption caused by the starting circuit is reduced, the standby power consumption of the switching power supply is reduced, and the requirement of six-level energy efficiency can be met.

Description

Circuit for reducing standby power consumption of switching power supply

Technical Field

The utility model relates to a switching power supply field, concretely relates to reduce switching power supply stand-by power consumption's circuit.

Background

With the development of technology, electronic products become more and more mainstream products of technological development. In the field of electronic products, a switching power supply is praised as a high-efficiency energy-saving power supply, is a more ideal product under the modern advocation of green environmental protection, represents the development direction of a voltage-stabilized power supply, and has become a mainstream product of the voltage-stabilized power supply. However, the switching power supply is subject to EMI interference, the current EMI suppression absorption circuit is, as shown in a' in fig. 1, a capacitor CX1 is connected in parallel between a neutral line and a live line before bridge rectification, the capacitor CX1 can absorb a differential mode interference signal of the switching power supply, resistors R1 and R2 connected in parallel with the capacitor CX1 are according to the requirement of the standard GB4706, within 1 second of pulling out the plug, the voltage at both ends of the plug is lower than 34V, the capacitor CX1 is discharged through the resistors R1 and R2, and the two resistors can increase the standby power consumption of the product. If pi-type filtering is used, no additional capacitor CX1 is needed to suppress differential mode interference, and no additional bleeder resistors R1 and R2 are needed to increase loss. The current starting method can not cut off a starting resistor loop, the loss exists all the time, and therefore standby power consumption of the switching power supply is affected, a current starting circuit of the switching power supply is shown as B' in figure 1, a capacitor EC3 is charged from a bridge rectifier output end through resistors R5, R6 and R10, and when the voltage of the capacitor EC3 reaches the starting voltage of the IC1, the IC1 starts to work. Consequently in order to reduce switching power supply's stand-by power consumption, the utility model relates to a reduce switching power supply stand-by power consumption's circuit.

SUMMERY OF THE UTILITY MODEL

The utility model relates to a circuit for reducing the standby power consumption of a switching power supply, which adopts a Pi-shaped filter A circuit and can effectively inhibit the EMI interference of the switching power supply through the series-parallel connection of a capacitor and an inductor; the B circuit is adopted, and a starting circuit of the switching power supply is formed by combining the resistor and the triode, so that the standby power consumption of the switching power supply can be effectively reduced.

The technical scheme of the utility model is specifically as follows:

a circuit for reducing standby power consumption of a switching power supply, comprising: the circuit comprises an alternating current input EMC circuit, a rectifying and filtering circuit, and an A circuit, a B circuit, a peak absorption circuit, a constant voltage and constant current loop and an output rectifying and filtering loop in the alternating current input EMC circuit and the rectifying and filtering circuit.

Further, the alternating current input EMC circuit comprises a fuse F1, a voltage dependent resistor MOV1 and a fuse R20, one end of the fuse F1 is connected with a live wire of a power supply, the other end of the fuse F1 is connected with the voltage dependent resistor MOV1 and one end of a bridge rectification input end in a rectification filter circuit in parallel, one end of the fuse R20 is connected with the other end of the voltage dependent resistor MOV1 and a power supply zero wire, and the other end of the fuse R20 is connected with the other end of the bridge rectification input end in the rectification filter circuit.

Further, one end of a bridge rectifier output end in the rectifier filter circuit is connected with the anode of a capacitor EC1 and an inductor L1 of the circuit A, and the other end of the bridge rectifier output end is grounded, wherein the circuit A is a pi-type filter circuit formed by a capacitor EC1, an inductor L1 and a capacitor EC2, the other end of the inductor L1 is connected in parallel with the anode of a capacitor EC2 and one ends of a resistor R6 and a resistor R16 in the circuit B, and the cathodes of the capacitor EC1 and the capacitor EC2 are grounded.

In a further configuration, the capacitor of the circuit a in the rectifying and filtering circuit is an electrolytic capacitor, the inductor is a differential mode inductor, and the bridge rectifying output terminal of the rectifying and filtering circuit may be connected in series with at least one inductor, or the bridge rectifying output terminal of the rectifying and filtering circuit is connected to the inductor of the circuit a, and the other terminal of the inductor is connected in parallel with at least one capacitor.

Further, the B circuit includes resistors R5, R6, R16, R17, R18, R19, a PNP transistor Q1 and an NPN transistor Q2, wherein the other end of the resistor R6 is connected to a resistor R5, the other end of the resistor R5 is connected to an emitter of a PNP transistor Q1, a base of the PNP transistor Q1 is connected to a collector of the NPN transistor Q2, a collector of the PNP transistor Q1 is connected to one end of a resistor R19, wherein the other end of the resistor R16 is connected to a resistor R17, the other end of the resistor R17 is connected to a base of the NPN transistor 387q 2, the emitter of the NPN transistor Q2 is connected to the other end of the resistor R19 and one end of the resistor R18, the other end of the resistor R18 is grounded, and the collector of the PNP transistor is connected to a "1" terminal of the IC1 chip in the.

Further, the Q1 of the B circuit is a PNP triode or a PMOS transistor, and the Q2 of the B circuit is an NPN triode or an NMOS transistor.

Further, the Q1 of the B circuit is a PNP triode or a PMOS transistor, and the Q2 matched with the PNP triode or the PMOS transistor is an NPN triode or an NMOS transistor; or the Q1 of the B circuit is an NPN triode or an NMOS transistor, and the Q2 matched with the NPN triode or the NMOS transistor is a PNP triode or a PMOS transistor.

Further, the constant-voltage constant-current circuit comprises a chip IC1, resistors R7, R8, R10, R13, R14 and R15, capacitors C4, C6, C7, EC3, a diode D2 and an inductor Nf, wherein a '1' terminal of the chip IC1 is connected with the anode of the capacitor C6, the cathode of the diode D2 and one end of the resistor R10 in parallel, the other end of the resistor R10 is connected with the anode of the capacitor EC3, the cathode of the capacitor C387 6 is connected with the anode of the diode D2, one ends of the resistors R7 and R8 and one end of the inductor Nf, and the other end of the resistor R7 is connected with the other end of the resistor R8 and the '3' terminal of the chip IC 1; the '3' terminal of the chip IC1 is connected in parallel with the positive electrode of a resistor R13 and a capacitor C7, and the other end of the resistor R13 and the negative electrode of the capacitor C7 are grounded in common with the other end of an inductor Nf and the negative electrode of a capacitor EC 3; the "2" terminal of the chip IC1 is grounded; the '4' terminal of the chip IC1 is connected with resistors R14 and R15 in parallel, and the other ends of the parallel resistors R14 and R15 are grounded; the terminals of the chip IC1 '5, 6, 7 and 8' are connected with the anode of a peak absorption circuit diode D1 and the anode of a capacitor C4 in common, and the cathode of the capacitor C4 is grounded.

Further, one end of a resistor R16 in the B circuit is connected in parallel with a resistor R4, a resistor R4a, an anode of a capacitor C1 and one end of an input end of a transformer TR1 of a spike absorption circuit, the spike absorption circuit comprises a resistor R4, a resistor R4a, a resistor R3, a capacitor C1 and a diode D1, the other ends of the resistor R4 and the resistor R4a and a cathode of the capacitor C1 are connected in common with the resistor R3, the other end of the resistor R3 is connected with a cathode of a diode D1, an anode of the diode D1 is connected with the other end of the input end of the transformer TR1, and an output end of the transformer TR1 is connected with an output rectifying and filtering circuit.

Further, the output rectifying and filtering loop comprises a chip IC2, capacitors C2, C3, C5 and EC4, and resistors R11 and R12; wherein, the '1' terminal of the chip IC2 is connected with one end of the output end of the transformer TR1, and is connected with the anode of the capacitor EC4, one end of the resistor R12, the anode of the capacitor C5 and the output anode end in parallel; the terminal "2" of the chip IC2 is connected with the positive electrode of a capacitor C3, and the negative electrode of the capacitor C3 is grounded with the terminal "3" of the chip IC2 in common; the terminals of the chip IC2 '5, 6, 7 and 8' are connected with the other end of the output end of the transformer TR1 and one end of a resistor R11, the other end of the resistor R11 is connected with the anode of a capacitor C2, and the cathode of the capacitor C2 is grounded with the terminal of the chip IC2 '4'.

(III) advantageous effects

The utility model discloses a circuit for reducing the stand-by power consumption of a switching power supply, which adopts a pi-type filter A circuit and can effectively inhibit the EMI interference of the switching power supply through the series-parallel connection of a capacitor and an inductor; the B circuit is adopted, and the starting circuit of the switching power supply is formed by combining the resistor and the triode, so that the standby power consumption of the switching power supply can be effectively reduced, and the requirement of six-level energy efficiency can be met.

Drawings

Fig. 1 is a schematic structural diagram of a standby circuit of a conventional switching power supply.

Reference numerals: a', an EMI interference suppression absorption circuit; b', a switching power supply starting circuit.

Fig. 2 is a schematic diagram of the circuit for reducing the standby power consumption of the switching power supply of the present invention.

Reference numerals: 1. an AC input EMC circuit; 2. a rectification filter circuit; A. a pi-type filter circuit; B. a switching power supply starting circuit; 3. a spike absorption circuit; 4. a constant voltage and constant current loop; 5. and outputting a rectifying and filtering loop.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a circuit for reducing standby power consumption of a switching power supply according to the present invention.

The patent of the utility model provides a pair of reduce switching power supply stand-by power consumption's circuit, include: the circuit comprises an alternating current input EMC circuit 1, a rectifying and filtering circuit 2, an A circuit, a B circuit, a peak absorbing circuit 3, a constant voltage and constant current circuit 4 and an output rectifying and filtering circuit 5, wherein the alternating current input EMC circuit 1 comprises a fuse F1, a piezoresistor MOV1 and a fuse R20, one end of the fuse F1 is connected with a live wire of a power supply, the other end of the fuse F1 is connected with the piezoresistor MOV1 and one end of a bridge rectifying input end in the rectifying and filtering circuit 2 in parallel, one end of the fuse R20 is connected with the other end of the piezoresistor MOV1 and a power zero line, and the other end of the fuse R20 is connected with the other end of the bridge rectifying input end in the rectifying and; one end of a bridge rectifier output end in the rectifier filter circuit 2 is connected with the anode of a capacitor EC1 and an inductor L1 of a circuit A, the other end of the bridge rectifier output end is grounded, wherein the circuit A is a pi-type filter circuit formed by the capacitor EC1, the inductor L1 and the capacitor EC2, the other end of the inductor L1 is connected with the anode of a capacitor EC2 in parallel and one ends of a resistor R6 and a resistor R16 in a circuit B, and the cathodes of the capacitor EC1 and the capacitor EC2 are grounded; the B circuit comprises resistors R5, R6, R16, R17, R18, R19, a PNP triode Q1 and an NPN triode Q2, wherein the other end of the resistor R6 is connected with a resistor R5, the other end of the resistor R5 is connected with an emitter of a PNP triode Q1, a base of the PNP triode Q1 is connected with a collector of a NPN triode Q2, a collector of the PNP triode Q1 is connected with one end of a resistor R19, the other end of the resistor R16 is connected with a resistor R17, the other end of the resistor R17 is connected with a base of a NPN triode Q2, an emitter of the NPN triode Q2 is connected with the other end of the resistor R19 and one end of a resistor R18, the other end of the resistor R18 is grounded, and a collector of the PNP triode is connected with a '1' terminal; the constant-voltage constant-current circuit 4 comprises a chip IC1, resistors R7, R8, R10, R13, R14 and R15, capacitors C4, C6, C7 and EC3, a diode D2 and an inductor Nf, wherein a '1' terminal of the chip IC1 is connected with the anode of a capacitor C6, the cathode of a diode D2 and one end of a resistor R10 in parallel, the other end of the resistor R10 is connected with the anode of a capacitor EC3, the cathode of the capacitor C6 is connected with the anode of a diode D2, one ends of a resistor R7 and a resistor R8 and one end of the inductor Nf, and the other end of the resistor R7 is connected with the other end of the resistor R8 and the '3' terminal of the chip IC 1; the '3' terminal of the chip IC1 is connected in parallel with the positive electrode of a resistor R13 and a capacitor C7, and the other end of the resistor R13 and the negative electrode of the capacitor C7 are grounded in common with the other end of an inductor Nf and the negative electrode of a capacitor EC 3; the "2" terminal of the chip IC1 is grounded; the '4' terminal of the chip IC1 is connected with resistors R14 and R15 in parallel, and the other ends of the parallel resistors R14 and R15 are grounded; the terminals of the chip IC1 '5, 6, 7 and 8' are connected with the anode of a diode D1 of the spike absorption circuit 3 and the anode of a capacitor C4 in common, and the cathode of the capacitor C4 is grounded; one end of a resistor R16 in the B circuit is connected in parallel with a resistor R4, a resistor R4a, an anode of a capacitor C1 and one end of an input end of a transformer TR1 of a spike absorption circuit 3, the spike absorption circuit 3 comprises a resistor R4, a resistor R4a, a resistor R3, a capacitor C1 and a diode D1, wherein the other ends of the resistor R4 and the resistor R4a and the cathode of the capacitor C1 are connected with the resistor R3 in common, the other end of the resistor R3 is connected with the cathode of the diode D1, the anode of the diode D1 is connected with the other end of the input end of the transformer TR1, and the output end of the transformer TR1 is connected with the output rectifying and filtering circuit 5; the output rectifying and filtering loop 5 comprises a chip IC2, capacitors C2, C3, C5 and EC4, and resistors R11 and R12; wherein, the '1' terminal of the chip IC2 is connected with one end of the output end of the transformer TR1, and is connected with the anode of the capacitor EC4, one end of the resistor R12, the anode of the capacitor C5 and the output anode end in parallel; the terminal "2" of the chip IC2 is connected with the positive electrode of a capacitor C3, and the negative electrode of the capacitor C3 is grounded with the terminal "3" of the chip IC2 in common; the terminals of the chip IC2 '5, 6, 7 and 8' are connected with the other end of the output end of the transformer TR1 and one end of a resistor R11, the other end of the resistor R11 is connected with the anode of a capacitor C2, and the cathode of the capacitor C2 is grounded with the terminal of the chip IC2 '4'.

The utility model discloses the theory of operation is implemented specifically: the alternating current power supply realizes direct current output through the alternating current input EMC circuit 1 and the rectification filter circuit 2, wherein an EMI absorption circuit of a capacitor and a bleeder resistor is cancelled in the alternating current input EMC circuit 1, so that high standby power consumption caused by the bleeder resistor can be thoroughly solved; the circuit A is added in the rectifying and filtering circuit 2, and the suppression of EMI interference can be realized by forming an pi-type filter by the capacitor EC1, the inductor L1 and the capacitor EC 2. A lead is led out from an inductor L1 of a circuit A in the rectification filter circuit 2 to be connected with a circuit B, the circuit B is a switching power supply starting circuit, base current is injected into a base of Q2 through a resistor R16 and a resistor R17 through the positive terminal voltage of the circuit B, the Q2 is conducted at the moment, the base current is injected into a base of Q1 through the collector current of Q2, the Q1 is conducted, and the positive terminal voltage of the circuit B charges a capacitor EC3 of the constant-voltage constant-current circuit 4 and supplies power to VDD of an IC1 through the resistor R5, a resistor R6 and the resistor Q1. After the IC1 is turned on, its auxiliary voltage is divided by the resistors R19 and R18 to establish a voltage level at the emitter of Q2, and when this voltage is higher than the base voltage of Q2, causing Q2 to reverse bias, Q2 turns off, and then Q1 turns off without base current. After the switching power supply is started, the starting loop is closed, no current flows through the starting loop, and therefore standby power consumption brought by the starting loop is reduced.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A circuit for reducing standby power consumption of a switching power supply, comprising: the circuit comprises an alternating current input EMC circuit (1), a rectifying and filtering circuit (2), an A circuit, a B circuit, a peak absorption circuit (3), a constant voltage and constant current loop (4) and an output rectifying and filtering loop (5), wherein the alternating current input EMC circuit (1) comprises a fuse F1, a piezoresistor MOV1 and a fuse R20, one end of the fuse F1 is connected with a live wire of a power supply, the other end of the fuse F1 is connected with the piezoresistor MOV1 and one end of a bridge rectifying input end in the rectifying and filtering circuit (2) in parallel, one end of the fuse R20 is connected with the other end of the piezoresistor MOV1 and a power supply zero line, and the other end of the fuse R20 is connected with the other end of the bridge rectifying input end in the rectifying and filtering circuit (2); one end of a bridge rectifier output end in the rectifier filter circuit (2) is connected with the anode of a capacitor EC1 and an inductor L1 of a circuit A, and the other end of the bridge rectifier output end is grounded, wherein the circuit A is a pi-type filter circuit formed by a capacitor EC1, an inductor L1 and a capacitor EC2, the other end of the inductor L1 is connected with the anode of a capacitor EC2 in parallel and one ends of a resistor R6 and a resistor R16 in a circuit B, and the cathodes of the capacitor EC1 and the capacitor EC2 are grounded; the B circuit comprises resistors R5, R6, R16, R17, R18, R19, a PNP triode Q1 and an NPN triode Q2, wherein the other end of the resistor R6 is connected with a resistor R5, the other end of the resistor R5 is connected with an emitter of a PNP triode Q1, a base of the PNP triode Q1 is connected with a collector of a NPN triode Q2, a collector of the PNP triode Q1 is connected with one end of a resistor R19, the other end of the resistor R16 is connected with a resistor R17, the other end of the resistor R17 is connected with a base of a NPN triode Q2, an emitter of the NPN triode Q2 is connected with the other end of the resistor R19 and one end of a resistor R18, the other end of the resistor R18 is grounded, and a collector of the PNP triode is connected with a '1' terminal of an; one end of a resistor R16 in the B circuit is connected in parallel with a resistor R4, a resistor R4a, the anode of a capacitor C1 and one end of the input end of a transformer TR1 of a spike absorption circuit (3), the spike absorption circuit (3) comprises a resistor R4, a resistor R4a, a resistor R3, a capacitor C1 and a diode D1, wherein the other ends of the resistor R4 and the resistor R4a and the cathode of the capacitor C1 are connected with a resistor R3 in common, the other end of the resistor R3 is connected with the cathode of a diode D1, the anode of the diode D1 is connected with the other end of the input end of the transformer TR1, and the output end of the transformer TR1 is connected with an output rectifying and filtering circuit (5).

2. The circuit for reducing the standby power consumption of a switching power supply according to claim 1, wherein the constant-voltage constant-current loop (4) comprises a chip IC1, resistors R7, R8, R10, R13, R14 and R15, capacitors C4, C6, C7 and EC3, a diode D2 and an inductor Nf, the "1" terminal of the chip IC1 is connected in parallel with the anode of a capacitor C6, the cathode of a diode D2 and one end of a resistor R10, the other end of the resistor R10 is connected with the anode of a capacitor EC3, the cathode of the capacitor C6 is connected with the anode of a diode D2, one end of the resistor R7 and the resistor R8 and one end of the inductor Nf, and the other end of the resistor R7 is connected with the other end of a resistor R8 and the "3" terminal of the chip IC 1; the '3' terminal of the chip IC1 is connected in parallel with the positive electrode of a resistor R13 and a capacitor C7, and the other end of the resistor R13 and the negative electrode of the capacitor C7 are grounded in common with the other end of an inductor Nf and the negative electrode of a capacitor EC 3; the "2" terminal of the chip IC1 is grounded; the '4' terminal of the chip IC1 is connected with resistors R14 and R15 in parallel, and the other ends of the parallel resistors R14 and R15 are grounded; the terminals of the chip IC1 '5, 6, 7 and 8' are connected with the anode of a diode D1 of a spike absorption circuit (3) and the anode of a capacitor C4 in common, and the cathode of the capacitor C4 is grounded.

3. The circuit for reducing the standby power consumption of the switching power supply as claimed in claim 1, wherein the output rectifying and filtering loop (5) comprises a chip IC2, capacitors C2, C3, C5 and EC4, and resistors R11 and R12; wherein, the '1' terminal of the chip IC2 is connected with one end of the output end of the transformer TR1, and is connected with the anode of the capacitor EC4, one end of the resistor R12, the anode of the capacitor C5 and the output anode end in parallel; the terminal "2" of the chip IC2 is connected with the positive electrode of a capacitor C3, and the negative electrode of the capacitor C3 is grounded with the terminal "3" of the chip IC2 in common; the terminals of the chip IC2 '5, 6, 7 and 8' are connected with the other end of the output end of the transformer TR1 and one end of a resistor R11, the other end of the resistor R11 is connected with the anode of a capacitor C2, and the cathode of the capacitor C2 is grounded with the terminal of the chip IC2 '4'.

4. The circuit for reducing the standby power consumption of the switching power supply according to claim 1, wherein the capacitor of the circuit A in the rectifying and filtering circuit (2) is an electrolytic capacitor, and the inductor is a differential mode inductor.

5. A circuit for reducing the standby power consumption of a switching power supply according to claim 1, wherein the bridge rectifier output terminal of the rectifier filter circuit (2) is connected in series with at least one inductor.

6. A circuit for reducing the standby power consumption of a switching power supply according to claim 5, wherein the bridge rectifier output terminal of the rectifier filter circuit (2) is connected with the inductor of the A circuit, and the other end of the inductor is connected with at least one capacitor in parallel.