CN213398714U

CN213398714U - Frequency detection circuit of multiple kind of wide voltage

Info

Publication number: CN213398714U
Application number: CN202022413844.2U
Authority: CN
Inventors: 刘宝联
Original assignee: Panji Technology Co ltd
Current assignee: Panji Technology Co ltd
Priority date: 2020-10-26
Filing date: 2020-10-26
Publication date: 2021-06-08
Anticipated expiration: 2030-10-26

Abstract

A frequency detection circuit with various kinds of wide voltages comprises a filter circuit, an operational amplifier U1, an ESD protection device D1, a blocking circuit, a bias amplification circuit and a hysteresis comparator U3; one end of the filter circuit is connected with a signal to be detected, the other end of the filter circuit is connected with the operational amplifier U1 and the ESD protection device D1, the output end of the operational amplifier U1 is connected with the blocking circuit, the blocking circuit is connected with the bias amplification circuit, the bias amplification circuit is connected with the hysteresis comparator U3, and the output end of the hysteresis comparator U3 outputs frequency. The utility model discloses can carry out the frequency detection of multiple type (like sine wave, triangular wave, square wave etc.), wide voltage, the frequency range who supports the detection is 100HZ ~ 100 Khz. The circuit is formed by only two operational amplifiers, one comparator and a plurality of peripheral resistors and capacitors, and the cost is low. And the comparator adopts a hysteresis design, so that the detection precision is high.

Description

Frequency detection circuit of multiple kind of wide voltage

Technical Field

The utility model belongs to the technical field of the frequency acquisition circuit, in particular to frequency detection circuit of multiple kind of wide voltage.

Background

In the industrial field, there is often a need for frequency acquisition, such as clock acquisition in the communication field, rotational speed acquisition in the power field, and the like. However, due to the complexity of the practical application situation in the field, the collected signal is not an ideal frequency signal. Many times, we need convert actual signal into square wave signal, and the simple rising edge or falling edge count operation in the period only need be carried out to the treater, can deduce the frequency, so many times frequency acquisition, it is exactly to convert the signal to be measured into standard square wave signal, makes things convenient for the treater to carry out the operation processing.

One of the more common frequency acquisition is an acquisition circuit built by MOS transistors. The principle of the circuit is that the on-off of the MOS tube is controlled by collecting frequency signals. And the MOS tube is pulled up and output through an open-drain structure. When the collected frequency voltage exceeds the turn-on threshold voltage of the MOS tube, the MOS tube is turned on, the output is high, and when the collected frequency voltage is lower than the turn-on threshold voltage of the MOS tube, the MOS tube is turned off, and the output is high. When continuous frequency is collected, the MOS tube can be uninterruptedly switched on, switched off, switched on and switched off along with the collected frequency, and the processor can receive the square wave with the same frequency at the moment so as to perform counting reading.

The scheme is always driven by collecting signals as MOS, and the MOS tube is driven by a voltage type, so that the problem of insufficient driving voltage exists. If the collected frequency amplitude is low, the MOS tube cannot be driven.

Secondly, this technique is weak against external interference. If the collected frequency signal receives interference and receives an overshoot, if the overshoot signal is greater than the turn-on threshold of the MOS transistor, the MOS transistor may be turned on or off by mistake, which affects the accuracy of the frequency technology.

Finally, due to the structural limitation of the MOS tube, the switching frequency of the MOS tube is low, so that the technology is only suitable for frequency application with low acquisition precision.

The other common frequency detection circuits are widely applied to frequency detection through a hysteresis comparator, and when the amplitude of a detected signal exceeds or is lower than a threshold value, the level of the comparator is inverted, so that the purposes of frequency detection and acquisition are achieved. The frequency detection is carried out by a hysteresis comparator, and the signal to be detected can only float up and down based on the reference of the comparison level. If the comparator compares that the level is 1V direct current voltage, the signal to be measured can only fluctuate up and down based on 1V, so that the level can be overturned to acquire a frequency signal. If the measured signal is lower than 1V or higher than 1V, the comparator cannot be inverted, and the output can only be a fixed level, namely, the method has poor universality and can only be applied in a specific scene.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a frequency detection circuit of multiple kind of wide voltage to solve above-mentioned problem.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

a frequency detection circuit with various kinds of wide voltages comprises a filter circuit, an operational amplifier U1, an ESD protection device D1, a blocking circuit, a bias amplification circuit and a hysteresis comparator U3; one end of the filter circuit is connected with a signal to be detected, the other end of the filter circuit is connected with the operational amplifier U1 and the ESD protection device D1, the output end of the operational amplifier U1 is connected with the blocking circuit, the blocking circuit is connected with the bias amplification circuit, the bias amplification circuit is connected with the hysteresis comparator U3, and the output end of the hysteresis comparator U3 outputs frequency.

Further, the filter circuit comprises a resistor R3 and a capacitor C3, wherein the resistor R3 and the capacitor C3 are sequentially connected to form the filter circuit; ESD protection device D1 is a 3-pin bidirectional switching diode.

Further, one end of the resistor R3 is connected to the signal to be tested, and the other end is connected to the capacitor C3, the ESD protection device D1, and the 3 pins of the operational amplifier U1.

Further, the negative pole input of the operational amplifier U1 is connected with the output to form a follower.

Furthermore, the DC blocking circuit comprises a capacitor C2 and a resistor R4, the output end of the operational amplifier U1 is connected with the capacitor C2, and the capacitor C2 is connected with the resistor R4.

Further, the bias amplifying circuit comprises a resistor R1, an operational amplifier U2 and a capacitor C1; a resistor R1 is connected between the negative input end and the output end of the operational amplifier U2 in parallel, and a capacitor C1 is connected to the resistor R1 in parallel; the resistor R4 is connected with the resistor R1, and the resistor R4 is connected with the negative pole input of the operational amplifier U2.

Furthermore, one end of the anode of the operational amplifier U2 is connected with a bias voltage source through a resistor R5; the other end of the resistor R5 is connected with the negative input of the hysteresis comparator U3, and the other end of the resistor R5 is connected with the resistor R7; the resistor R7 is connected with the negative input end of the U3; the output end of the operational amplifier U2 is connected with the positive input of a hysteresis comparator U3 through a resistor R6; a resistor R9 is connected in parallel between the positive input end and the output end of the hysteresis comparator U3.

Further, the output terminal of the hysteresis comparator U3 is connected to the resistor R2 and the resistor R8.

Compared with the prior art, the utility model discloses there is following technological effect:

the utility model discloses can carry out the frequency detection of multiple type (like sine wave, triangular wave, square wave etc.), wide voltage, the frequency range who supports the detection is 100HZ ~ 100 Khz. The circuit is formed by only two operational amplifiers, one comparator and a plurality of peripheral resistors and capacitors, and the cost is low. And the comparator adopts a hysteresis design, so that the detection precision is high. The method has wide application field and is suitable for a plurality of waveform acquisition scenes. The frequency acquisition range is wide from 10HZ to 100KHZ, and most industrial requirements are met. Meanwhile, 15V direct current voltage can be collected to the maximum extent, and the practicability is higher.

Drawings

FIG. 1 is a circuit of the present design

FIG. 2 sine wave acquisition with peak-to-peak value of 0.2Vpk, offset of 0.1V, and frequency of 10Hz

FIG. 3 triangular wave acquisition with peak to peak value of 5Vpk, bias of 2.5V, and frequency of 10KHZ

FIG. 4 sinusoidal wave acquisition with peak to peak value of 1Vpk, offset of 4V, and frequency of 100KHZ

FIG. 5 sinusoidal wave acquisition with peak to peak value of 15Vpk, offset of 7.5V, and frequency of 100KHZ

Detailed Description

The present invention will be further explained with reference to the accompanying drawings:

referring to fig. 1 to 5, a frequency detection circuit for various voltages includes a filter circuit, an operational amplifier U1, an ESD protection device D1, a dc blocking circuit, a bias amplifier circuit, and a hysteresis comparator U3; one end of the filter circuit is connected with a signal to be detected, the other end of the filter circuit is connected with the operational amplifier U1 and the ESD protection device D1, the output end of the operational amplifier U1 is connected with the blocking circuit, the blocking circuit is connected with the bias amplification circuit, the bias amplification circuit is connected with the hysteresis comparator U3, and the output end of the hysteresis comparator U3 outputs frequency.

The filter circuit comprises a resistor R3 and a capacitor C3, and the resistor R3 and the capacitor C3 are sequentially connected to form the filter circuit; ESD protection device D1 is a 3-pin bidirectional switching diode.

One end of the resistor R3 is connected with a signal to be detected, and the other end is connected with the capacitor C3, the ESD protection device D1 and the 3 pins of the operational amplifier U1.

The negative pole input of the operational amplifier U1 is connected with the output to form a follower.

The DC blocking circuit comprises a capacitor C2 and a resistor R4, the output end of the operational amplifier U1 is connected with the capacitor C2, and the capacitor C2 is connected with the resistor R4.

The bias amplifying circuit comprises a resistor R1, an operational amplifier U2 and a capacitor C1; the negative electrode and the output end of the operational amplifier U2 are connected with a resistor R1 in parallel, and a capacitor C1 is connected with the resistor R1 in parallel; the resistor R4 is connected with the resistor R1, and the resistor R4 is connected with the negative pole input of the operational amplifier U2.

One end of the anode of the operational amplifier U2 is connected with a bias voltage source through a resistor R5; the other end of the resistor R5 is connected with the negative input of the hysteresis comparator U3, and a resistor R7 is arranged between the resistor R5 and the hysteresis comparator U3; the output end of the operational amplifier U2 is connected with the positive input of a hysteresis comparator U3 through a resistor R6; the positive electrode and the output end of the hysteresis comparator U3 are connected with a resistor R9.

The output end of the hysteresis comparator U3 is connected with a resistor R2 and a resistor R8.

Fig. 1 is a circuit diagram of the present embodiment. The tested signal is input to the operational amplifier of U1 through a filter circuit consisting of R3 and C3, and D1 is an ESD protection device to prevent surge electrostatic damage caused by complex collection field environment. The U1 circuit part is a follower, namely the collected signal 1:1 is output, and the driving capability is improved.

After the output of U1, it passes through a DC blocking circuit composed of C2 and R4, and then passes through a bias amplifier circuit of U2 to output. One end of the R5 is biased with reference voltage of 2.5V.

After the output of the U2 part, the output passes through a hysteresis comparator of U3, and the anti-interference capability is very strong. U3 is the OD gate output, requires an external pull, and is a 5V standard TTL.

The tested signal passes through a filter circuit consisting of R3 and C3, one end of R3 is connected with the tested signal, and the other end is connected with 3 pins of C3, D1 and U1. D1 is a 3-pin bidirectional switching diode. U1 is an operational amplifier. The single 15V power supply is adopted for supplying power, and the input and the output of the negative pole of U1 form a follower. The output of U1 is connected with C2, the other end of C2 is connected with R4, the other end of R4 is connected with R1 to form an amplifying circuit, the other end of R4 is connected with the negative pole input of U2, and C1 and R1 form a filter circuit. The anode of U2 is connected to 2.5V bias voltage source through R5. R5 was added to match R4 to achieve current balance. The output of the U2 passes through the R5, the other end of the R5 is connected with the anode input of the U3, and the R9 and the R5 form a hysteresis voltage range. Since the U3 comparator is an OD output comparator, it needs to be pulled up by R2 from the outside, U3 is output through pull-up, and the other end R8 is an output resistor.

The design principle is as shown above, and relevant parameter adjustment can be carried out according to actual conditions during application. For example, the filter network formed by C1 and R1 can take values according to signal noise and the frequency band of the signal to be acquired, R1 and R4 can adjust the amplification factor, and R9 and R5 can adjust the range of hysteresis voltage. If the amplitude of the detected signal is small, the U1 can be powered by 5V, and if the amplitude of the detected signal is large, a voltage division circuit can be added at the front end of the U1. If the output level is not TTL, the pull-up can be performed according to actual needs. The baud chart of the design can be observed through a network analyzer, and the improvement can be carried out according to the actual situation.

As can be seen from fig. 2, the time unit is 50ms (i.e. 50ms for one horizontal bin of the oscilloscope), and the frequency is known to be 10 HZ. The channel 1 is a voltage to be measured, parameters of the channel 1 are sine waves with a peak-to-peak value of 0.2V, an offset of 0.1V and a frequency of 100HZ, the channel 2 is a sine wave with a driving capability increased after passing through a following circuit of U1 but a waveform unchanged, and the waveform of the channel 3 is a sine wave with an offset of 2.5V and an amplification factor of 10 after passing through a bias amplifying circuit of U2, and is compared by a hysteresis comparator of U3 to output a standard 5V TTL square wave.

As can be seen from the waveform of FIG. 3, the triangular wave signal frequency of the signal to be measured is 10KHZ, the amplitude is 5V, and the circuit outputs 5V TTL square wave with the frequency of 10KHZ after following, bias amplification and hysteresis comparison.

As can be seen from the waveform of FIG. 4, the frequency of the sine wave signal of the signal to be measured is 100KHZ, the peak-to-peak value is 2V, and the offset is 4V. The designed circuit outputs 5V TTL square waves with the frequency of 100KHZ after following, bias amplification and hysteresis comparison.

As can be seen from the waveform of FIG. 5, the frequency of the sine wave signal of the signal to be measured is 100KHZ, the peak-to-peak value is 15V, and the offset is 7.5V. The designed circuit outputs 5V TTL square waves with the frequency of 100KHZ after following, bias amplification and hysteresis comparison.

As can be seen from fig. 2 to 5, the circuit has a wide application range. The voltage amplitude is in the range of 0.2V to 15V peak-to-peak value, and the applicable waveform range is triangular wave, sine wave and other waveforms.

Claims

1. The frequency detection circuit of various wide voltages is characterized by comprising a filter circuit, an operational amplifier U1, an ESD protection device D1, a blocking circuit, a bias amplification circuit and a hysteresis comparator U3; one end of the filter circuit is connected with a signal to be detected, the other end of the filter circuit is connected with the operational amplifier U1 and the ESD protection device D1, the output end of the operational amplifier U1 is connected with the blocking circuit, the blocking circuit is connected with the bias amplification circuit, the bias amplification circuit is connected with the hysteresis comparator U3, and the output end of the hysteresis comparator U3 outputs frequency.

2. The frequency detection circuit for various wide voltages of claim 1, wherein the filter circuit comprises a resistor R3 and a capacitor C3, and the resistor R3 and the capacitor C3 are connected in sequence to form the filter circuit; ESD protection device D1 is a 3-pin bidirectional switching diode.

3. The multiple-voltage frequency detection circuit according to claim 2, wherein the resistor R3 is connected to the signal under test at one end and to the capacitor C3, the ESD protection device D1 and the 3 pins of the operational amplifier U1 at the other end.

4. The frequency detection circuit for various voltages of claim 1, wherein the negative input of the operational amplifier U1 is connected to the output to form a follower.

5. The frequency detection circuit for various wide voltages of claim 1, wherein the dc blocking circuit comprises a capacitor C2 and a resistor R4, the output of the operational amplifier U1 is connected to the capacitor C2, and the capacitor C2 is connected to the resistor R4.

6. The frequency detection circuit for various voltages of claim 5, wherein the bias amplifying circuit comprises a resistor R1, an operational amplifier U2 and a capacitor C1; a resistor R1 is connected between the negative input end and the output end of the operational amplifier U2 in parallel, and a capacitor C1 is connected to the resistor R1 in parallel; the resistor R4 is connected with the resistor R1, and the resistor R4 is connected with the negative pole input of the operational amplifier U2.

7. The circuit for detecting frequencies of various voltages as claimed in claim 5, wherein the positive electrode of the operational amplifier U2 is connected to a bias voltage source through a resistor R5; the other end of the resistor R5 is connected with a resistor R7; the resistor R7 is connected with the negative input end of the U3; the output end of the operational amplifier U2 is connected with the positive input of a hysteresis comparator U3 through a resistor R6; a resistor R9 is connected in parallel between the positive input end and the output end of the hysteresis comparator U3.

8. The circuit for detecting frequencies of various voltages as claimed in claim 7, wherein the output terminal of the hysteretic comparator U3 is connected to the resistor R2 and the resistor R8.