CN213279516U - Alternating-current side-split symmetrical decoupling single-phase inverter - Google Patents
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- CN213279516U CN213279516U CN202022578101.0U CN202022578101U CN213279516U CN 213279516 U CN213279516 U CN 213279516U CN 202022578101 U CN202022578101 U CN 202022578101U CN 213279516 U CN213279516 U CN 213279516U
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Abstract
The utility model relates to a single-phase dc-to-ac converter of side split symmetry decoupling zero. The alternating-current side split symmetrical decoupling single-phase inverter comprises an H-bridge inverter, wherein an upper half-bridge structure comprises an upper half-bridge first unit and an upper half-bridge second unit which are connected in parallel, the upper half-bridge first unit comprises an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 which are connected in parallel, and the upper half-bridge second unit comprises an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 which are connected in parallel; the lower half-bridge structure comprises a lower half-bridge first unit and a lower half-bridge second unit which are connected in parallel, the lower half-bridge first unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 which are connected in parallel, the lower half-bridge second unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 which are connected in parallel, an inductor L1 is arranged between the upper half-bridge first unit and the lower half-bridge first unit, and an inductor L2 is arranged between the upper half-bridge second unit and the lower half-bridge second unit. The utility model discloses can reduce cost and loss increase, reach the effect of complete decoupling zero.
Description
Technical Field
The utility model relates to a single-phase inverter structural design field especially relates to a single-phase inverter of AC side split symmetry decoupling zero.
Background
The single-phase inverter has wide application in residential and industrial power supplies, however, in the process of performing power conversion between the direct current side and the alternating current side, frequency doubling pulsation is introduced at the direct current side, and the efficiency of the power supply at the direct current side is affected. In view of the above, many power decoupling techniques are proposed, and a simple method for buffering the frequency-doubled power is to connect a large electrolytic capacitor in parallel on the dc side, but the life of the large electrolytic capacitor is short, which may affect the service life of the single-phase inverter. In order to buffer the double frequency power in the system, many scholars propose an active decoupling method. A power decoupling circuit is proposed to be connected in parallel on a direct current side, a Virtual Capacitor Concept is proposed in a document of An Active Low-Frequency Ripple Control Method Based on the Virtual Capacitor Concept for BIPV Systems, and current integration is introduced into a Control strategy to replace unit feedback so as to quickly compensate secondary ripples in a system. Decoupling is also proposed on the alternating current side, a parallel power decoupling circuit on the alternating current side is proposed in the document 'a novel micro inverter power decoupling circuit based on a Buck/Boost circuit', and the running states of four modes of a decoupling topology are constructed so as to compensate double frequency power. In addition, the scheme utilizes an algorithm and an intermediate bus capacitor to decouple the direct current link of the two-stage inverter.
The scheme can achieve the effect of inhibiting secondary ripples, but an additional switching device is needed to construct a power decoupling circuit, so that the cost and the loss of the whole system are increased, and the effect of complete decoupling cannot be achieved.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a single-phase dc-to-ac converter of side split symmetry decoupling zero can reduce cost and loss increase, reaches the effect of complete decoupling zero.
In order to achieve the above object, the utility model provides a following scheme:
an alternating current side split symmetrically decoupled single phase inverter comprising an H-bridge inverter comprising symmetrical upper and lower half-bridge structures, the upper half-bridge structure comprising an upper half-bridge first cell and an upper half-bridge second cell in parallel, the upper half-bridge first cell comprising an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 in parallel, the upper half-bridge second cell comprising an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 in parallel; the lower half-bridge structure comprises a lower half-bridge first unit and a lower half-bridge second unit which are connected in parallel, the lower half-bridge first unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 which are connected in parallel, the lower half-bridge second unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 which are connected in parallel, the upper half-bridge first unit is provided with an inductor L1 between the lower half-bridge first unit, and the upper half-bridge second unit is provided with an inductor L2 between the lower half-bridge second unit.
Optionally, the diode D1 is connected between the collector and the emitter of the igbt G1 in parallel, the diode D2 is connected between the collector and the emitter of the igbt G2 in parallel, the diode D3 is connected between the collector and the emitter of the igbt G3 in parallel, and the diode D4 is connected between the collector and the emitter of the igbt G4 in parallel.
Optionally, the collector of the insulated gate bipolar transistor G1, the cathode of the diode D1 and the anode of the capacitor C3 are connected to the positive terminal of the power supply, and the collector of the insulated gate bipolar transistor G3, the cathode of the diode D3 and the anode of the capacitor C4 are connected to the positive terminal of the power supply; the emitter of the insulated gate bipolar transistor G2, the anode of the diode D2 and the cathode of the capacitor C1 are connected with the cathode end of the power supply, and the emitter of the insulated gate bipolar transistor G4, the anode of the diode D4 and the cathode of the capacitor C2 are connected with the cathode end of the power supply.
Optionally, the inductor L1 and the inductor L2 are ac-side filter inductors.
Optionally, the capacitor C1, the capacitor C2, the capacitor C3, and the capacitor C4 are original symmetrical split filter capacitors on an alternating current side, and the capacitor C1, the capacitor C2, the capacitor C3, and the capacitor C4 are used for buffering double-frequency power of a system.
Optionally, a resistor is further included between the upper half-bridge first unit, the upper half-bridge second unit, the lower half-bridge first unit, and the lower half-bridge second unit.
According to the utility model provides a concrete embodiment, the utility model discloses a following technological effect:
the utility model discloses only utilize the original filtering splitting electric capacity of interchange side, need not extra switching element, can play the effect of the two frequency power of compensation to reach the purpose of removing electrolytic capacitor ization, accomplish complete decoupling zero moreover. The utility model discloses can leave out the original support electric capacity of direct current side, only can accomplish the decoupling zero process in the interchange side, shortened two times power buffer circuit frequently, and whole topological structure is succinct, and algorithm control is simple.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic circuit diagram of an AC side split symmetrical decoupling single-phase inverter;
FIG. 2 is a schematic diagram of an AC side split symmetrical decoupling single-phase inverter control system;
FIG. 3 is a schematic of the capacitor C1 and C2 voltage waveforms before decoupling;
FIG. 4 is a schematic of the capacitor C3 and C4 voltage waveforms before decoupling;
FIG. 5 is a schematic diagram of a DC side current waveform before decoupling;
FIG. 6 is a graph of the voltage waveforms of capacitors C1 and C2 after decoupling;
FIG. 7 is a graph of the voltage waveforms of capacitors C3 and C4 after decoupling;
fig. 8 is a schematic diagram of the dc-side current waveform after decoupling.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model aims at providing a single-phase dc-to-ac converter of side split symmetry decoupling zero can reduce cost and loss increase, reaches the effect of complete decoupling zero.
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
Fig. 1 is a schematic circuit diagram of an alternating-current side split symmetrical decoupling single-phase inverter. As shown in fig. 1, the ac side split symmetrically decoupled single phase inverter comprises an H bridge inverter including symmetrical upper and lower half bridge structures, the upper half bridge structure including an upper half bridge first unit and an upper half bridge second unit connected in parallel, the upper half bridge first unit including an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 connected in parallel, the upper half bridge second unit including an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 connected in parallel; the lower half-bridge structure comprises a lower half-bridge first unit and a lower half-bridge second unit which are connected in parallel, the lower half-bridge first unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 which are connected in parallel, the lower half-bridge second unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 which are connected in parallel, the upper half-bridge first unit is provided with an inductor L1 between the lower half-bridge first unit, and the upper half-bridge second unit is provided with an inductor L2 between the lower half-bridge second unit.
The diode D1 is connected between the collector and the emission set of the insulated gate bipolar transistor G1 in parallel, the diode D2 is connected between the collector and the emission set of the insulated gate bipolar transistor G2 in parallel, the diode D3 is connected between the collector and the emission set of the insulated gate bipolar transistor G3 in parallel, and the diode D4 is connected between the collector and the emission set of the insulated gate bipolar transistor G4 in parallel.
The collector of the insulated gate bipolar transistor G1, the cathode of the diode D1 and the anode of the capacitor C3 are connected with the positive end of the power supply, and the collector of the insulated gate bipolar transistor G3, the cathode of the diode D3 and the anode of the capacitor C4 are connected with the positive end of the power supply; the emitter of the insulated gate bipolar transistor G2, the anode of the diode D2 and the cathode of the capacitor C1 are connected with the cathode end of the power supply, and the emitter of the insulated gate bipolar transistor G4, the anode of the diode D4 and the cathode of the capacitor C2 are connected with the cathode end of the power supply.
The inductor L1 and the inductor L2 are filter inductors on the alternating current side. The capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are original symmetrical split filter capacitors on the alternating current side, and the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are used for buffering double-frequency power of a system. By controlling the fundamental frequency common mode component in the decoupling capacitor, the double frequency power of the system is accurately compensated.
The alternating current side splitting symmetrical decoupling single-phase inverter further comprises a resistor, wherein the resistor is located among the upper half-bridge first unit, the upper half-bridge second unit, the lower half-bridge first unit and the lower half-bridge second unit.
As shown in fig. 1, the main circuit is a single-phase H-bridge inverter, and it is assumed that the output voltage and the output current are the ac side output power:
v0=V0sinωt (1)
i0=I0sinωt (2)
the output power at the AC side is as follows:
from the formula (3), it can be seen that the double frequency power exists at the ac output side, if decoupling control is not performed, secondary ripple pulsation occurs at the dc side, and common mode voltage is injected into the two sets of symmetrical split filter capacitors at the ac side, so that the double frequency power of the system is compensated, the purpose of electrolytic capacitive removal is achieved, and the output voltage is ensured to be unchanged.
When the common mode voltage is not injected, the voltages of the capacitors C1, C2, C3 and C4 are respectively:
v in formulae (4) to (7)dcIs a dc side input voltage.
When injecting a common mode voltage VconThe capacitor voltage is then:
the common mode voltage form in equations (8) to (11) is:
Vcon=Asin(ωt+β) (12)
the sum of the reactive powers on the two sets of split decoupling capacitors obtained from the voltages in equations (8) - (11) is:
p in formula (13)c1For reactive power on capacitor C1, Pc2For reactive power on capacitor C2, Pc3For reactive power on capacitor C3, Pc4Is the reactive power on the capacitor C4.
Combining the double-frequency power condition of the alternating current output side, as shown in formula (3), in order to make the double-frequency instantaneous power of the whole system be 0, the reactive power on the decoupling capacitor is required to exactly compensate the reactive power output by the alternating current side, and the satisfied relation is as follows:
the effect of complete decoupling can be achieved by changing the initial phase and amplitude of the common-mode voltage, wherein:
since the dc power supply side satisfies the KVL relationship with the capacitor C1 voltage and the capacitor C3 voltage, the capacitor voltage and the dc input voltage satisfy the relationship as follows, ignoring the inductor voltage:
Vdc=Vc1+Vc3=Vc2+Vc4 (17)
therefore, the left capacitor bank only needs to control one of the voltages of the decoupling capacitor C1 or C3, and similarly, the voltage of the decoupling capacitor C2 or C4 is controlled, the voltages of the capacitors C1 and C2 are selected as control objects, classical voltage and current double-loop control is utilized, the outer loop is decoupling capacitor voltage, the inner loop is decoupling inductor current, and the whole control block diagram is as shown in fig. 2.
V in FIG. 2c1refThe voltage form can be obtained according to the formulas (8), (15) and (16), and the voltage of the sampling decoupling capacitor C1 is compared with the voltage vc1refObtaining an error signal by subtracting, obtaining an inductive current reference value by the error signal through a voltage controller GV1(S), obtaining a current error signal by subtracting the inductive current reference value from the inductive current sampling value, obtaining a duty ratio signal by the error signal through a current controller Gil, d in FIG. 21Duty ratio signal, d, corresponding to switching tube G1 of FIG. 12Corresponding to the G2 duty cycle signal.
Similarly, the duty ratio signal d generated at the lower part of the control block diagram3And d4Corresponding to G3 and G4, v in FIG. 1, respectivelyc2refThe voltage of the sampling capacitor C2 is calculated from the voltage v of the sampling capacitor C2 by the following equations (9), (15) to (16)c2refObtaining an error signal by subtracting, obtaining a current reference value of the inductor L2 by a voltage controller Gv2(S), and then sampling a current value of the inductor L2 and iL2refAnd (3) obtaining an error signal by performing difference, obtaining a right bridge arm modulation wave in the figure 1 by passing the error signal through a current controller Gi2(S), and comparing the right bridge arm modulation wave with a triangular carrier wave to obtain a duty ratio signal.
Simulation verification is carried out on simulation software matlab, the voltage input of a direct current side is 450V, the parameter of a decoupling capacitor is set to be 60uf, the parameter of a decoupling inductor is set to be 1mH, the load is 200 ohms, and the rated power is 115W.
The following fig. 3 and 4 are waveforms of the capacitor voltage before decoupling and the output voltage, the decoupling capacitor voltage has 225V dc bias, the voltage ripple is 107.5V, the maximum value of the capacitor voltage is 332.5V, and the minimum value is 117.5V, as shown in equations (1) - (4), and the same set of decoupling capacitor voltages C1 and C2, C3 and C4 are 180 degrees out of phase. The output voltage is a sine wave with amplitude of 215V, fig. 5 is a waveform of the direct current side current before decoupling, and it can be seen that the frequency of the waveform is 100Hz, the maximum value of the direct current side current is 1.16A, and the minimum value is-0.55A.
Fig. 6 and 7 show the capacitor voltage and the output voltage waveform after decoupling, it can be seen that the output voltage decoupling is consistent before and after, the output voltage is not changed in the decoupling process, the decoupling capacitor voltage is increased in amplitude ratio before decoupling due to injection of common mode voltage, the maximum voltage value of the decoupling capacitor C1 is 388V and the minimum voltage value is 61V, the maximum voltage value of the decoupling capacitor C2 is 369V, the minimum voltage value is 80V, the maximum voltage value of the decoupling capacitor C3 is 388V and the minimum voltage value is 62V, the maximum voltage value of the decoupling capacitor C4 is 370V and the minimum voltage value is 81V. After decoupling, the secondary ripple of the direct current side current reaches complete decoupling, and only the direct current offset is 0.35A at the moment. Fig. 8 is a schematic diagram of the dc-side current waveform after decoupling.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principle and the implementation of the present invention are explained herein by using specific examples, and the above description of the embodiments is only used to help understand the device and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the concrete implementation and the application scope. In summary, the content of the present specification should not be construed as a limitation of the present invention.
Claims (6)
1. An alternating current side split symmetrical decoupling single-phase inverter, which is characterized by comprising an H bridge inverter, wherein the H bridge inverter comprises an upper half-bridge structure and a lower half-bridge structure which are symmetrical, the upper half-bridge structure comprises an upper half-bridge first unit and an upper half-bridge second unit which are connected in parallel, the upper half-bridge first unit comprises an insulated gate bipolar transistor G1, a diode D1 and a capacitor C3 which are connected in parallel, and the upper half-bridge second unit comprises an insulated gate bipolar transistor G3, a diode D3 and a capacitor C4 which are connected in parallel; the lower half-bridge structure comprises a lower half-bridge first unit and a lower half-bridge second unit which are connected in parallel, the lower half-bridge first unit comprises an insulated gate bipolar transistor G2, a diode D2 and a capacitor C1 which are connected in parallel, the lower half-bridge second unit comprises an insulated gate bipolar transistor G4, a diode D4 and a capacitor C2 which are connected in parallel, the upper half-bridge first unit is provided with an inductor L1 between the lower half-bridge first unit, and the upper half-bridge second unit is provided with an inductor L2 between the lower half-bridge second unit.
2. The ac-side split symmetrically decoupled single-phase inverter of claim 1, wherein the diode D1 is connected in parallel between the collector and the emitter of the igbt G1, the diode D2 is connected in parallel between the collector and the emitter of the igbt G2, the diode D3 is connected in parallel between the collector and the emitter of the igbt G3, and the diode D4 is connected in parallel between the collector and the emitter of the igbt G4.
3. The ac-side split symmetrically decoupled single-phase inverter of claim 1, wherein the collector of the igbt G1, the cathode of the diode D1 and the anode of the capacitor C3 are connected to the positive terminal of the power supply, and the collector of the igbt G3, the cathode of the diode D3 and the anode of the capacitor C4 are connected to the positive terminal of the power supply; the emitter of the insulated gate bipolar transistor G2, the anode of the diode D2 and the cathode of the capacitor C1 are connected with the cathode end of the power supply, and the emitter of the insulated gate bipolar transistor G4, the anode of the diode D4 and the cathode of the capacitor C2 are connected with the cathode end of the power supply.
4. The ac-side split symmetrically decoupled single-phase inverter of claim 1, wherein the inductor L1 and the inductor L2 are ac-side filter inductors.
5. The ac-side split symmetrically decoupled single-phase inverter of claim 1, wherein the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are original symmetrical split filter capacitors on the ac side, and the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 are used for buffering the double-frequency power of the system.
6. The ac side split symmetrically decoupled single phase inverter of claim 1, further comprising a resistor between the upper half bridge first cell, the upper half bridge second cell, the lower half bridge first cell, and the lower half bridge second cell.
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