CN213240882U

CN213240882U - Signal measurement processing generation device based on FPGA

Info

Publication number: CN213240882U
Application number: CN202022833832.5U
Authority: CN
Inventors: 吴泽; 梁有霖; 王冠
Original assignee: Wuhan University WHU
Current assignee: Wuhan University WHU
Priority date: 2020-11-30
Filing date: 2020-11-30
Publication date: 2021-05-18
Anticipated expiration: 2030-11-30

Abstract

The utility model provides a signal measurement handles production device based on FPGA, including emitter follower module, AD conversion module, FPGA module, DA conversion module, filter module, emitter follower module links to each other with AD conversion module, AD conversion module links to each other with FPGA module, FPGA module links to each other with DA conversion module, DA conversion module links to each other with filter module, emitter follower includes OPA690 high conversion rate operational amplifier, OPA 690's inverting input end links to each other with the output; the AD conversion module comprises a THS4151 full differential amplifier and an ADS805 digital-to-analog converter, and the THS4151 is connected with the ADS 805; the FPGA module comprises an FPGA and a touch display screen, and the FPGA is connected with the touch display screen; the DA conversion module comprises a subtracter consisting of a DAC904 analog-to-digital converter and an OPA690 operational amplifier; the filter module includes a capacitor and an inductor. The utility model discloses simple structure, cheap, energy consumption are lower, occupy smallly, have signal measurement, processing, generate the function concurrently.

Description

Signal measurement processing generation device based on FPGA

Technical Field

The utility model belongs to the technical field of signal processing, concretely relates to signal measurement handles production device based on FPGA.

Background

The signal processing has a wide range of applications, including power supply systems, voice processing, communication systems, sonar, space technology, automatic control systems, instrumentation, and biomedical engineering. Measurement, processing and generation of signals are three important processes for signal processing applications. The signal measurement is to measure the waveform, amplitude, frequency and other parameters of the electric signal; the signal processing is a process of converting an electric signal to meet the requirements of people; the generation of signals is primarily to generate signals of various frequencies, waveforms and output levels.

At present, the measuring, processing and generating devices of signals are various. The measurement of the signal generally uses an oscilloscope, the processing of the signal generally uses a computer, and the generation of the signal generally uses a signal source. The measurement, processing, and generation of signals using different devices are expensive, consume high energy, and are complex to operate. In addition, various devices occupy a large volume and cannot adapt to complex application environments. Therefore, it is necessary to design a signal measurement processing and generating device which has the advantages of simple scheme, low energy consumption, small occupied volume, simple operation and functions of measuring, processing and generating signals.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to prior art's weak point, provide a scheme simple, the energy consumption is lower, occupy that the volume is less, easy operation and have the signal measurement processing who measures, handle and produce the function of signal concurrently and produce the device.

In order to solve the technical problem, the utility model provides a signal measurement processes production device based on FPGA, including emitter follower module, AD conversion module, FPGA module, DA conversion module, filter module, emitter follower module with AD conversion module links to each other, AD conversion module with FPGA module links to each other, FPGA module with DA conversion module links to each other, DA conversion module with filter module links to each other, emitter follower includes OPA690 high conversion rate operational amplifier, OPA 690's inverting input end links to each other with the output; the AD conversion module comprises a THS4151 full differential amplifier and an ADS805 digital-to-analog converter, and the THS4151 is connected with the ADS 805; the FPGA module comprises an FPGA and a touch display screen, and the FPGA is connected with the touch display screen; the DA conversion module comprises a subtracter consisting of a DAC904 analog-to-digital converter and an OPA690 operational amplifier; the filter module includes a capacitor and an inductor.

In one embodiment, the emitter follower module is provided with a first input terminal for receiving an input signal, and the first output terminal of the emitter follower module is connected to the first input terminal of the AD conversion module.

In an embodiment, a first input end of the AD conversion module is connected to a first input end of the THS4151, a first output end and a second output end of the THS4151 are respectively connected to a first input end and a second input end of the ADs805, and an output end of the ADs805 is connected to an input end of the FPGA module.

In an embodiment, the input end of the FPGA module is connected to the input end of the FPGA chip, and the output end of the FPGA chip is connected to the input end of the touch display screen and the output end of the FPGA module, respectively.

In one embodiment, the output terminal of the FPGA module is connected to the input terminal of the DAC904, the first output terminal and the second output terminal of the DAC904 are respectively connected to the first input terminal and the second input terminal of the OPA690, and the first output terminal of the OPA690 is connected to the first input terminal of the filter.

In one embodiment, the first output terminal of the filter is a signal output terminal.

In one embodiment, the clock signal of the FPGA module is 100MHz, and the cut-off frequency of the filter is 20 MHz.

Compared with the prior art, the beneficial effects of the utility model are that: the device has the advantages that the measurement, processing and generation functions of signals are integrated in one device, the number of devices in application is reduced, the power consumption of signal processing is reduced by adopting the FPGA module, the occupied volume is reduced, and the operation is simpler by adopting the touch screen.

Drawings

FIG. 1 is a general block diagram of the present invention;

fig. 2 is a circuit diagram of an emitter follower module according to an embodiment of the present invention;

fig. 3 is a circuit diagram of an AD conversion module according to an embodiment of the present invention;

fig. 4 is a circuit diagram of a DA conversion module according to an embodiment of the present invention;

fig. 5 is a circuit diagram of a filter module according to an embodiment of the present invention;

Detailed Description

In order to make those skilled in the art better understand the technical solutions in the present specification, the technical solutions in the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is obvious that the described embodiments are only a part of the embodiments of the present specification, and not all of the embodiments. All other embodiments obtained by a person skilled in the art based on the embodiments in the present specification without any inventive step should fall within the scope of protection of the present specification. And the drawings described are only schematic and are non-limiting.

In this context, for the sake of brevity, not all possible combinations of individual features in the various embodiments or examples are described. Therefore, the respective features in the respective embodiments or examples may be arbitrarily combined as long as there is no contradiction between the combinations of the features, and all the possible combinations should be considered as the scope of the present specification.

The contents appearing in the present invention, which do not belong to the protection object of the present invention, are all for making the technical personnel in the field understand the present solution more easily, and should not be understood as seeking protection to these contents, and these contents all belong to the prior art.

As shown in fig. 1, an FPGA-based signal measurement processing generation apparatus includes an emitter follower module 1, an AD conversion module 2, an FPGA module 3, a DA conversion module 4, and a filter module 5, where the emitter follower module 1 is connected to the AD conversion module 2, the AD conversion module 2 is connected to the FPGA module 3, the FPGA module 3 is connected to the DA conversion module 4, the DA conversion module 4 is connected to the filter module 5, the emitter follower 1 includes an OPA690 high conversion rate operational amplifier, and an inverting input terminal of the OPA690 is connected to an output terminal; the AD conversion module 2 comprises a THS4151 full differential amplifier and an ADS805 digital-to-analog converter, and the THS4151 is connected with the ADS 805; the FPGA module 3 comprises an FPGA and a touch display screen, and the FPGA is connected with the touch display screen; the DA conversion module 4 comprises a subtracter consisting of a DAC904 analog-to-digital converter and an OPA690 operational amplifier; the filter module 5 comprises a capacitor and an inductor.

According to the present embodiment, the emitter follower module 1 receives an input signal, and the emitter follower module 1 increases the current of the input signal, improves the load capacity of the entire circuit, and isolates the system from an external system. The AD conversion module 2 converts the analog signal input by the emitter follower module 1 into a digital signal and sends the digital signal to the FPGA module 3; the FPGA module 3 is used for measuring, amplifying, filtering and the like of input signals, can independently generate waveforms, and performs display control through a touch display screen, and the FPGA module 3 is used for sending the processed signals to the DA conversion module 4; the DA conversion module 4 converts the digital signal into an analog signal and outputs the analog signal; the filter module 5 performs filtering processing on the analog signal output by the DA conversion module 4 to remove high-frequency noise.

In one embodiment, as shown in fig. 2, the emitter follower module 1 is provided with a first input terminal for receiving an input signal, and a first output terminal of the emitter follower module is connected to the first input terminal of the AD conversion module.

In an embodiment, as shown in fig. 3, a first input terminal of the AD conversion module 2 is connected to a first input terminal of the THS4151, a first output terminal and a second output terminal of the THS4151 are respectively connected to a first input terminal and a second input terminal of the ADs805, and an output terminal of the ADs805 is connected to an input terminal of the FPGA module. The SN74LV1T126DBVR chip converts a 3.3V clock into 3.5V to meet the requirement of the ADS805 clock; the THS4151 converts the input signal into two differential signals, and the two differential signals are connected to two differential input terminals of the ADS 805. The ADS805 converts the input analog signals into digital signals and transmits the digital signals to the FPGA module.

In an embodiment, the input end of the FPGA module 3 is connected to the input end of the FPGA chip, and the output end of the FPGA chip is connected to the input end of the touch display screen and the output end of the FPGA module, respectively. The FPGA module can judge and measure the waveform, amplitude and frequency of an input signal, amplify a digital signal, filter the digital signal and generate various signals. The touch display screen can be used for displaying the signal measurement result, and adjusting the amplification factor of the digital amplifier, the cut-off frequency of the digital filter and the type and parameters of the generated signal by touch.

In one embodiment, as shown in fig. 4, the output terminal of the FPGA block 3 is connected to the input terminal of the DAC904, the first output terminal and the second output terminal of the DAC904 are respectively connected to the first input terminal and the second input terminal of the OPA690, and the first output terminal of the OPA690 is connected to the first input terminal of the filter.

According to this embodiment, the DAC904 converts the digital signal in the FPGA module 3 into a differential current signal; the differential current signal is converted into a differential voltage signal after passing through the two resistors; the differential voltage signal is output to the filter block 5 after passing through the subtractor formed by the OPA 690.

In one embodiment, the clock signal of the FPGA module 3 is 100MHz, and the cut-off frequency of the filter module 5 is 20 MHz. According to the present embodiment, as shown in fig. 5, the filter module 5 forms a seven-order passive low-pass filter using resistors, capacitors and inductors. The DA conversion module 4 can filter the output signal, remove high-frequency noise in the signal and enable the waveform of the signal to be smoother. The output signal of the filter is the final output signal

It should be understood that parts of the specification not set forth in detail are well within the prior art. The scope of the present invention is not limited to the above-described embodiments, and it is obvious that those skilled in the art can make various modifications and variations to the present invention without departing from the scope and spirit of the present invention. It is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims

1. The utility model provides a signal measurement handles apparatus that produces based on FPGA, includes emitter follower module, AD conversion module, FPGA module, DA conversion module, filter module, the emitter follower module with AD conversion module links to each other, AD conversion module with FPGA module links to each other, FPGA module with DA conversion module links to each other, DA conversion module with filter module links to each other, its characterized in that:

the emitter follower comprises an OPA690 high conversion rate operational amplifier, and the inverting input end of the OPA690 is connected with the output end;

the AD conversion module comprises a THS4151 full differential amplifier and an ADS805 digital-to-analog converter, and the THS4151 is connected with the ADS 805;

the FPGA module comprises an FPGA and a touch display screen, and the FPGA is connected with the touch display screen;

the DA conversion module comprises a subtracter consisting of a DAC904 analog-to-digital converter and an OPA690 operational amplifier;

the filter module includes a capacitor and an inductor.

2. The FPGA-based signal measurement processing generating apparatus of claim 1, wherein: the emitter follower module is provided with a first input end for receiving an input signal, and a first output end of the emitter follower module is connected with a first input end of the AD conversion module.

3. The FPGA-based signal measurement processing generating apparatus of claim 2, wherein: the first input end of the AD conversion module is connected with the first input end of the THS4151, the first output end and the second output end of the THS4151 are respectively connected with the first input end and the second input end of the ADS805, and the output end of the ADS805 is connected with the input end of the FPGA module.

4. The FPGA-based signal measurement processing generating apparatus of claim 3, wherein: the input end of the FPGA module is connected with the input end of the FPGA chip, and the output end of the FPGA chip is respectively connected with the input end of the touch display screen and the output end of the FPGA module.

5. The FPGA-based signal measurement processing generating apparatus of claim 4, wherein: the output end of the FPGA module is connected with the input end of the DAC904, the first output end and the second output end of the DAC904 are respectively connected with the first input end and the second input end of the OPA690, and the first output end of the OPA690 is connected with the first input end of the filter.

6. The FPGA-based signal measurement processing generating apparatus of claim 5, wherein: the first output end of the filter is a signal output end.

7. The FPGA-based signal measurement processing generating apparatus of claim 1, wherein: the clock signal of the FPGA module is 100MHz, and the cut-off frequency of the filter is 20 MHz.