CN213028647U - Power supply circuit and circuit module thereof - Google Patents

Abstract

The utility model provides a supply circuit and circuit module thereof. The power supply circuit includes: the driving regulation circuit comprises a power device, and the power device and a load which are connected in series are coupled between a first power supply end and a second power supply end; and the charging control circuit and the capacitor device which are connected in series are coupled between the first power supply end and the second power supply end, and the charging control circuit is used for controlling the charging current of the capacitor device to be saddle-shaped. The utility model provides a supply circuit and circuit module and electronic packaging body thereof can be convenient for satisfy the new electromagnetic standard of Europe, and enables the LED load and do not have the stroboscopic, has higher efficiency and simplified external circuit simultaneously.

Description

Power supply circuit and circuit module thereof

Technical Field

The utility model relates to an electron field, concretely but not limited to relate to a supply circuit and circuit module thereof.

Background

The European Committee for electrotechnical standardization (CENELEC) promulgates a new standard for electromagnetic compatibility, IEC61000-3-2-2019 in 2019. The standard requires that the Power Factor (PF) of the mains power supply system be greater than 0.7 and that the 3 rd harmonic of the input current be less than 86% and the 5 th harmonic less than 61%.

At the same time, the efficiency of the mains power supply system is also an important parameter.

The existing common switching power supply circuit and linear power supply circuit are difficult to simultaneously meet the requirements.

SUMMERY OF THE UTILITY MODEL

To the one or more problems that above-mentioned provided, the utility model provides a supply circuit and circuit module thereof.

According to an aspect of the present invention, a power supply circuit includes: the driving regulation circuit comprises a power device, wherein the power device is connected with a load in series, and the power device and the load which are connected in series are coupled between a first power supply end and a second power supply end; and a charge control circuit connected in series with the capacitive device, the charge control circuit and the capacitive device connected in series being coupled between the first power supply terminal and the second power supply terminal, the charge control circuit including a saddle-shaped waveform signal generating circuit.

In one embodiment, the load comprises a Light Emitting Diode (LED).

In one embodiment, the first power terminal is coupled to the first output terminal of the rectifying circuit and the second power terminal is coupled to the second output terminal of the rectifying circuit.

In one embodiment, the power device has a first terminal, a second terminal, and a control terminal, wherein the driving adjustment circuit further comprises: the first error amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the first error amplifying circuit is coupled with the first end of the first current sampling resistor, the second end of the first current sampling resistor is coupled with the second power supply end, the second input end of the first error amplifying circuit is coupled with the first reference signal, and the output end of the first error amplifying circuit is coupled with the control end of the power device.

In one embodiment, the charge control circuit includes a current limiting transistor having a body diode with an anode coupled to the second power supply terminal and a cathode coupled to the capacitive device.

In one embodiment, the capacitor device has a first terminal and a second terminal, the first terminal of the capacitor device is coupled to a first power supply terminal, and the charge control circuit includes: a current-limiting transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the current-limiting transistor is coupled to the second terminal of the capacitor device; and a second error amplifying circuit having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the second error amplifying circuit is coupled to the first terminal of the second current sampling resistor, the second terminal of the second current sampling resistor is coupled to the second power terminal, the second input terminal of the second error amplifying circuit is coupled to the second reference signal, and the output terminal of the second error amplifying circuit is coupled to the control terminal of the current limiting transistor.

In one embodiment, an input terminal of the saddle-shaped waveform signal generating circuit is coupled to the first terminal of the current limiting transistor or to either of the load terminals, and an output terminal of the saddle-shaped waveform signal generating circuit is coupled to the second input terminal of the second error amplifying circuit.

In one embodiment, the saddle-shaped waveform signal generating circuit includes a subtracting circuit having a positive input coupled to a reference signal, a negative input coupled to a first terminal of the current limiting transistor or to either of the loads, and an output providing a second reference signal.

In one embodiment, the current-limiting transistor comprises an N-type metal oxide semiconductor field effect transistor, a source of the current-limiting transistor is coupled to the capacitor device, and a drain of the current-limiting transistor is coupled to the second current sampling resistor. In one embodiment, the power device comprises an N-type metal oxide semiconductor field effect transistor, a source of the power device is coupled to the first current sampling resistor, and a drain of the power device is coupled to the load.

According to another aspect of the present invention, a circuit module for supplying power to a load comprises the power supply circuit, the load, the capacitor device and the rectifier circuit as described in any of the above embodiments, wherein the rectifier circuit has an input terminal, a first output terminal and a second output terminal, wherein the input terminal of the rectifier circuit receives a commercial power ac or is coupled to a dimmer, the first output terminal of the rectifier circuit constitutes the first power terminal, and the second output terminal of the rectifier circuit constitutes the second power terminal.

The utility model provides a supply circuit and circuit module thereof can be convenient for satisfy the new relevant standard of electromagnetism in Europe, and enables the LED load and do not have the stroboscopic, has higher efficiency and the external circuit who simplifies simultaneously.

Drawings

Fig. 1 shows a schematic diagram of a power supply circuit according to an embodiment of the invention;

fig. 2A shows a schematic waveform diagram of a second reference signal according to an embodiment of the present invention;

fig. 2B shows a schematic waveform diagram of a second reference signal according to another embodiment of the present invention;

fig. 3A shows a schematic diagram of a power supply circuit according to an embodiment of the present invention;

fig. 3B shows a schematic diagram of a power supply circuit according to another embodiment of the present invention;

fig. 4 shows a schematic diagram of a waveform according to an embodiment of the invention;

fig. 5 shows an application circuit schematic diagram of a power supply system according to an embodiment of the present invention.

Detailed Description

For further understanding of the present invention, preferred embodiments of the present invention will be described below with reference to examples, but it should be understood that these descriptions are only for the purpose of further illustrating the features and advantages of the present invention, and are not intended to limit the claims of the present invention.

The description in this section is for exemplary embodiments only, and the present invention is not limited to the scope of the embodiments described. Combinations of different embodiments, or technical features of different embodiments, or similar prior art means, or technical features of embodiments, may be substituted for each other within the scope of the present invention.

The term "coupled" or "connected" in this specification includes both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a conductor, wherein the electrically conductive medium may contain parasitic inductance or parasitic capacitance, or through an intermediate circuit or component as described in the embodiments in the specification; indirect connections may also include connections through other active or passive devices that perform the same or similar function, such as connections through switches, signal amplification circuits, follower circuits, and so on. "plurality" or "plurality" means two or more. "A and/or B" means that A may be, B may be, or both A and B may be included.

Fig. 1 shows a power supply system according to an embodiment of the present invention, for supplying power to a load 13. The power supply system includes a power supply circuit 100, a rectifier circuit 14, a load 13, and a capacitor device Co. Wherein the power supply circuit 100 includes a drive adjusting circuit 11 and a charge control circuit 12.

The drive adjustment circuit 11 includes a power device Q1. The power device Q1 is used in series with the load 13, the series power device Q1 and the load 13 are coupled between the first power supply terminal Vin and the second power supply terminal GND, and the driving regulation circuit 11 is used for driving the load 13 based on the on state of the power device Q1.

The charging control circuit 12 is connected in series with the capacitor device Co, the charging control circuit 12 and the capacitor device Co connected in series are coupled between the first power supply terminal Vin and the second power supply terminal GND, and the charging control circuit 12 is configured to control a charging current of the capacitor device Co in a charging phase to have a saddle-shaped waveform in at least a partial section. The saddle shape shows the trend of descending first and then rising. The charge control circuit 12 thus comprises a saddle shaped waveform signal generating circuit for generating a saddle shaped waveform such that the charging current to the capacitive device Co follows the saddle shaped waveform reference signal.

In the illustrated embodiment, the load 13 includes a Light Emitting Diode (LED).

The input end of the rectifying circuit 14 is used for receiving the mains alternating current Vac, or receiving the mains alternating current Vac through the dimmer. The rectifier circuit 14 has two outputs: a first output terminal and a second output terminal. A first output terminal of the rectifying circuit 14 serves as a first power supply terminal Vin, and a second output terminal of the rectifying circuit 14 serves as a second power supply terminal GND.

The drive adjusting circuit 11 includes a power device Q1 and a first error amplifying circuit 111. The drive adjustment circuit 11 may also include a first current sampling resistor R1. In another embodiment, the first current sampling resistor R1 is integrated with the power device Q1, and the second terminal of the power device Q1 integrated with the current sampling resistor is directly coupled to the second power supply terminal GND. The first terminal of the power device Q1 is coupled to the load 13, the first terminal of the first current sampling resistor R1 is coupled to the second terminal of the power device Q1, the second terminal of the first current sampling resistor R1 is coupled to the second power source terminal GND, the first terminal of the power device Q1 is coupled to the low terminal of the load 13, and the high terminal of the load 13 is coupled to the first power source terminal Vin. The low end is the end with relatively lower voltage in the two ports when the device works normally, and the high end is the end with relatively higher voltage in the two ports when the device works normally. The first error amplifying circuit 111 is configured to generate a first error amplifying signal based on a difference signal between a current sampling signal representing a current flowing through the power device Q1 and a first reference signal Vref1, and the driving adjustment circuit controls the power device Q1 to make the load current follow the first reference signal Vref1 based on the first error amplifying signal. In the illustrated embodiment, the first error amplifying circuit 111 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the first error amplifying circuit 111 is coupled to the first terminal of the first current sampling resistor R1, the second input terminal of the first error amplifying circuit 111 is coupled to the reference signal Vref1, and the output terminal of the first error amplifying circuit 111 is coupled to the control terminal of the power device Q1. The first error amplifier circuit 111 is used to control the current flowing through the Q1 at a first reference current value Iref 1. In the illustrated embodiment, the power device Q1 includes an nmos fet, the source of the power device Q1 is coupled to the first current sampling resistor R1, the drain of the power device Q2 is coupled to a load, and the first error amplifier circuit 111 controls the current flowing from the drain to the source of the Q1 to be close to the first reference current Iref1 represented by the reference signal Vref 1. Preferably, the first reference signal Vref1 is a fixed value. The fixed value includes a condition that the fixed value can be set by a fixed reference value preset in the power supply circuit or can be adjusted by an external element and is a fixed value once set. The fixed first reference signal Vref1 is used to provide a constant current to load 13, for example, to eliminate strobing of LED load 13.

In the drive adjustment circuit 11 shown in fig. 1, the power device Q1 operates in a linear state. However, in other embodiments, the drive regulation circuit may employ any other form of topology or circuit for providing the required stable drive current to the load.

The capacitor device Co has a first terminal and a second terminal, wherein the first terminal of the capacitor device Co is coupled to the first power source terminal Vin. The charge control circuit 12 includes a current limiting transistor Q2 and a current control circuit 112. Preferably, the current control circuit 112 includes an error amplification circuit 112. The current control circuit 112 may also include other forms of control circuitry such as a comparator to control the current source to intermittently charge a capacitor so that the charging current to the capacitor device Co follows or approximately follows the second reference signal Vref 2. The charge control circuit 12 may also further include a second current sampling resistor R2. In one embodiment, the current limiting transistor Q2 and the current sampling resistor R2 are integrated. The current-limiting transistor Q2 has a first terminal, a second terminal, and a control terminal, wherein the first terminal of the current-limiting transistor Q2 is coupled to the low terminal of the capacitor device Co. The high terminal of the capacitor device Co is coupled to the first power source terminal Vin. In the illustrated embodiment, the current limiting transistor Q2 comprises an nmos field effect transistor having a first terminal that is a source, a second terminal that is a drain, and a control terminal that is a gate. The second current sampling resistor R2 has a first terminal and a second terminal, wherein the first terminal of the second current sampling resistor R2 is coupled to the second terminal of the current limiting transistor Q2, and the second terminal of the second current sampling resistor R2 is coupled to the second power terminal GND. The second error amplifying circuit 112 is configured to generate a second error amplified signal based on a difference signal between a current sampling signal representing a current flowing through the current limiting transistor Q2 and a second reference signal Vref2, and the charge control circuit 12 controls the current limiting transistor Q2 based on the second difference amplified signal so that the waveform of the charging current of the capacitive device Co follows the waveform of the second reference signal. The term "follow" is used herein to mean the approximate follow of a waveform, and a delayed or slightly distorted waveform is also included in the scope of "follow". In the embodiment shown in fig. 1, the second error amplifying circuit 112 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the second error amplifying circuit 112 is coupled to the first terminal of the second current sampling resistor R2, the second input terminal of the second error amplifying circuit 112 is coupled to the second reference signal Vref2 representing the second reference current, and the output terminal of the second error amplifying circuit 112 is coupled to the control terminal of the current limiting transistor Q2. The second reference signal is at least partially in the shape of a concave saddle.

Fig. 2A shows a waveform diagram of a second reference signal Vref2 according to an embodiment of the present invention, which is a half-wave waveform of open-upward sine wave with a period consistent with the period of the input signal Vin, and the segment is in a concave saddle shape. The second reference signal Vref2 of this waveform causes the waveform of the charging current of the capacitor Co to be concave saddle-shaped. When the input voltage Vin is higher, the input current Iin is lower, so that the conduction loss on the current-limiting transistor Q2 is lower, and the system efficiency is improved.

Fig. 2B shows a waveform diagram of a second reference signal Vref2 according to another embodiment of the present invention. A partial region of the second reference signal Vref2 has a concave saddle shape.

Continuing with the description of fig. 1, when the voltage output by the rectifying circuit 14 is high, the current flows from the input terminal of the rectifying circuit 14 to the output terminal of the rectifying circuit 14, the capacitive device Co is charged, and the charging current Ic flows from the first power supply terminal Vin to the capacitive device Co, at this time, the second error amplifying circuit 112 controls the current limiting transistor Q2 to form a channel under the gate of the transistor Q2, the charging current flows from the source to the drain of the current limiting transistor Q2, and the charging current follows the waveform of the second reference signal Vref2, so that the charging current Ic has a concave saddle-shaped waveform, or so that the charging current Ic has a saddle-shaped waveform during at least a part of the charging period.

At this time, the input current Iin of the first power source terminal Vin of the power supply circuit is i lload + Ic, where Iload is a current value flowing through the load 13, i.e., a current flowing from the drain to the source of the power device Q1, and Ic is a charging current value represented by the second reference signal Vref 2. The current Iin now has a saddle shape. When the input voltage Vin is high, the input current Iin is limited to a small value for reducing power consumption and improving efficiency. And the input current Iin is limited, and the current amount of the higher harmonic wave is lower, so that the requirements that the 3 rd harmonic wave of the input current is less than 86 percent and the 5 th harmonic wave of the input current is less than 61 percent are met.

When the absolute value of the ac power Vac is low, the capacitor device Co starts to discharge, and a discharge current Ic opposite to the charging current flows from the high terminal of the capacitor device Co to the load 13 through the first power terminal Vin and is limited to a predetermined reference value represented by the first reference signal Vref 1. Meanwhile, the discharge current Ic flows to the low terminal of the capacitor device Co through the second current sampling resistor R2. At this time, the error amplifying circuit 112 controls the control terminal voltage of the current limiting transistor Q2 to be in a low voltage state, a channel is not formed below the gate region of the current limiting transistor Q2 to be in an off state, and the discharge current Ic flows from the drain to the source through the body diode of the current limiting transistor Q2 to form a current path. According to the scheme, an additional diode device is not needed to be adopted for forming a discharge path, the circuit structure is simplified, and the cost is reduced.

Of course, in other embodiments, additional unidirectional devices may be provided across the current limiting transistor Q2 for forming the discharge path.

In the embodiment shown in fig. 1, both the power device Q1 and the current-limiting transistor Q2 employ an nmos fet, wherein the source of the power device Q1 and the drain of the current-limiting transistor Q2 are coupled to ground GND, and the body diode of the current-limiting transistor Q2 is used to form a discharge path. In other embodiments, different types of transistors may be used for the power device Q1 and the current limiting transistor Q2. The current limiting transistor Q2 may also include other types of transistors that incorporate a body diode for passing a discharge current to form a discharge path.

The circuit module for supplying power to a load according to an embodiment of the present invention includes the power supply circuit 100, the load 13, and the rectification circuit 14 as described in any of the above embodiments. The rectifying circuit 14 has an input terminal, a first output terminal and a second input terminal, wherein the input terminal of the rectifying circuit 14 is used for receiving the commercial power ac or receiving the commercial power ac through the dimmer, the first output terminal of the rectifying circuit 14 is coupled to the first power terminal Vin, and the second output terminal of the rectifying circuit 14 is coupled to the second power terminal GND. The circuit module may also further include a first current sampling resistor R1 and a second current sampling resistor R2. The circuit module can be manufactured on a printed circuit board.

In the illustrated embodiment, the first current sampling resistor R1 and the second current sampling resistor R2 each comprise a discrete device. In other embodiments, the first current sampling resistor R1 or the second current sampling resistor R2 may include a plurality of resistor devices connected in parallel or in series.

Fig. 3A shows a power supply circuit 200 according to an embodiment of the present invention. Wherein the charge control circuit 22 in the power supply circuit 200 further comprises a second reference signal generating circuit 221. The second reference signal generating circuit 221 is a saddle-shaped waveform signal generating circuit for generating a saddle-shaped waveform signal. The input terminal of the second reference signal generating circuit 221 is coupled to the first terminal of the power device Q1, i.e., the low terminal of the load 13, the output terminal of the second reference signal generating circuit 221 provides a second reference signal Vref2, and the second reference signal Vref2 is generated based on the voltage V1 at the first terminal of the power device Q1. In one embodiment, the second reference signal generating circuit 221 includes a subtracting circuit having a positive input coupled to a reference signal and a negative input coupled to the first terminal of the power device Q1 for receiving the terminal voltage of the power device Q1, for subtracting a sampling signal indicative of the terminal voltage V1 from the reference signal, and generating the second reference signal Vref2 based on a difference between an output signal of the subtracting circuit, i.e., the reference signal and the terminal voltage sampling signal. Thus, the second reference signal Vref2 includes a saddle-shaped waveform that opens upward. In the embodiment shown in fig. 3A, the input terminal of the second reference signal generating circuit 221 is coupled to the low terminal of the load 13. In another embodiment, the input terminal of the second reference signal generating circuit 221 is for coupling to a high side of a load, and receiving a terminal voltage sampling signal representing the input voltage Vin, and the second reference signal Vref2 is generated based on a difference signal between the reference signal and the terminal voltage sampling signal. The second error amplifying circuit 222 controls the charging current of the capacitive device Co based on the second reference signal Vref2 such that the current waveform at the time of charging follows the second reference signal Vref2, such that the charging current assumes a saddle-shaped waveform or the charging current assumes a saddle-shaped waveform for most of the interval during each charging cycle for charging the capacitive device Co.

Fig. 3B shows a power supply circuit according to another embodiment of the present invention. The input terminal of the second reference signal generating circuit 321 is coupled to the terminal of the current-limiting transistor Q2 coupled to the capacitive device Co, i.e. the low terminal of the capacitive device Co, the output terminal of the second reference signal generating circuit 321 provides a second reference signal Vref2, and the second reference signal Vref2 is generated based on the voltage of the low terminal of the capacitive device Co. In one embodiment, the second reference signal generating circuit 321 includes a subtracting circuit having a positive input terminal coupled to a reference signal and a negative input terminal coupled to the low terminal of the capacitor device Co, for subtracting a sampling signal representing the voltage at the low terminal of the capacitor device Co from the reference signal, and generating the second reference signal Vref2 based on the difference between the output signal of the subtracting circuit, i.e., the reference signal, and the sampling signal of the voltage at the low terminal of the capacitor device Co.

In further embodiments, the second reference signal generating circuit may obtain the saddle-shaped waveform signal by other forms of circuitry, such as by a digital waveform generator.

Fig. 4 shows a schematic waveform diagram according to an embodiment of the present invention. The waveforms are the waveform of the ac input voltage Vac, the waveform of the ac input current Iac, the waveform of the dc input current Iin, the load current Iload, and the waveform of the charging and discharging current Ic through the current limiting transistor, respectively. By the control in the embodiment of fig. 1, the ac input current Iac has a waveform as shown, wherein the ac input current Iac reaches a peak current state before a conduction angle of 60 degrees, and is used for meeting the requirements that the current reaches at least 5% of the current peak value before the conduction angle of 60 degrees, the current reaches the maximum value before 65 degrees, the current value is not less than 5% of the current peak value at 90 degrees, the third harmonic is less than 86%, and the fifth harmonic is less than 61%, so that the requirements of the new european standard are easily met.

The power supply circuit or circuit module provided by the above embodiment can make the current passing through the load smooth or constant by the first reference signal Vref1, so as to eliminate the ripple of the load current, and can be used to eliminate the stroboscopic phenomenon of the light emitting diode, and at the same time, the saddle-shaped waveform control of the second reference signal Vref2 is used to reduce the input current Iac when the input voltage Vac is higher, so as to reduce the power consumption at this time, and improve the system efficiency, and the system can be used to meet the environmental protection standard of electromagnetic compatibility in europe.

Fig. 5 shows a schematic diagram of an application circuit module of a power supply system according to an embodiment of the present invention. The circuit module comprises a rectifying circuit 34, a load 33, a capacitor device Co, an electronic package 300, a first current sampling resistor R1 and a second current sampling resistor R2. The electronic package 300 has a load pin LED, a capacitor pin CL, a first current limit pin CS1, a second current limit pin CS2, and a ground reference pin GND. Wherein the load pin LED is used for coupling with the low terminal of the load 33, and the high terminal of the load 33 is used for coupling with the input power Vin. The capacitor pin CL is used for coupling with a low terminal of a capacitor device Co, wherein a high terminal of the capacitor device Co is used for coupling with an input power Vin. The first current-limiting pin CS1 is coupled to a first terminal of the first current-sampling resistor R1, and the other terminal of the first current-sampling resistor R1 is coupled to the ground GND. The second current-limiting pin CS2 is coupled to a first terminal of a second current-sampling resistor R2, and another terminal of the second current-sampling resistor R2 is coupled to the ground GND. The ground reference pin GND is used for coupling to ground reference. Wherein the charging current flowing into pin CL assumes a saddle-shaped waveform when the capacitive device Co is charged. The current-limiting transistor in the power supply circuit 300 integrates a body diode, and the discharge current of the capacitor device Co forms a path through the body diode, so that the system eliminates the use of a discrete diode, the number of peripheral devices is very small, and the system cost is reduced.

In another embodiment, the electronic package 300 further has an input power pin Vin for coupling to an input voltage Vin for powering a control circuit in the electronic package or controlling a charging current waveform of the capacitive device Co based on the input voltage Vin. In other embodiments, signals from other locations, such as the electrical signal on the load pin LED, may be used to power the control circuitry.

In another embodiment, the power device Q1 and/or the current limiting transistor Q2 in the electronic package 300 are integrated on the same semiconductor substrate as the corresponding sampling resistor, and the electronic package does not include the first current limiting pin CS1 and/or the second current limiting pin CS 2. Can be used to further simplify the circuitry.

The description and applications of the present invention are illustrative and are not intended to limit the scope of the invention to the embodiments described above. The descriptions related to the effects or advantages in the specification may not be reflected in practical experimental examples due to uncertainty of specific condition parameters or influence of other factors, and the descriptions related to the effects or advantages are not used for limiting the scope of the invention. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the present invention.

Claims (11)

1. A power supply circuit, characterized in that the power supply circuit comprises:

the driving regulation circuit comprises a power device, wherein the power device is connected with a load in series, and the power device and the load which are connected in series are coupled between a first power supply end and a second power supply end; and

and the charging control circuit is connected with the capacitor device in series, the charging control circuit and the capacitor device which are connected in series are coupled between the first power supply end and the second power supply end, and the charging control circuit comprises a saddle-shaped waveform signal generating circuit.

2. The power supply circuit of claim 1 wherein the load comprises a light emitting diode.

3. The power supply circuit of claim 1 wherein the first power terminal is coupled to a first output terminal of the rectifying circuit and the second power terminal is coupled to a second output terminal of the rectifying circuit.

4. The power supply circuit of claim 1 wherein the power device has a first terminal, a second terminal, and a control terminal, and wherein the drive regulation circuit further comprises: the first error amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the first error amplifying circuit is coupled with the first end of the first current sampling resistor, the second end of the first current sampling resistor is coupled with the second power supply end, the second input end of the first error amplifying circuit is coupled with the first reference signal, and the output end of the first error amplifying circuit is coupled with the control end of the power device.

5. The power supply circuit of claim 1 wherein the charge control circuit comprises a current limiting transistor having a body diode with an anode coupled to the second power supply terminal and a cathode coupled to the capacitive device.

6. The power supply circuit of claim 1 wherein the capacitive device has a first terminal and a second terminal, the first terminal of the capacitive device being coupled to a first power supply terminal, the charge control circuit comprising:

a current-limiting transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the current-limiting transistor is coupled to the second terminal of the capacitor device; and

the second error amplifying circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the second error amplifying circuit is coupled with the first end of the second current sampling resistor, the second end of the second current sampling resistor is coupled with the second power supply end, the second input end of the second error amplifying circuit is coupled with the second reference signal, and the output end of the second error amplifying circuit is coupled with the control end of the current limiting transistor.

7. The power supply circuit of claim 6 wherein the saddle shaped waveform signal generating circuit has an input coupled to the first terminal of the current limiting transistor or to either of the load terminals and an output coupled to the second input of the second error amplifying circuit.

8. The power supply circuit of claim 7 wherein the saddle shaped waveform signal generating circuit includes a subtracting circuit having a positive input coupled to a reference signal, a negative input coupled to a first terminal of the current limiting transistor or to either of the load, and an output providing the second reference signal.

9. The power supply circuit of claim 6 wherein the current limiting transistor comprises an N-type metal oxide semiconductor field effect transistor, a source of the current limiting transistor is coupled to the capacitive device, and a drain of the current limiting transistor is coupled to the second current sampling resistor.

10. The power supply circuit of claim 9 wherein the power device comprises an N-type metal oxide semiconductor field effect transistor, the source of the power device is coupled to the first current sampling resistor, and the drain of the power device is coupled to the load.

11. A circuit module for powering a load, comprising a supply circuit as claimed in any one of claims 1 to 10, a load, a capacitor device and a rectifier circuit, wherein the rectifier circuit has an input, a first output and a second output, wherein the input of the rectifier circuit receives mains alternating current or is coupled to a dimmer, the first output of the rectifier circuit constituting said first supply terminal and the second output of the rectifier circuit constituting said second supply terminal.

Images