CN212965295U - DMD chip quality detection system - Google Patents
DMD chip quality detection system Download PDFInfo
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- CN212965295U CN212965295U CN202021761348.XU CN202021761348U CN212965295U CN 212965295 U CN212965295 U CN 212965295U CN 202021761348 U CN202021761348 U CN 202021761348U CN 212965295 U CN212965295 U CN 212965295U
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- 238000001514 detection method Methods 0.000 title claims abstract description 32
- 230000003321 amplification Effects 0.000 claims abstract description 17
- 238000006243 chemical reaction Methods 0.000 claims abstract description 17
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 17
- 238000012545 processing Methods 0.000 claims abstract description 12
- 230000007306 turnover Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 3
- 230000000007 visual effect Effects 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
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- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010191 image analysis Methods 0.000 description 1
- 238000012372 quality testing Methods 0.000 description 1
- 238000012031 short term test Methods 0.000 description 1
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Abstract
The utility model discloses a DMD chip quality detection system, which comprises a logic control chip, a DLP control chip and a DMD chip to be detected which are connected in sequence; the power interface of the DMD chip to be detected is also provided with a current detection module, the current detection module is used for collecting current on the DMD chip after the micro-mirror is turned over and is also connected with a current processing module; the current processing module comprises an I/V conversion module, a subtraction circuit module and a signal amplification module which are connected in sequence; the I/V conversion module converts the current into a voltage signal, the voltage difference value is obtained through the subtraction circuit module, an amplified signal is output after the signal amplification module, and the amplified signal is transmitted to the logic control chip through the A/D conversion module; the logic control chip makes a judgment and prompts a worker; the system can realize the rapid detection of the DMD chip and has the advantages of low cost and high efficiency.
Description
Technical Field
The utility model relates to a quality testing field, concretely relates to DMD chip quality detecting system.
Background
The DLP digital projection technology is increasingly widely applied in the fields of display projection, smart home and industry due to the excellent contrast, accurate light control capability and wider spectrum support, a DMD chip is used as a core device of the DLP digital projection technology, a mirror surface of the DMD digital projection technology is composed of millions and millions of micro-reflective mirror surface arrays (micro mirrors), and each micro mirror (representing 1 bit of a bitmap) works independently; in the actual use process, if the micro-mirror on the DMD chip is damaged, the final projection effect and the product performance can be directly influenced; therefore, the quality and the working performance of the DMD chip need to be periodically detected, and the existing detection method includes: the manual observation and detection and the image visual detection are carried out, the former increases the labor cost and is easy to miss detection, and the latter needs a camera to acquire images and complicated image analysis, so that the cost is high and the time consumption is long.
Disclosure of Invention
In order to solve the technical problem, the utility model provides a DMD chip quality detecting system can realize the short-term test of DMD chip, has with low costs, efficient advantage.
Therefore, the technical scheme of the utility model is as follows:
a DMD chip quality detection system comprises a logic control chip, a DLP control chip and a DMD chip to be detected which are connected in sequence, wherein the DMD chip to be detected is installed on a chip connector;
the logic control chip is used for sending a picture projection instruction to the DLP control chip according to a preset image; the DLP control chip controls the micro mirror on the DMD chip to be detected to turn over according to the projection instruction;
the power interface of the DMD chip to be detected is also provided with a current detection module, the current detection module is used for collecting current on the DMD chip after the micro-mirror is turned over and is also connected with a current processing module;
the current processing module comprises an I/V conversion module, a subtraction circuit module and a signal amplification module which are connected in sequence;
the I/V conversion module converts the acquired current into a voltage signal, the voltage signal is subtracted from a standard voltage signal through the subtraction circuit module to obtain a voltage difference value, the voltage difference value outputs an amplified signal after passing through the signal amplification module, and the amplified signal is transmitted to the logic control chip through the A/D conversion module; the standard voltage signal is a voltage value corresponding to a normal DMD chip displaying a preset image;
and the logic control chip is used for triggering an audible and visual alarm device to prompt a worker if the digital quantity amplification signal exceeds a pre-stored allowable value.
Preferably, the current processing module further comprises a low pass filter connected between the current detection module and the I/V conversion module.
Further, the logic control chip is an FPGA chip or an ARM chip.
Further, the signal amplification module comprises a linear amplifier.
The utility model discloses the structure is through setting up current detection module, current processing module, and the control DMD chip that awaits measuring's electric current changes, and then feeds back whether this chip has the quality problems, and this scheme easily realizes, measurement of efficiency is high.
Drawings
FIG. 1 is a block diagram of a detection system in accordance with an embodiment.
Detailed Description
The technical solution of the present invention will be described in detail with reference to the accompanying drawings and the detailed description.
A DMD chip quality detection system comprises a logic control chip, a DLP control chip and a DMD chip to be detected which are connected in sequence, wherein the DMD chip to be detected is installed on a chip connector;
the logic control chip is used for sending a picture projection instruction to the DLP control chip according to a preset image; the DLP control chip controls the micro mirror on the DMD chip to be detected to turn over according to the projection instruction;
the power interface of the DMD chip to be detected is also provided with a current detection module, the current detection module is used for collecting current on the DMD chip after the micro-mirror is turned over and is also connected with a current processing module;
the current processing module comprises an I/V conversion module, a subtraction circuit module and a signal amplification module which are connected in sequence;
the I/V conversion module converts the acquired current into a voltage signal, the voltage signal is subtracted from the standard voltage signal through the subtraction circuit module to obtain a voltage difference value, the voltage difference value outputs an amplified signal after passing through the signal amplification module, and the amplified signal is transmitted to the logic control chip through the A/D conversion module; the standard voltage signal is a voltage value corresponding to a normal DMD chip displaying a preset image;
and the logic control chip amplifies whether the signal exceeds a pre-stored allowable value according to the digital quantity, and if so, triggers the sound and light alarm device to prompt a worker.
As an embodiment of the present invention, the current processing module further includes a low pass filter connected between the current detection module and the I/V conversion module.
The logic control chip is an FPGA chip or an ARM chip, and in the embodiment, the logic control chip is an FPGA chip; the signal amplification module comprises a linear amplifier.
In the specific application:
firstly, storing a voltage value (standard voltage signal) corresponding to a normally-operated DMD displaying a preset image in a subtraction circuit module, and storing an error allowable value in a logic control chip;
the DMD power line interface is connected with a current detection module, detected actual measurement current (capable of being collected for multiple averaging) is filtered by a low-pass filter, noise is filtered by an I/V conversion circuit, the collected current is converted into a voltage signal, the voltage signal is subtracted by a subtraction circuit module and a standard voltage signal to obtain a voltage difference value, the voltage difference value is output to an amplification signal after passing through a signal amplification module, and the amplification signal is converted into a digital signal by an AD conversion module and transmitted to a logic control chip;
and the logic control chip judges whether the DMD chip to be detected has quality problems or not according to whether the digital quantity amplification signal exceeds a pre-stored allowable value or not.
When judging that the quality problem exists in the DMD chip, gradually reducing the detection range by adopting a dichotomy until finding a micromirror with a wrong turnover;
specifically, the preset images are multiple, and sequentially are: full bright image, half bright image, 1/4 bright image … …, logic control chip according to the order of throwing the picture, send the instruction of throwing the picture in proper order, control the whole board DMD at first and totally bright, if there is a problem; controlling half of the DMD chip to be fully bright, subtracting the voltage of the DMD chip from the standard voltage signal of the normal DMD chip when half of the micromirrors are bright, judging whether the voltage of the DMD chip exceeds an allowable value or not, if so, controlling 1/2 in the currently bright half of the DMD chip to be fully bright, not turning over other parts of micromirrors, and if not, controlling the other half of the whole DMD chip to be fully bright; … …
And repeating the judgment by gradually reducing the detection range until the micro mirror with the wrong turnover is found.
A worker can update and replace the DMD chip with quality problem and install another DMD chip to be tested on the chip connector; the above process is repeated for a newly replaced DMD chip.
The scheme can realize the rapid quality detection of the DMD chip, find the defect position and adapt to the link of chip quality detection.
Claims (4)
1. A DMD chip quality detection system comprises a logic control chip, a DLP control chip and a DMD chip to be detected which are connected in sequence, wherein the DMD chip to be detected is installed on a chip connector;
the logic control chip is used for sending a picture projection instruction to the DLP control chip according to a preset image; the DLP control chip controls the micro mirror on the DMD chip to be detected to turn over according to the projection instruction; the method is characterized in that:
the power interface of the DMD chip to be detected is also provided with a current detection module, the current detection module is used for collecting current on the DMD chip after the micro-mirror is turned over and is also connected with a current processing module;
the current processing module comprises an I/V conversion module, a subtraction circuit module and a signal amplification module which are connected in sequence;
the I/V conversion module converts the acquired current into a voltage signal, the voltage signal is subtracted from a standard voltage signal through the subtraction circuit module to obtain a voltage difference value, the voltage difference value outputs an amplified signal after passing through the signal amplification module, and the amplified signal is transmitted to the logic control chip through the A/D conversion module; the standard voltage signal is a voltage value corresponding to a normal DMD chip displaying a preset image;
and the logic control chip is used for triggering an audible and visual alarm device to prompt a worker if the digital quantity amplification signal exceeds a pre-stored allowable value.
2. The DMD chip quality detection system of claim 1, wherein: the current processing module further comprises a low pass filter connected between the current detection module and the I/V conversion module.
3. The DMD chip quality detection system of claim 1, wherein: the logic control chip is an FPGA chip or an ARM chip.
4. The DMD chip quality detection system of claim 1, wherein: the signal amplification module comprises a linear amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021761348.XU CN212965295U (en) | 2020-08-21 | 2020-08-21 | DMD chip quality detection system |
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| CN202021761348.XU CN212965295U (en) | 2020-08-21 | 2020-08-21 | DMD chip quality detection system |
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| CN212965295U true CN212965295U (en) | 2021-04-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116430213A (en) * | 2021-12-31 | 2023-07-14 | 芯海科技（深圳）股份有限公司 | Signal detection circuit, signal detection method, integrated circuit, detection device and electronic equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116430213A (en) * | 2021-12-31 | 2023-07-14 | 芯海科技（深圳）股份有限公司 | Signal detection circuit, signal detection method, integrated circuit, detection device and electronic equipment |
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Address after: Room 495, building 3, 1197 Bin'an Road, Binjiang District, Hangzhou City, Zhejiang Province 310051 Patentee after: Yi Si Si (Hangzhou) Technology Co.,Ltd. Address before: Room 495, building 3, 1197 Bin'an Road, Binjiang District, Hangzhou City, Zhejiang Province 310051 Patentee before: ISVISION (HANGZHOU) TECHNOLOGY Co.,Ltd. |
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