CN212907067U

CN212907067U - Voice signal noise reduction device

Info

Publication number: CN212907067U
Application number: CN202021460757.6U
Authority: CN
Inventors: 杨建峰; 杜勇
Original assignee: Sichuan Technology and Business University
Current assignee: Sichuan Technology and Business University
Priority date: 2020-07-22
Filing date: 2020-07-22
Publication date: 2021-04-06
Anticipated expiration: 2030-07-22

Abstract

The utility model discloses a speech signal noise reduction device relates to the technical field of the pronunciation noise reduction, the utility model discloses a FPGA unit, WM8978 audio codec and LCD display, the FPGA unit includes WM8978 module, noise interference module, FIR filter module, FFT module, PLL phase-locked loop module and LCD module, WM8978 module and WM8978 audio codec electricity are connected, WM8978 module and noise interference module electricity are connected, noise interference module and FIR filter module electricity are connected, FIR filter module and FFT module electricity are connected, FFT module and LCD module electricity are connected, LCD module and LCD display electricity are connected, WM8978 audio codec's output electricity is connected with the speaker, and the input electricity is connected with cell-phone or microphone; the utility model has the advantages of the processing speed is fast and the CPU time slice occupies less.

Description

Voice signal noise reduction device

Technical Field

The utility model relates to a technical field of making an uproar falls in pronunciation, more specifically relates to a device of making an uproar falls in speech signal.

Background

With the development of society, speech signal processing technologies such as speech noise reduction, speech recognition, speech synthesis, and human voice identification are rapidly developed, wherein the speech noise reduction mainly removes noise in a speech signal through a noise reduction algorithm.

In the prior art, mobile phones such as Huawei C8800 and Samsung i9100 based on an ARM platform have good voice noise reduction function, but the noise reduction algorithm is realized on the ARM platform with serial calculation, on one hand, a large number of time slices of a CPU are required to be occupied, and on the other hand, only data streams with low sampling rate can be processed; the dedicated DSP voice chip can also implement voice noise reduction, but its real-time performance is poor.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a: in order to solve the relatively poor problem of real-time that defect and DSP pronunciation chip that current ARM platform realization noise reduction algorithm exists exist, the utility model provides a device of making an uproar falls in speech signal.

The utility model discloses a realize above-mentioned purpose and specifically adopt following technical scheme:

the utility model provides a voice signal noise reduction device, its characterized in that, includes FPGA unit, WM8978 audio frequency codec and LCD display, the FPGA unit includes WM8978 module, noise interference module, FIR filter module, FFT module, PLL phase-locked loop module and LCD module, WM8978 module and WM8978 audio frequency codec electricity are connected, WM8978 module and noise interference module electricity are connected, noise interference module and FIR filter module electricity are connected, FIR filter module and FFT module electricity are connected, FFT module and LCD module electricity are connected, LCD module and LCD display electricity are connected, WM8978 audio frequency codec's output electricity is connected with the speaker, and the input electricity is connected with cell-phone or microphone, and is specific, and PLL phase-locked loop module is used for producing the clock signal that all modules of system need.

Furthermore, the WM8978 module is electrically connected with the FFT module, and a key is arranged on a connecting line of the WM8978 module and the FFT module.

The utility model has the advantages as follows:

1. the utility model discloses a WM8978 audio codec encodes the analog signal that has noise interference, later input FPGA unit through WM8978 module, later add the noise processing through the noise interference module, later fall the noise processing through FIR filter module, the noise interference signal of filtering high frequency channel, keep the effective speech signal of low frequency channel, later carry out FFT fast Fourier transform to effective speech signal through the FFT module, obtain effective speech signal's time domain waveform, show its frequency spectrum through the LCD display, WM audio codec decodes effective speech signal, and output the speaker, play effective speech signal through the speaker;

2. the utility model discloses can fall the noise processing to outside voice signals such as normal people's speech sound and music file, have that the processing speed is fast and CPU time slice occupies advantages such as few.

Drawings

FIG. 1 is a schematic block diagram of the present invention;

fig. 2 is a circuit connection diagram of a WM8978 audio codec.

Detailed Description

Example 1

As shown in fig. 1 to 2, the present embodiment provides a speech signal noise reduction device, which includes an FPGA unit, a WM 1 audio codec and an LCD display, wherein the FPGA unit includes a WM 1 module, a noise interference module, a FIR filter module, an FFT module, a PLL phase-locked loop module and an LCD module, the WM 1 module is electrically connected to the WM 1 audio codec, the WM 1 module is electrically connected to the noise interference module, the noise interference module is electrically connected to the FIR filter module, the FIR filter module is electrically connected to the FFT module, the FFT module is electrically connected to the LCD module, the LCD module is electrically connected to the LCD display, the WM 1 audio codec has its LIP, LIN, RIP and RIN pins electrically connected to a microphone for inputting audio, ROUT1 and LOUT1 pins are electrically connected to an audio line, ut2 and LOUT2 pins are electrically connected to a speaker for playing audio, and is used for configuring an audio codec chip register and working timing register through I2C (c _ IIC _ I _ c _ I _ And data interaction is carried out with the FPGA through an I2S bus (pins 7-11).

The working principle is as follows: encode the analog signal who has noise interference through WM8978 audio codec, later input FPGA unit through WM8978 module, later add the processing of making an uproar through the noise interference module, later fall the processing of making an uproar through FIR filter module, the noise interference signal of filtering high-band, the effective speech signal of reservation low-band, later carry out FFT fast Fourier transform to effective speech signal through the FFT module, obtain effective speech signal's time domain waveform, show its frequency spectrum through the LCD display, WM audio codec decodes effective speech signal, and output the speaker, play effective speech signal through the speaker.

Example 2

As shown in fig. 1 to 2, this embodiment is further improved on the basis of embodiment 1, specifically, the WM8978 module is electrically connected to the FFT module, and a key is arranged on a connection line between the WM8978 module and the FFT module, so that the FPGA can be stopped from performing noise reduction processing on the input audio signal by pressing the key, and a noise-doped signal is output.

The device is adopted to reduce the noise of the 100KHz sine wave plus noise waveform and the Gaussian white noise plus noise waveform, and the noise reduction effect of the noise reduction device is good according to the waveform after noise reduction.

Claims

1. The utility model provides a voice signal noise reduction device, its characterized in that, includes FPGA unit, WM8978 audio frequency codec and LCD display, the FPGA unit includes WM8978 module, noise interference module, FIR filter module, FFT module, PLL phase-locked loop module and LCD module, WM8978 module and WM8978 audio frequency codec electricity are connected, WM8978 module and noise interference module electricity are connected, noise interference module and FIR filter module electricity are connected, FIR filter module and FFT module electricity are connected, FFT module and LCD module electricity are connected, LCD module and LCD display electricity are connected, WM8978 audio frequency codec's output electricity is connected with the speaker, and the input electricity is connected with cell-phone or microphone.

2. The speech signal noise reduction device according to claim 1, wherein the WM8978 module and the FFT module are electrically connected, and a button is provided on a connection line between the WM8978 module and the FFT module.