CN212873158U - Display panel and display device - Google Patents

Abstract

The application discloses display panel and display device, display panel divide into display area and non-display area, non-display area is located the display area is peripheral, display panel includes first base plate, first base plate includes: the first switches are formed in the display area and are arranged in one-to-one correspondence with the pixels; the active layer of the first switch comprises a lower active layer, a middle active layer and an upper active layer which are sequentially stacked, wherein the middle active layer is made of crystallized indium gallium zinc oxide, and the upper active layer and the lower active layer are made of indium gallium zinc oxide. The middle active layer of the three-layer structure of the first switch is made of a crystallized indium gallium zinc oxide material, so that the electron mobility of the first switch is improved, the leakage current is reduced, and the display effect of the display panel is improved.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and a display device.

Background

Thin Film Transistor liquid crystal display panels (TFT-LCDs) have been rapidly developed and widely used in recent years. As for TFT-LCD display panels in mainstream market, the TFT-LCD display panels generally include an array substrate and a color film substrate, a thin film transistor is formed on the array substrate, the thin film transistor controls the on/off of a pixel electrode, and when the thin film transistor is turned on, the pixel electrode generates a voltage to deflect liquid crystal molecules and display a picture; active layer materials of the thin film transistor are classified into an amorphous Silicon thin film transistor, an LTPS (Low-temperature polysilicon) thin film transistor, and an oxide active layer thin film transistor.

The pixel switches in the display area of some display panels have the problem of large leakage current, which affects the performance of the switches, and thus the opening or closing of the pixels is affected, and further the display effect of the display panels is affected.

SUMMERY OF THE UTILITY MODEL

The application aims to provide a display panel and a display device, and the problem of leakage current is solved.

The application discloses display panel divides into display area and non-display area, non-display area is located the display area is peripheral, display panel includes first base plate, first base plate includes: the display device comprises a plurality of pixels arranged in a display area, first switches formed in the display area and arranged in one-to-one correspondence with the pixels; the first switch comprises a first active layer, the first active layer comprises a lower active layer, a middle active layer and an upper active layer which are sequentially stacked, the middle active layer is made of crystallized indium gallium zinc oxide, and the upper active layer and the lower active layer are made of indium gallium zinc oxide.

Optionally, the first switch includes a first gate layer, a first interlayer dielectric layer, a first active layer, a first metal layer, a first protective layer, a first planarization layer, and a transparent conductive layer; the non-display area is provided with a second switch, and the second switch comprises a buffer layer, a second active layer, a grid electrode insulating layer, a second grid electrode layer, a second interlayer dielectric layer, a second metal layer, a second protective layer and a second flat layer; wherein the first gate layer and the second gate layer are formed by the same process; the first interlayer dielectric layer and the second interlayer dielectric layer are formed through the same process; the first metal layer and the second metal layer are formed through the same process; the first protective layer and the second protective layer are formed through the same process; the first and second planarization layers are formed by the same process.

Optionally, the second active layer is made of a low-temperature polysilicon material.

Optionally, the second active layer includes an intrinsic layer, two first doped layers symmetrically disposed on two sides of the intrinsic layer, and the first doped layers are connected to the intrinsic layer; the two second doping layers are symmetrically arranged on the outer sides of the first doping layers, and the second doping layers on the same side are connected with the first doping layers; the second metal layer comprises a second source electrode and a second drain electrode; the second source electrode is connected with the second doped layer on one side of the intrinsic layer through a through hole, and the second drain electrode is connected with the second doped layer on the other side of the intrinsic layer through a through hole.

Optionally, the first substrate further includes: a third switch formed on the display area, detecting the intensity of the light to be detected, and generating a photosensitive signal; a fourth switch is formed on the display area, is electrically connected with the third switch and reads a photosensitive signal generated by the third switch; the third switch comprises a third gate layer, a third interlayer dielectric layer, a third active layer, a third metal layer, a third protective layer and a third flat layer; the fourth switch comprises a first gate layer, a fourth interlayer dielectric layer, a fourth active layer, a fourth metal layer, a fourth protective layer and a fourth flat layer; wherein the third active layer and the fourth active layer are formed in the same layer as the active layer of the first switch.

Optionally, the third active layer is formed in the same layer as the first active layer, and is as thick as the first active layer; the third active layer is made of crystallized indium gallium zinc oxide.

Optionally, the fourth active layer and the first active layer are formed in the same process, the fourth active layer is configured to have a three-layer film structure, a lower film layer of the fourth active layer and the lower active layer are made of the same material, a middle film layer of the fourth active layer and the middle active layer are made of the same material, and an upper film layer of the fourth active layer and the upper active layer are made of the same material.

Optionally, the third gate layer and the fourth gate layer are formed on the same layer as the first gate layer.

The application also discloses a display panel divides into display area and non-display area, non-display area is located the display area is peripheral, display panel includes first base plate, first base plate includes: the display device comprises a plurality of pixels arranged in a display area, first switches formed in the display area and arranged in one-to-one correspondence with the pixels; the second switch is arranged in the non-display area and comprises a first grid layer, a first interlayer dielectric layer, a first active layer, a first metal layer, a first protective layer, a first flat layer and a transparent conductive layer; the second switch comprises a buffer layer, a second active layer, a grid electrode insulating layer, a second grid electrode layer, a second interlayer dielectric layer, a second metal layer, a second protective layer and a second flat layer; the second active layer is made of low-temperature polycrystalline silicon material; the second active layer comprises an intrinsic layer and two first doped layers symmetrically arranged on two sides of the intrinsic layer, and the first doped layers are connected with the intrinsic layer; the two second doping layers are symmetrically arranged on the outer sides of the first doping layers, and the second doping layers on the same side are connected with the first doping layers; the first doped layer is a lightly doped layer, the second doped layer is a heavily doped layer, and the second metal layer comprises a second source electrode and a second drain electrode; the second source electrode is connected with the second doped layer on one side of the intrinsic layer through a through hole, and the second drain electrode is connected with the second doped layer on the other side of the intrinsic layer through a through hole; the first active layer is provided with a lower active layer, a middle active layer and an upper active layer which are sequentially stacked, the middle active layer is made of crystallized indium gallium zinc oxide, and the upper active layer and the lower active layer are made of indium gallium zinc oxide.

The application also discloses a display device comprising the display panel.

As opposed to schemes that use amorphous silicon to make the pixel switches. The active layer of the first switch of the application adopts a three-layer structure, and specifically comprises an upper active layer and a lower active layer which are made of Indium Gallium Zinc Oxide (IGZO) and a middle active layer which adopts a crystal IGZO manufacturing process, and the active layer is arranged between the upper active layer and the lower active layer, so that the active layer of the first switch can ensure the electron transfer rate of the first switch, the generation of leakage current of the first switch can be effectively reduced, the IGZO material is effectively utilized, the opening and closing performance and the closing rate of the first switch of a pixel are greatly improved, and the display effect of a display panel is improved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:

fig. 1 is a schematic view of a display device according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a display area switch and a non-display area switch according to an embodiment of the present application;

FIG. 4 is a detailed schematic diagram of a non-display area switch according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a display area provided with three switches according to an embodiment of the present application;

FIG. 6 is a schematic diagram of three switches in another display area according to an embodiment of the present application;

FIG. 7 is a schematic diagram illustrating connection of a third switch and a fourth switch on a display panel according to an embodiment of the present disclosure;

fig. 8 is a schematic connection diagram of the first switch, the third switch, and the fourth switch according to an embodiment of the present application.

100, a display panel; 110. a display area; 120. a non-display area; 130. a driving chip; 140. a data line; 200. a first substrate; 210. a pixel; 220. a first switch; 223a, a lower active layer; 223b, a middle active layer; 223c, an upper active layer; 221. a first gate layer; 222. a first interlayer dielectric layer; 223. a first active layer; 224. a first metal layer; 224a, a first source; 224b, a first drain electrode; 225. a first protective layer; 226. a first planar layer; 227. a transparent conductive layer; 230. a second switch; 231. a buffer layer; 232. a second active layer; 233. a gate insulating layer; 234. a second gate layer; 235. a second interlayer dielectric layer; 236. a second metal layer; 236a, a second source electrode; 236b, a second drain electrode; 237. a second protective layer; 238. a second planar layer; 232a, intrinsic layer; 232b, a first doping layer; 232c, a second doping layer; 240. a third switch; 241. a third gate layer; 242. a third interlayer dielectric layer; 243. a third active layer; 244. a third metal layer; 244a, a third source; 244b, a third drain; 245. a third protective layer; 246. a third flat layer; 250. a fourth switch; 251. a fourth gate layer; 252. a fourth interlayer dielectric layer; 253. a fourth active layer; 254. a fourth metal layer; 254a, a fourth source; 254b, a fourth drain electrode; 255. a fourth protective layer; 256. a fourth planar layer; 260. a light-shielding layer; 270. a substrate; 300. a display device.

Detailed Description

It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless otherwise specified, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "plurality" means two or more. The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or combinations thereof may be present or added.

Further, terms of orientation or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, are described based on the orientation or relative positional relationship shown in the drawings, are simply for convenience of description of the present application, and do not indicate that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present application.

Furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and may include, for example, fixed connections, removable connections, and integral connections; can be mechanically or electrically connected; either directly or indirectly through intervening media, or through both elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

The present application is described in detail below with reference to the figures and alternative embodiments.

Fig. 1 is a schematic view of a display device according to an embodiment of the present application; FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present application; FIG. 3 is a schematic diagram of a display area switch and a non-display area switch according to an embodiment of the present application; as shown in fig. 1 to 3, as an embodiment of the present application, a display device 300 is disclosed, the display device 300 includes a display panel 100, the display panel 100 is divided into a display area 110 and a non-display area 120, the non-display area 120 is located at a periphery of the display area 110, the display panel 100 includes a first substrate 200, and the first substrate 200 includes: a plurality of pixels disposed in the display area 110, and first switches 220 formed in the display area 110 and disposed in one-to-one correspondence with the pixels; the first switch 220 includes a first active layer 223, the first active layer 223 includes a lower active layer 223a, a middle active layer 223b and an upper active layer 223c, which are sequentially stacked, the middle active layer 223b is made of crystalline indium gallium zinc oxide, and the upper active layer 223c and the lower active layer 223a are made of indium gallium zinc oxide.

As opposed to schemes that use amorphous silicon to make the pixel switches. The active layer of the first switch 220 of the present application adopts a three-layer structure, and specifically includes an upper active layer 223c and a lower active layer 223a made of IGZO (Indium Gallium Zinc Oxide), and a middle active layer 223b made of a crystalline IGZO process, which are disposed between the upper active layer 223c and the lower active layer 223a, such an active layer of the first switch 220 can ensure an electron transfer rate of the first switch 220, and can also effectively reduce the generation of a leakage current of the first switch 220, and effectively utilize the IGZO material, so that the opening and closing performance and rate of the first switch 220 of the pixel 210 are greatly improved, thereby improving the display effect of the display panel 100. Since the c-IGZO has high electron mobility but also has a problem of large leakage current, the c-IGZO is formed at the middle active layer 223b of the active layer, the upper and lower IGZO can have a great limiting effect on the leakage current of the middle c-IGZO material, and the c-IGZO can improve the electron mobility of the first switch 220 and increase the switching rate of the first switch 220.

The scheme of this application has not only reduced the problem of leakage current, and the electron mobility of the active layer of very big improvement has still been simultaneously avoided some technologies to reduce the different circumstances of electron mobility that the leakage current brought simultaneously, has also avoided some technologies electron mobility to reach standard but the too big circumstances of leakage current again.

The structure of the three film layers may be irradiated by ELA (Excimer Laser annealing) to generate crystalline IGZO in the middle of the first active layer 223; the first active layer 223 of one layer of IGZO (Indium Gallium Zinc Oxide) is irradiated with ELA (Excimer Laser annealing) pairs, the Laser penetration depth is controlled to penetrate to the middle position of the first active layer 223, so that the middle active layer 223b of the first active layer 223 is converted into a crystalline IGZO (c-IGZO) material, and the upper and lower active layers are also maintained as IGZO materials, so as to change the crystallinity of the first active layer 223 material. Of course, the first active layer 223 may be formed in a stacked manner, and is not limited to this manner.

The first switch 220 includes a first gate layer 221, a first interlayer dielectric layer 222, a first active layer 223, a first metal layer 224, a first protection layer 225, a first flat layer 226, and a transparent conductive layer 227; the non-display area 120 is provided with a second switch 230, the display panel 100 includes a substrate 270, and the second switch 230 sequentially forms a buffer layer 231, a second active layer 232, a gate insulating layer 233, a second gate layer 234, a second interlayer dielectric layer 235, a second metal layer 236, a second protective layer 237 and a second flat layer 238 on the substrate 270; the first gate layer 221 and the second gate layer 234 are formed by the same process; the first interlayer dielectric layer 222 and the second interlayer dielectric layer 235 are formed by the same process; the first metal layer 224 and the second metal layer 236 are formed by the same process; the first protective layer 225 and the second protective layer 237 are formed by the same process; the first planarization layer 226 and the second planarization layer 238 are formed by the same process.

The first gate layer 221 and the second gate layer 234 are formed by the same process; the grid electrode on the same layer can reduce the arrangement of the insulating layer, thereby reducing the manufacturing process, saving the material and time and saving the cost; the first interlayer dielectric layer 222 and the second interlayer dielectric layer 235 are formed by the same process; the first protective layer 225 and the second protective layer 237 are formed by the same process; the first planarization layer 226 and the second planarization layer 238 are formed by the same process; the first metal layer 224 comprises a first source 224a and a first drain 224b which are arranged opposite to the channel, the second metal layer 236 comprises a second source 236a and a second drain 236b which are arranged opposite to the channel, the first metal layer 224 and the second metal layer 236 are formed by the same process, the source and the drain are made of metal, the same process is used for forming, materials are effectively saved, the error accumulation caused by multiple processes is reduced, the probability of etching errors is reduced, and the working performance of each switch is ensured.

The second active layer 232 is made of a low temperature polysilicon material. In the second switch 230 of the top gate structure, the material of the second active layer 232 is low-temperature polysilicon, the electron mobility is nearly ten times higher than that of the indium gallium zinc oxide material, and the switch of the low-temperature polysilicon can achieve the original purpose only by a small amount of low-temperature polysilicon, so that the area of the non-display area 120 can be reduced due to the small size of the switch of the low-temperature polysilicon, thereby meeting the requirement of a narrow frame in the market and enabling a user to have better operation experience; however, since the low-temperature polysilicon material has a high cost, it is not suitable for being used in the display region 110 in large quantities, and the low-cost indium gallium zinc oxide material has a performance enough to replace the low-temperature polysilicon material, so that the amount of the low-temperature polysilicon used in the non-display region 120 is small, and the cost is not greatly affected.

Specifically, the second active layer 232 is disposed on a different layer from the first active layer 223 in the non-display area 120, and is made of a different material, and the different material is disposed on the same layer, so that when the etching is not clean, the performance of the active layer material laid in the next process is affected, which is not beneficial to the performance of the first switch 220 and the second switch 230, and the layered arrangement can effectively avoid the effect caused by the unclean etching of the active layer, which is beneficial to the performance improvement of the first switch 220 and the second switch 230. Of course, on the premise of ensuring the performance, the second active layer 232 may be on the same layer as the first active layer 223, and the material of the second active layer 232 may also be the same as the material of the first active layer 223, which is not limited in this embodiment.

FIG. 4 is a detailed schematic diagram of a non-display area switch according to an embodiment of the present application; as shown in fig. 4, the second active layer 232 includes an intrinsic layer 232a, two first doped layers 232b symmetrically disposed at both sides of the intrinsic layer 232a, the first doped layers 232b being connected to the intrinsic layer 232 a; two second doping layers 232c symmetrically arranged outside the first doping layer 232b, wherein the second doping layers 232c are connected with the first doping layer 232 b; wherein the second source electrode 236a is connected to the second doped layer 232c of one side of the intrinsic layer 232a through a via hole, and the second drain electrode 236b is connected to the second doped layer 232c of the other side of the intrinsic layer 232a through a via hole.

The second active layer 232 includes an intrinsic layer 232a and two doped layers, the first doped layer 232b is a lightly doped layer, the second doped layer 232c is a heavily doped layer, the source and drain electrodes are connected to the second doped layer 232c at the edge through an interlayer insulating layer, the doped layer close to the intrinsic layer 232a is a low-concentration doped layer, and the high-concentration doped layer is arranged outside the low-concentration doped layer, so that the concentration of the doped layer is gradually changed, the carrier migration rate of the active layer can be increased, and the conductivity of the switch can be increased, meanwhile, the low-concentration doped layer can reduce electron hole pairs, reduce the leakage current of the second switch 230, and the second switch 230 serving as a GOA circuit of the non-display region 120 transmits signals to the circuit inside the display panel 100, reduces the leakage current of the second switch 230, can increase the performance of the display panel 100, and can also enhance the; of course, in this embodiment, the first doping layer 232b may be a heavily doped layer, the second doping layer 232c may be a lightly doped layer, and the doping material may be phosphorus or nitrogen, and is suitable.

Wherein a buffer layer 231 is disposed between the substrate 270 and the second active layer 232. Before forming the second active layer 232, there may be other impurities on the substrate 270, the second active layer 232 may be formed after being heavily doped, and if the buffer layer 231 is not disposed, the impurities may affect the doping of the second active layer 232, so that the doped effect is poor, and therefore, the buffer layer 231 forms an effective protection for the second active layer 232, and prevents other materials on the substrate 270 from affecting the performance of the second active layer 232.

FIG. 5 is a schematic diagram of a display area provided with three switches according to an embodiment of the present application; FIG. 6 is a schematic diagram of three switches in another display area according to an embodiment of the present application; as shown in fig. 5 and 6, the first substrate 200 further includes: a third switch 240 formed on the display region, detecting the intensity of light to be detected, and generating a light sensing signal; a fourth switch 250 formed on the display area and electrically connected to the third switch 240 for reading the light sensing signal generated by the third switch 240; the third switch 240 includes a third gate layer 241, a third interlayer dielectric layer 242, a third active layer 243, a third metal layer 244, a third protection layer 245 and a third planarization layer 246; the fourth switch 250 comprises a first gate layer 221, a fourth interlayer dielectric layer 252, a fourth active layer 253, a fourth metal layer 254, a fourth protection layer 255 and a fourth flat layer 256; wherein the third active layer 243 and the fourth active layer 253 are formed in the same layer as the active layer of the first switch 220. The third metal layer 244 includes a third source 244a and a third drain 244b disposed opposite to the channel, and the fourth metal layer 254 includes a fourth source 254a and a fourth drain 254b disposed opposite to the channel, the first substrate 200 of this embodiment may further include a third switch 240 and a fourth switch 250, the third switch 240 is a photo switch, the fourth switch 250 is a read switch, a photo signal is formed after the third switch 240 senses photo, the photo signal is output at the third drain 244b, the fourth source 254a receives the photo signal and analyzes the photo signal, and a readout signal is output at the fourth drain 254b, and the first active layer 223, the third active layer 243, and the fourth active layer 253 are formed through the same process, so that the material is reduced, and time is saved.

The third active layer 243 is made of a crystalline indium gallium zinc oxide material, and since the third switch 240 is a photosensitive switch, the third switch 240 needs to be sensitive to light and does not need to consider the influence of leakage current, the larger the transmission rate of electrons, the more favorable the sensitivity to light, and the more favorable the photosensitive property of the third switch 240, the third active layer 243 is made of the crystalline indium gallium zinc oxide, and the photosensitive property of the third switch 240 is improved.

The fourth active layer 253 and the first active layer 223 are formed in the same process, the fourth active layer 253 is configured as a three-layer film structure, a lower film layer of the fourth active layer 253 and the lower active layer 223a are made of the same material, a middle film layer of the fourth active layer 253 and the middle active layer 223b are made of the same material, and an upper film layer of the fourth active layer 253 and the upper active layer 223c are made of the same material. Since the fourth switch 250 reads the photosensitive signal output by the third switch 240, the fourth switch 250 has a certain requirement for leakage current, and the leakage current cannot be too large at the fourth switch 250, so that the three-layer structure of the fourth switch 250 is the same as that of the first switch 220, so that the electron mobility is increased, the generation of the leakage current is reduced, and the switching rate of the fourth switch 250 is increased.

The third grid and the fourth grid are formed in the same layer as the first grid and the second grid, and the grids in the same layer can reduce the arrangement of insulating layers, so that the manufacturing process is reduced, the material and the time are saved, and the cost is saved.

The display panel 100 further includes a light-shielding layer 260, where the light-shielding layer 260 is provided with a hollow portion corresponding to the active layer of the third switch 240, and since the third switch 240 is a photosensitive switch and needs to receive a light source to operate, the hollow portion is provided on the light-shielding layer 260 above the active layer of the third switch 240, and the photosensitive performance of the third switch 240 is ensured without interfering with the performance of other switches.

FIG. 7 is a schematic diagram illustrating connection of a third switch and a fourth switch on a display panel according to an embodiment of the present disclosure; fig. 8 is a schematic diagram illustrating connection of a first switch, a third switch and a fourth switch according to an embodiment of the present disclosure, referring to fig. 7 and 8, and referring to fig. 5 and 6, the display panel includes a driving chip 130 and a data line 140, the data line 140 is electrically connected to the driving chip 130, the second drain 236b is connected to the third source 244a, and the third drain 244b is connected to the driving chip 130 through the data line 140. In the present embodiment, the drain of the second switch 230 is connected to the source of the third switch 240, so that the light sensing current of the second switch 230 is transmitted to the third switch 240, the third switch 240 determines the light sensing current, and a readout signal is output from the third drain 244b and transmitted to the driving chip 130 through the data line 140, the driving chip 130 analyzes the readout signal of the third switch 240 and controls the display of the display panel, and according to the readout signal, the display panel can detect the intensity of the light to be detected, or according to the readout signal, the display panel can implement functions such as touch control and fingerprint identification.

The technical solution of the present application can be widely applied to various display panels, such as TN (Twisted Nematic) display panel, IPS (In-Plane Switching) display panel, VA (Vertical Alignment) display panel, MVA (Multi-Domain Vertical Alignment) display panel, and of course, other types of display panels, such as OLED (Organic Light-Emitting Diode) display panel, and the above solution can be applied thereto.

The foregoing is a more detailed description of the present application in connection with specific alternative embodiments, and the specific implementations of the present application are not to be considered limited to these descriptions. For those skilled in the art to which the present application pertains, several simple deductions or substitutions may be made without departing from the concept of the present application, and all should be considered as belonging to the protection scope of the present application.

Claims (10)

1. A display panel is divided into a display area and a non-display area, wherein the non-display area is located at the periphery of the display area, the display panel comprises a first substrate, and the first substrate comprises:

a plurality of pixels disposed in the display area;

the first switches are formed in the display area and are arranged in one-to-one correspondence with the pixels;

the first switch comprises a first active layer, the first active layer comprises a lower active layer, a middle active layer and an upper active layer which are sequentially stacked, the middle active layer is made of crystallized indium gallium zinc oxide, and the upper active layer and the lower active layer are made of indium gallium zinc oxide.

2. The display panel of claim 1, wherein the first switch comprises a first gate layer, a first interlayer dielectric layer, a first active layer, a first metal layer, a first protective layer, and a first planarization layer;

the non-display area is provided with a second switch, and the second switch comprises a buffer layer, a second active layer, a grid electrode insulating layer, a second grid electrode layer, a second interlayer dielectric layer, a second metal layer, a second protective layer and a second flat layer;

wherein the first gate layer and the second gate layer are formed by the same process; the first interlayer dielectric layer and the second interlayer dielectric layer are formed through the same process; the first metal layer and the second metal layer are formed through the same process; the first protective layer and the second protective layer are formed through the same process; the first and second planarization layers are formed by the same process.

3. The display panel of claim 2, wherein the second active layer is made of a low temperature polysilicon material.

4. The display panel of claim 3, wherein the second active layer comprises an intrinsic layer, two first doped layers symmetrically disposed on both sides of the intrinsic layer, the first doped layers being connected to the intrinsic layer; the two second doping layers are symmetrically arranged on the outer sides of the first doping layers, and the second doping layers on the same side are connected with the first doping layers;

the second metal layer comprises a second source electrode and a second drain electrode;

the second source electrode is connected with the second doped layer on one side of the intrinsic layer through a through hole, and the second drain electrode is connected with the second doped layer on the other side of the intrinsic layer through a through hole.

5. The display panel of claim 1, wherein the first substrate further comprises:

a third switch formed on the display area, detecting the intensity of the light to be detected, and generating a photosensitive signal; and

the fourth switch is formed on the display area, is electrically connected with the third switch and reads a photosensitive signal generated by the third switch;

the third switch comprises a third gate layer, a third interlayer dielectric layer, a third active layer, a third metal layer, a third protective layer and a third flat layer;

the fourth switch comprises a first gate layer, a fourth interlayer dielectric layer, a fourth active layer, a fourth metal layer, a fourth protective layer and a fourth flat layer;

wherein the third active layer and the fourth active layer are formed in the same layer as the active layer of the first switch.

6. The display panel of claim 5, wherein the third active layer is formed in the same layer as the first active layer and has a thickness equivalent to the first active layer; the third active layer is made of crystallized indium gallium zinc oxide.

7. The display panel according to claim 5, wherein the fourth active layer is formed in the same process as the first active layer, the fourth active layer is provided in a three-layer film structure, a lower film layer of the fourth active layer is made of the same material as the lower active layer, a middle film layer of the fourth active layer is made of the same material as the middle active layer, and an upper film layer of the fourth active layer is made of the same material as the upper active layer.

8. The display panel of claim 6, wherein the third gate layer and the fourth gate layer are formed in the same process as the first gate layer.

9. A display panel is divided into a display area and a non-display area, wherein the non-display area is located at the periphery of the display area, the display panel comprises a first substrate, and the first substrate comprises:

a plurality of pixels disposed in the display area,

the first switches are formed in the display area and are arranged in one-to-one correspondence with the pixels;

a second switch disposed in the non-display area,

the first switch comprises a first grid layer, a first interlayer dielectric layer, a first active layer, a first metal layer, a first protective layer, a first flat layer and a transparent conductive layer;

the second switch comprises a buffer layer, a second active layer, a grid electrode insulating layer, a second grid electrode layer, a second interlayer dielectric layer, a second metal layer, a second protective layer and a second flat layer;

the second active layer is made of low-temperature polycrystalline silicon material;

the second active layer comprises an intrinsic layer and two first doped layers symmetrically arranged on two sides of the intrinsic layer, and the first doped layers are connected with the intrinsic layer; the two second doping layers are symmetrically arranged on the outer sides of the first doping layers, and the second doping layers on the same side are connected with the first doping layers;

the second metal layer comprises a second source electrode and a second drain electrode;

the second source electrode is connected with the second doped layer on one side of the intrinsic layer through a through hole, and the second drain electrode is connected with the second doped layer on the other side of the intrinsic layer through a through hole;

the first active layer comprises a lower active layer, a middle active layer and an upper active layer which are sequentially stacked, the middle active layer is made of crystallized indium gallium zinc oxide, and the upper active layer and the lower active layer are made of indium gallium zinc oxide.

10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.

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