CN212809277U - 6 digit display accumulation timing counter - Google Patents

Abstract

The utility model relates to a 6-bit display accumulation timing counter, which comprises an input loop, a power supply loop, an accumulation timing counting loop and a display loop; the output end of the input loop is connected with the input end of the accumulation timing counting loop, the output end of the accumulation timing counting loop is connected with the input end of the display loop, and the power supply loop supplies power to the input loop and the accumulation timing counting loop; the input circuit comprises an active timing counting input circuit, a passive timing counting input circuit, an active reset input circuit and a passive reset input circuit; the utility model discloses the difference of collection input source, add up the time-recorder, add up the counter as an organic whole, can realize through the toggle switch who sets for correspondence adding up timing input source type and adding up switching, timing and the switching of count function between the input source type of count, the switching of adding up the timing time base, the switching of adding up the count frequency trades, has improved the commonality of electronic components and parts and circuit board, has made things convenient for user's use.

Description

6 digit display accumulation timing counter

Technical Field

The utility model relates to a time counter is counted in accumulation, especially a 6 bit display type time counter is counted in accumulation.

Background

The 6-bit display accumulation timing counter is mainly composed of a low-power-consumption integrated circuit, a built-in lithium battery, a 6-bit high-brightness LED display, a shell, a wire holder and the like, and has the characteristics of clear display, small size, no mechanical wear, long service life and the like.

The 6-bit accumulation timer is suitable for standard industrial timing, is widely applied to engineering machinery, engineering vehicles, agricultural machinery, generators, air compressors, water pumps, travelling cranes, elevators, light industrial clothing machinery, printing machinery and the like, and provides scientific basis for charging of actual working time of various accumulation meters and tracking and monitoring examination and maintenance periods of various precision instruments and equipment.

The 6-bit accumulation counter is widely applied to all occasions needing counting, such as yield counting, flow counting, automatic packaging machinery, rotating speed, length counting, punching frequency counting and the like, and can be used for secondary instruments to form a display instrument.

The existing 6-bit accumulation timing counter produced by each large manufacturer can be divided into a 6-bit active type accumulation timer, a 6-bit passive type accumulation timer, a 6-bit active type accumulation counter and a 6-bit passive type accumulation counter according to different input sources. Therefore, the redesign of the 6-bit cumulative timing counter has important practical significance and commercial value.

Disclosure of Invention

In order to solve the timing of different models and the required electronic components of count machine production and circuit board technical problem that can not be general, the utility model provides a counter when 6 bit display accumulation time, including input loop, power return circuit, display circuit, accumulation time count return circuit.

The output end of the input loop is connected with the input end of the accumulation timing counting loop, the output end of the accumulation timing counting loop is connected with the input end of the display loop, and the power supply loop supplies power to the input loop and the accumulation timing counting loop.

The input loop comprises a timing counting input loop and a resetting input loop; the timing and counting input circuit comprises a passive timing and counting input circuit and an active timing and counting input circuit, and the reset input circuit comprises a passive reset input circuit and an active reset input circuit; the toggle switch S1 can realize the switching between the passive timing counting input loop and the active timing counting input loop, and the toggle switch S2 can realize the switching between the passive input reset loop and the active input reset loop;

the power supply loop comprises a built-in lithium battery, and the power supply loop supplies power to all power utilization ends in other loops except for the active trigger signal in the input loop.

The active timing counting input circuit and the active reset input circuit trigger the accumulation timing counting circuit by AC or DC voltage signals to time, count or reset; the active timing counting input circuit and the active reset input circuit are triggered by passive switch signals such as a contact switch, a photoelectric switch, a mechanical switch and the like to accumulate the timing counting circuit for timing, counting or resetting.

The active timing counting input loop comprises a toggle switch S1, a resistor R1, a resistor R3, a resistor R4, a rectifier bridge D1, a resistor R7, a resistor R9, an electrolytic capacitor C1, an optocoupler T1, a resistor R11, a resistor R16, a resistor R17 and a capacitor C3; a resistor R1 is connected between a contact 2 and a contact 4 of a toggle switch S1, the contact 2 of the toggle switch S1 is connected with a resistor R3, the contact 4 of the toggle switch S1 is connected with a resistor R4, the other ends of the resistor R3 and the resistor R4 are respectively connected with two input ends of a rectifier bridge D1, the anode of the output end of the rectifier bridge D1 is connected with a resistor R7, the other end of the resistor R7 is connected with the anode of a resistor R9 and the anode of a capacitor C9, the resistor R9 is connected with the resistor R9 in series, the other end of the resistor R9 is connected with the anode input end of an optical coupler T9, the cathode of the output end of the rectifier bridge D9 is connected with the cathode of the capacitor C9 and the cathode input end of an optical coupler T9, one output end of the optical coupler T9 is simultaneously connected with the resistor R9, the anode of the capacitor C9 and the contact 1 of the switch K9, the other end of the resistor R9 is connected with the anode output end of, the contact 3 of the switch K4 is connected with the resistor R17, the other ends of the resistor R16 and the resistor R17 are respectively connected with the anode output end of the power circuit, and the contact 2 of the switch K4 and the contact 3 of the switch K4 are respectively output ends of the active timing counting input circuit.

The active reset input loop comprises a toggle switch S2, a resistor R2, a resistor R5, a resistor R6, a rectifier bridge D2, a resistor R8, a resistor R10, an electrolytic capacitor C2, an optocoupler T2, a resistor R12, a resistor R18 and a capacitor C4. The toggle switch S2 is a double-pole double-throw switch, a resistor R2 is connected between a contact 2 and a contact 4 of a toggle switch S2, the contact 2 of the toggle switch S2 is connected with a resistor R5, the contact 4 of the toggle switch S2 is connected with a resistor R6, the other ends of the resistor R5 and the resistor R6 are respectively connected with two input ends of a rectifier bridge D2, the anode of the output end of a rectifier bridge D2 is connected with a resistor R8 and a resistor R10 and then connected with the anode input end of an optical coupler T2, the cathode output end of the rectifier bridge D2 is connected with the cathode input end of the optical coupler T2, the anode of a capacitor C2 is connected between the resistor R2 and the resistor R2, the cathode of the capacitor C2 is connected with the cathode of the output end of the rectifier bridge D2, one output end of the optical coupler T2 is respectively connected with the anode of the resistor R2, the other end of the resistor R2 is connected with a VDD, the cathode output end of a power supply loop, and the cathode, the connection end of the resistor R14 and the resistor R18 is the output end of the active reset input loop.

The passive timing counting input loop comprises a toggle switch S1, a resistor R13, a resistor R15, a switch K4, a capacitor C3, a resistor R16 and a resistor R17, wherein the switch K4 is a single-pole double-throw switch, a contact 3 of the toggle switch S1 passes through a resistor R13 and then is connected with a contact 1 of a switch K4, a contact 2 of the switch K4 is connected with the resistor R16, a contact 3 of the switch K4 is connected with the resistor R17, the other ends of the resistor R16 and the resistor R17 are respectively connected with a positive electrode output end of a power circuit, a contact 6 of the toggle switch S1 is connected with the resistor R15, the other end of the resistor R15 is connected with a negative electrode output end of the power circuit, the capacitor C82 3 is connected between the contact 1 of the switch K4 and the negative electrode output end of the power circuit, and a contact 2 of the switch K4 and a contact 3.

The passive reset input circuit comprises a toggle switch S2, a resistor R14, a resistor R15, a resistor R18 and a capacitor C4, a contact 3 of the toggle switch S2 passes through the resistor R14 and the resistor R18 and then is connected with the anode output end of the power circuit, a contact 6 of the toggle switch S2 passes through the resistor R15 and then is connected with the cathode output end of the power circuit, the anode of the capacitor C4 is connected between the resistor R14 and the resistor R18, the cathode of the capacitor C4 is connected with the cathode output end of the power circuit, and the connecting end of the resistor R14 and the resistor R18 is the output end of the passive reset input circuit.

The accumulation timing counting loop comprises a singlechip IC1, an external clock circuit, a timing time base and counting frequency setting loop, the timing time base and counting frequency setting loop comprises a toggle switch K1, a toggle switch K2 and a toggle switch K3, a contact 1 of the toggle switch K1 is connected with a port P0.2 of the singlechip IC1, a contact 1 of the toggle switch K2 is connected with a port P0.3 of the singlechip IC1, a contact 1 of the toggle switch K3 is connected with a port P0.4 of the singlechip IC1, and a contact 2 of the toggle switch K1, the contact 2 of the toggle switch K2 and the contact 2 of the toggle switch K3 are connected with each other and then connected with the anode output end of the power circuit, the contact 3 of the toggle switch K1, the contact 3 of the toggle switch K2 and the contact 3 of the toggle switch K3 are connected with each other and then connected with the cathode output end of the power circuit, and the ports P0.1, P1.0 and P1.1 of the singlechip IC1 are the input ends of the accumulation timing counting circuit and connected with the input circuit. The accumulation timing counting loop can realize the setting of timing time base or counting frequency, running accumulation timing, accumulation counting and zero clearing work.

The external clock circuit comprises a main oscillation circuit and a secondary oscillation circuit, the main oscillation circuit comprises a resistor R19, and a resistor R19 is connected to an Xout port and an Xin port of the singlechip IC 1; the second-stage oscillating circuit comprises a resistor R20, a capacitor C5, a capacitor C6 and a crystal oscillator ZT1, the resistor R20 is connected to an XTout port of the single-chip microcomputer IC1, the other end of the resistor R20 is connected with an anode of the capacitor C6, an anode of the capacitor C5 is connected with an XTin port of the single-chip microcomputer IC1, the crystal oscillator ZT1 is connected between an anode of the capacitor C5 and an anode of the capacitor C6, and an anode of the capacitor C5 and a cathode of the capacitor C6 are connected with an output end of a cathode of the power supply loop;

the utility model discloses a count return circuit of adding up after the counter is gone up electricity comes the timing or the tally function of setting for the counter according to the value of singlechip port P0.1 and port P1.0 earlier, then sets up corresponding timing time base or count frequency according to different functions. The port P0.1 of the single chip microcomputer performs accumulated timing after receiving an external timing signal, the port P1.0 performs accumulated counting after receiving an external counting signal, and the port 1.1 performs reset after receiving an external reset signal.

And the display loop displays the timing or counting state to a user in real time through a 6-bit high-definition LCD. The display loop comprises a high-definition liquid crystal display LCD1, a high-definition liquid crystal display LCD1 is a 3-16-segment LCD, and C1-C4 of the high-definition liquid crystal display LCD1 are connected to COM 1-COM 4 ports of the single chip microcomputer IC1 and serve as a common end of the high-definition liquid crystal display LCD 1; S0-S11 of the high-definition liquid crystal display LCD1 are connected to SEG 0-SEG 11 ports of the single chip microcomputer IC1 and serve as scanning ends of the high-definition liquid crystal display LCD 1.

Advantageous effects

The utility model integrates the difference of the input sources, the accumulation timer and the accumulation counter into a whole, and can realize the switching between the accumulation timing input source type and the accumulation counting input source type, the switching between the timing and counting functions, the switching between the accumulation timing time base and the switching of the accumulation counting frequency by setting the corresponding toggle switch, thereby improving the universality of electronic components and circuit boards and facilitating the use of users; the power supply loop adopts a built-in replaceable button battery which can ensure normal operation for 5-7 years, so that a product can be ensured to operate reliably for a long time without an external power supply, and the utilization rate of a 6-bit display accumulation timing counter is increased; the internal timing and counting chip is realized by adopting a low-power-consumption single chip microcomputer, and peripheral components are few, so that the stability and reliability of the accumulated timing and accumulated counter are improved, the labor and material cost of manufacturers is saved, the production efficiency is improved, and the production and maintenance cost is reduced.

Drawings

Fig. 1 is a schematic block diagram of the present invention;

fig. 2 is a schematic circuit diagram of the present invention;

FIG. 3 is a schematic circuit diagram of the input circuit, the cumulative timing counting circuit, and the power circuit of the present invention;

fig. 4 is a schematic circuit diagram of a display circuit according to the present invention;

fig. 5 is a flow chart of the operation of the timing and counting section of the present invention.

Fig. 6 is a schematic diagram of the cumulative time counter according to the present invention.

Detailed Description

In order to make the technical solutions in the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments.

As shown in FIG. 1, the present invention provides a 6-bit cumulative timing counter with display, which comprises an input circuit, a display circuit, a power circuit and a cumulative timing circuit.

The output end of the input loop is connected with the input end of the accumulation timing counting loop, the output end of the accumulation timing counting loop is connected with the input end of the display loop, and the power supply loop supplies power to the input loop and the accumulation timing counting loop.

As shown in fig. 2 and fig. 3, the power supply circuit includes a built-in button cell B1, a 3V 950mA button cell is used, except for the active trigger signal in the input circuit, the power supply circuit supplies power to all the power consumption terminals in other circuits, no external power is needed, the button cell is replaceable, and the utilization rate of the 6-bit comprehensive accumulation timing counter is greatly increased.

The input loop is used for receiving an external active voltage trigger signal or a passive contact signal, and is converted into a level signal which can be recognized by the accumulation timing counting loop through processing, so that the timing, counting or resetting action of the accumulation timing counting loop is triggered.

The input loop comprises a timing counting input loop and a resetting input loop; the timing and counting input circuit comprises a passive timing and counting input circuit and an active timing and counting input circuit, and the reset input circuit comprises a passive reset input circuit and an active reset input circuit; the toggle switch S1 can realize the switching between the passive timing counting input loop and the active timing counting input loop, and the toggle switch S2 can realize the switching between the passive input reset loop and the active input reset loop;

as shown in fig. 1, when an active timing counting input circuit is used for inputting a trigger signal, a contact 1 and a contact 2 of a toggle switch S1 are connected, a contact 5 and a contact 4 of a toggle switch S1 are connected, the input signal is an alternating current or direct current voltage, the input voltage is subjected to voltage reduction through a resistor R1, a resistor R3 and a resistor R4 and then rectified by a full-wave rectifier bridge D1, and then subjected to secondary voltage reduction and filtering through a resistor R7, a resistor R9 and an electrolytic capacitor C1 to obtain a 5V direct current voltage to drive an optocoupler T1 to be switched on, an output end of the optocoupler T1, a resistor R11, a resistor R16 or a resistor R17 and a button battery B1 in a power supply circuit to form a circuit, a voltage of 2V or less is output as a low-level trigger signal for performing accumulated timing or accumulated counting on a single chip microcomputer IC1, and a capacitor C3 is;

when an active reset input circuit is used for inputting a reset trigger signal, a contact 1 and a contact 2 of a toggle switch S2 are connected, a contact 5 and a contact 4 of a toggle switch S2 are connected, input voltage is subjected to voltage reduction through a resistor R2, a resistor R5 and a resistor R6 and then rectified by a full-wave rectifier bridge D2, secondary voltage reduction and filtering are performed through a resistor R8, a resistor R10 and an electrolytic capacitor C2, 5V direct-current voltage is output to drive an optocoupler T2 to be connected, the output end of the optocoupler T2, the resistor R12, the resistor R18 and a button battery B1 in a power circuit form a circuit, voltage below 2V is output as a low-level trigger signal for resetting a singlechip, and the capacitor C4 is a filter capacitor for the reset input signal.

When a passive timing counting input circuit is used for inputting a trigger signal, a contact 1 and a contact 3 of a toggle switch S1 are connected, a contact 5 and a contact 6 of a toggle switch S1 are connected, the input signal is a passive switch such as a contact switch, a photoelectric switch and a mechanical switch, a circuit is formed by a resistor R13, a resistor R15, a resistor R16 or a resistor R17 and a button cell B1 in a power circuit, a voltage below 2V is output as a low-level trigger signal for carrying out accumulated timing or accumulated counting by a singlechip, and a capacitor C3 is a filter capacitor for accumulating the timing or accumulated counting input signal;

when a passive reset input circuit is adopted to input a reset trigger signal, when a contact 1 and a contact 3 of a toggle switch S2 are connected and a contact 5 and a contact 6 of a toggle switch S2 are connected, the reset input signal is a passive switch signal such as a contact switch, a photoelectric switch, a mechanical switch and the like, a circuit loop is formed by the reset input signal, a resistor R14, a resistor R15, a resistor R18 and a button cell B1 in a power circuit, voltage below 2V is output as a low-level trigger signal for resetting a single chip microcomputer, and a capacitor C4 is a filter capacitor of the reset signal.

The accumulation timing counting loop comprises a single chip microcomputer IC1, an external clock circuit, a timing time base and counting frequency setting loop, the single chip microcomputer IC1 adopts a single chip microcomputer with the model of S3P9228, the timing time base and counting frequency setting loop comprises a toggle switch K1, a toggle switch K2 and a toggle switch K3, and a resistor R19 is connected to an Xout port and an Xin port of the single chip microcomputer IC1 to form a main oscillation circuit. The resistor R20, the crystal oscillator ZT1, the capacitors C5 and C6 are connected to the XTout and XTin ports of the singlechip IC1 to form a secondary oscillation circuit. The ports P0.2-P0.4 of the singlechip IC1 are connected with an input loop, and a timing time base or counting frequency is set according to the read external different level combination. When the port P0.1 reads the external low level, the accumulation timing counting loop is triggered to count the time. When the port P1.0 reads the external low level, the accumulation timing and accumulation counting loop is triggered to count. When the port P1.1 reads the external low level, the accumulation timing and accumulation counting loop is triggered to clear.

Toggle switch K4 is used for switching the functions of the accumulation timing counter, when the toggle switch K4 is connected with contact 1 and contact 2, the input loop and the resistor R16 are connected to the P0.1 port of the singlechip IC1, and the port P0.1 receives the external input signal to trigger the timing function of the singlechip IC 1; when the contact 1 and the contact 3 of the toggle switch K4 are connected, the input loop and the resistor R17 are connected to the P1.0 port of the singlechip IC1, and the port P1.0 receives an external input signal to trigger the counting function of the singlechip IC 1.

The toggle switches K1-K3 are used for setting a timing time base and a counting frequency. The specific set-up parameters are given in the following table:

combining the contents of the table, when the contact 1 and the contact 3 of the toggle switch K4 are switched on and the states of the toggle switches K1-K3 are '000', the cumulative timing counting loop counts at the frequency of 20Hz, and when the states of the toggle switches K1-K3 are '001', the cumulative timing counting loop counts at the frequency of 300 Hz.

When the contact 1 and the contact 2 of the toggle switch K4 are switched on, and the state of the toggle switch K1-K3 is '000', the accumulative timing counting loop takes second as a time base to time, when the state of the toggle switch K1-K3 is '001', the accumulative timing counting loop takes 'hour and minute' as a time base to time, when the state of the toggle switch K1-K3 is '010', the accumulative timing counting loop takes '0.01 h' as a time base to time, when the state of the toggle switch K1-K3 is '011', the accumulative timing counting loop takes '0.1 h' as a time base to time, and when the state of the toggle switch K1-K3 is '100', the accumulative timing counting loop takes 'day and hour' as a time base to time.

As shown in fig. 2 and 4, the display circuit includes a 6-bit high-definition liquid crystal display LCD1, the LCD1 is a 3 × 16-segment LCD, 1/4 duty ratio and 1/3 bias ratio, and C1-C4 of the LCD1 are connected to COM 1-COM 4 ports of the single-chip IC1 and serve as a common terminal of the LCD 1. S0-S11 of the LCD1 are connected to SEG 0-SEG 11 ports of the singlechip IC1 and used as scanning ends of the LCD. And through the combination of COM and SEG, different LCD display segments are lightened, and the real-time working state of the 6-bit display accumulation timing counter is displayed to a user.

As shown in fig. 6, the utility model discloses a time counter still includes rectangle shell 1, and rectangle shell 1 is made by the ABS plastics, and input loop, power supply loop, display circuit and the count return circuit of adding up the timing all are located rectangle shell 1, have seted up first rectangle through-hole 2, second rectangle through-hole 3 and third rectangle through-hole 4 on rectangle shell 1's front panel, second rectangle through-hole 3 include two rectangle through-holes, third rectangle through-hole 4 includes 4 rectangle through-holes, high definition liquid crystal display LCD1 inlays in first rectangle through-hole 2, shows in real time that 6 are shown to add up current timing of time counter, count state. The toggle switch S1 and the toggle switch S2 are respectively located in two rectangular through holes of the second rectangular through hole 3, and the user can set the type of the input source. Toggle switches K1-K4 are respectively positioned in the 4 rectangular through holes of the third rectangular through hole 4, and a user can set a timing time base and a counting frequency.

The work flow of the accumulated timing and the accumulated counting of the singlechip IC1 is shown in FIG. 5.

The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations are also considered as the protection scope of the present invention.

Claims (7)

1. A6-bit display accumulation timing counter is characterized by comprising an input loop, a power supply loop, an accumulation timing counting loop and a display loop;

the output end of the input loop is connected with the input end of the accumulation timing counting loop, the output end of the accumulation timing counting loop is connected with the input end of the display loop, and the power supply loop supplies power to the input loop and the accumulation timing counting loop;

the input loop comprises a timing counting input loop and a resetting input loop;

the accumulation timing counting loop comprises a singlechip IC1, an external clock circuit, a timing time base and counting frequency setting loop, the timing time base and counting frequency setting loop comprises a toggle switch K1, a toggle switch K2 and a toggle switch K3, a contact 1 of the toggle switch K1 is connected with a port P0.2 of the singlechip IC1, a contact 1 of the toggle switch K2 is connected with a port P0.3 of the singlechip IC1, a contact 1 of the toggle switch K3 is connected with a port P0.4 of the singlechip IC1, a contact 2 of the toggle switch K1, a contact 2 of the toggle switch K2 and a contact 2 of the toggle switch K3 are connected with a positive electrode output end of the power circuit, a contact 3 of the toggle switch K1, a contact 3 of the toggle switch K2 and a contact 3 of the toggle switch K3 are connected with a negative electrode output end of the power circuit, ports P0.1, P1.0 and P1.1 of the IC1 are input ends of the accumulation timing counting loop, and the P1.0.1 of the singlechip IC1 is connected with the input end of the singlechip IC 390.1, the port P1.1 of the singlechip IC1 is connected with the input end of the reset input loop.

2. The 6-bit display accumulation timer counter of claim 1, wherein the timer count input circuit comprises an active timer count input circuit;

the active timing counting input loop comprises a toggle switch S1, a resistor R1, a resistor R3, a resistor R4, a rectifier bridge D1, a resistor R7, a resistor R9, an electrolytic capacitor C1, an optocoupler T1, a resistor R11, a resistor R16, a resistor R17 and a capacitor C3; a resistor R1 is connected between a contact 2 and a contact 4 of a toggle switch S1, the contact 2 of the toggle switch S1 is connected with a resistor R3, the contact 4 of the toggle switch S1 is connected with a resistor R4, the other ends of the resistor R3 and the resistor R4 are respectively connected with two input ends of a rectifier bridge D1, the anode of the output end of the rectifier bridge D1 is connected with a resistor R7, the other end of the resistor R7 is connected with the anode of a resistor R9 and the anode of a capacitor C9, the resistor R9 is connected with the resistor R9 in series, the other end of the resistor R9 is connected with the anode input end of an optical coupler T9, the cathode of the output end of the rectifier bridge D9 is connected with the cathode of the capacitor C9 and the cathode input end of an optical coupler T9, one output end of the optical coupler T9 is simultaneously connected with the resistor R9, the anode of the capacitor C9 and the contact 1 of the switch K9, the other end of the resistor R9 is connected with the anode output end of, the contact 3 of the switch K4 is connected with the resistor R17, the other ends of the resistor R16 and the resistor R17 are respectively connected with the anode output end of the power circuit, and the contact 2 of the switch K4 and the contact 3 of the switch K4 are respectively output ends of the active timing counting input circuit.

3. A 6-bit display accumulation timer counter according to claim 1 or 2, wherein the timer count input circuit further comprises a passive timer count input circuit;

the passive timing counting input loop comprises a toggle switch S1, a resistor R13, a resistor R15, a switch K4, a capacitor C3, a resistor R16 and a resistor R17, a contact 3 of the toggle switch S1 is connected with a contact 1 of a switch K4 after passing through the resistor R13, a contact 6 of the toggle switch S1 is connected with the resistor R15, the other end of the resistor R15 is connected with the negative electrode output end of a power supply loop, the capacitor C3 is connected between the contact 1 of the switch K4 and the negative electrode output end of the power supply loop, and a contact 2 of the switch K4 and the contact 3 of the switch K4 are output ends of the passive timing counting input loop respectively.

4. The 6-bit display accumulation timer counter of claim 1, wherein the reset input circuit comprises an active reset input circuit;

the active reset input loop comprises a toggle switch S2, a resistor R2, a resistor R5, a resistor R6, a rectifier bridge D2, a resistor R8, a resistor R10, an electrolytic capacitor C2, an optocoupler T2, a resistor R12, a resistor R18 and a capacitor C4, wherein the resistor R2 is connected between a contact 2 and a contact 4 of the toggle switch S2, the contact 2 of the toggle switch S2 is connected with the resistor R5, the contact 4 of the toggle switch S2 is connected with the resistor R6, the other ends of the resistor R5 and the resistor R6 are respectively connected with two input ends of the rectifier bridge D2, the positive electrode of the output end of the rectifier bridge D2 is connected with the resistor R8 and the positive electrode input end of the optocoupler T2 after being connected with the resistor R10, the negative electrode output end of the rectifier bridge D2 is connected with the negative electrode input end of the optocoupler T2, the positive electrode of the resistor C2 and the negative electrode of the rectifier bridge D2 are respectively connected with one resistor R2 and the positive electrode of the capacitor C2, the other end of the resistor R12 is connected with VDD, the other end of the resistor R18 is connected with the positive electrode output end of the power supply circuit, the negative electrode of the capacitor C4 is connected with the negative electrode output end of the power supply circuit, and the connecting end of the resistor R14 and the resistor R18 is the output end of the active reset input circuit.

5. The 6-bit display accumulation timer counter of claim 1 or 4, wherein the reset input circuit further comprises a passive reset input circuit;

the passive reset input circuit comprises a toggle switch S2, a resistor R14, a resistor R15, a resistor R18 and a capacitor C4, a contact 3 of the toggle switch S2 passes through the resistor R14 and the resistor R18 and then is connected with the anode output end of the power circuit, a contact 6 of the toggle switch S2 passes through the resistor R15 and then is connected with the cathode output end of the power circuit, the anode of the capacitor C4 is connected between the resistor R14 and the resistor R18, the cathode of the capacitor C4 is connected with the cathode output end of the power circuit, and the connecting end of the resistor R14 and the resistor R18 is the output end of the passive reset input circuit.

6. The 6-bit display accumulation timer counter according to claim 1, wherein the display circuit comprises a high-definition liquid crystal display LCD1, the high-definition liquid crystal display LCD1 is a 3 x 16 segment LCD, and C1-C4 of the high-definition liquid crystal display LCD1 are connected to COM 1-COM 4 ports of the singlechip IC1 and used as a common terminal of the high-definition liquid crystal display LCD 1; S0-S11 of the high-definition liquid crystal display LCD1 are connected to SEG 0-SEG 11 ports of the single chip microcomputer IC1 and serve as scanning ends of the high-definition liquid crystal display LCD 1.

7. The 6-bit display accumulation timer counter of claim 1, wherein the external clock circuit comprises a main oscillation circuit and a secondary oscillation circuit, the main oscillation circuit comprises a resistor R19, and the resistor R19 is connected to the Xout and Xin ports of the single-chip IC 1; the second-stage oscillating circuit comprises a resistor R20, a capacitor C5, a capacitor C6 and a crystal oscillator ZT1, the resistor R20 is connected to an XTout port of the single-chip microcomputer IC1, the other end of the resistor R20 is connected with an anode of the capacitor C6, an anode of the capacitor C5 is connected with an XTin port of the single-chip microcomputer IC1, the crystal oscillator ZT1 is connected between an anode of the capacitor C5 and an anode of the capacitor C6, and an anode of the capacitor C5 and a cathode of the capacitor C6 are connected with a negative electrode output end of the power supply circuit.

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