CN212726969U - Signal output device - Google Patents

Abstract

An embodiment of the present application provides a signal output apparatus, including: a control circuit; the digital-to-analog conversion output circuit comprises a digital-to-analog converter, and the digital-to-analog converter is connected with a first output pin of the control circuit; and the pulse output circuit is connected with the second output pin of the control circuit. According to the embodiment of the application, the analog signal and/or the pulse signal can be selected to be output according to the output requirements of different signal types, and the debugging or acceptance effect of the vibration detection equipment is improved.

Description

Signal output device

Technical Field

The present application relates to the field of signal generation technologies, and more particularly, to a signal output apparatus.

Background

As is well known, signal generators are commonly used to provide a signal source or excitation source to meet the needs of commissioning or acceptance work of vibration detection equipment, such as vibration testing and analysis equipment, vibration fault diagnosis equipment, and the like.

In practical applications, the vibration detection device needs to detect various types of vibrations, such as continuous vibration, pulse vibration, or a combination of the two types of vibrations. However, in the prior art, the signal type output by the signal generator is relatively single, and it is difficult to output the signal types corresponding to different vibration types for the vibration detection device, which results in poor debugging or acceptance effect for the vibration detection device.

SUMMERY OF THE UTILITY MODEL

An object of the embodiment of the present application is to provide a signal output device to solve the technical problem that the debugging or acceptance effect of a signal generator to a vibration detection device is poor in the prior art.

In order to achieve the purpose, the technical scheme adopted by the application is as follows: there is provided a signal output apparatus including: a control circuit; the digital-to-analog conversion output circuit comprises a digital-to-analog converter, and the digital-to-analog converter is connected with a first output pin of the control circuit; and the pulse output circuit is connected with the second output pin of the control circuit.

In the signal output device provided in the embodiment of the application, the digital-to-analog conversion output circuit and the pulse output circuit are respectively connected with the first output pin and the second output pin of the control circuit, and the digital-to-analog conversion output circuit can be controlled by the control circuit to output an analog signal and/or the pulse output circuit is controlled to output a pulse signal; and then can select to output analog signal and/or pulse signal according to the output needs of different signal types, improve the debugging or the effect of accepting vibration check out test set.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

Fig. 1 is a schematic structural diagram of a signal output apparatus according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram of a digital-to-analog converter and a connection structure thereof with a signal type switching circuit according to an embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of a switch portion in a signal type switching circuit according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a pulse output circuit according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a possible structure of a toggle switch according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another signal output apparatus according to an embodiment of the present disclosure;

fig. 7 is a second schematic structural diagram of a signal output apparatus according to an embodiment of the present application;

FIG. 8 is a diagram illustrating a possible structure of the CPU as the control circuit in the embodiment of the present application;

fig. 9 is a schematic structural diagram of an ac-dc conversion circuit in an embodiment of the present application.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, as used herein, refer to an orientation or positional relationship indicated in the drawings that is solely for the purpose of facilitating the description and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the present application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

As shown in fig. 1, a signal output apparatus provided in an embodiment of the present application includes: a control circuit 100; the digital-to-analog conversion output circuit 200, the digital-to-analog conversion output circuit 200 includes a digital-to-analog converter 210, and the digital-to-analog converter 210 is connected to a first output pin of the control circuit 100; a pulse output circuit 300, wherein the pulse output circuit 300 is connected to a second output pin of the control circuit 100.

The control circuit 100 may be a Central Processing Unit (CPU) or a Field Programmable Gate Array (FPGA), and the signal output apparatus according to the embodiment of the present invention will be described below mainly by taking the CPU as an example.

It is easily understood that the CPU may generate the signal generation instruction based on a received instruction transmitted from the upper computer, or by reading data in the memory. On this basis, in the present embodiment, the CPU can generate, for example, a first signal generation instruction for controlling output of an analog signal and/or a second signal generation instruction for controlling output of a pulse signal, according to actual needs. The first signal generation command may be transmitted to the digital-to-analog conversion output circuit 200 through a first output pin, and the second signal generation command may be transmitted to the pulse output circuit 300 through a second output pin.

For the digital-to-analog conversion output circuit 200, a digital-to-analog converter 210 may be included, and the digital-to-analog converter 210 may be, for example, a digital-to-analog conversion integrated chip (hereinafter, referred to as DAC chip) or the like. It is understood that the digital-to-analog converter 210 may generate an analog signal based on the received first signal generation instruction, and specifically, the analog signal may be at least one of a voltage signal, a current signal, and a charge signal. For the pulse output circuit 300, a pulse signal may be generated based on the received second signal generation instruction. The analog signal and the pulse signal can be used for debugging or acceptance of the vibration detection equipment.

In the signal output device provided in the embodiment of the application, the digital-to-analog conversion output circuit and the pulse output circuit are respectively connected with the first output pin and the second output pin of the control circuit, and the digital-to-analog conversion output circuit can be controlled by the control circuit to output an analog signal and/or the pulse output circuit is controlled to output a pulse signal; and then can select to output analog signal and/or pulse signal according to the output needs of different signal types, improve the debugging or the effect of accepting vibration check out test set.

Optionally, the digital-to-analog converter 210 is provided with a signal type switching circuit 220;

as shown in fig. 2 and fig. 3, the digital-to-analog converter 210 includes a voltage output pin Vout and a current output pin Iout, and the signal type switching circuit 220 includes a first switch KA1, a second switch KA2, and at least one first capacitor C1; the voltage output pin Vout is connected to a first terminal of the first switch KA1, the current output pin Iout is connected to a second terminal of the first switch KA1, a third terminal of the first switch KA1 is connected to a first terminal of the second switch KA2 and a first terminal of each first capacitor C1 of the at least one first capacitor C1, a second terminal of the second switch KA2 forms a first signal output terminal, a third terminal of the second switch KA2 is connected to a second terminal of each first capacitor C1 of the at least one first capacitor C1, and a third terminal of the second switch KA2 forms a second signal output terminal; the third end of the first switch KA1 is selected to be conducted to the first end of the first switch KA1 and the second end of the first switch KA1, and the first end of the second switch KA2 is selected to be conducted to the second end of the second switch KA2 and the third end of the second switch KA 2.

The first signal output terminal and the second signal output terminal can both be used for outputting analog signals, so that the two output terminals can be connected to the same connector, such as a neisseria-cornerman (BNC) terminal, and the BNC terminal is mainly used as an example for description below; the analog signals, such as current signals, voltage signals or charge signals, can be implemented by controlling the first switch KA1 and the second switch KA 2.

Specifically, when the first terminal of the first switch KA1 is conducted to the third terminal thereof, the voltage output pin Vout may be connected to the BNC terminal, and the voltage output pin Vout may output a voltage signal, and in this case, when the first terminal of the second switch KA2 is conducted to the second terminal thereof, the at least one first capacitor C1 is shorted, and the BNC terminal may directly output the voltage signal; when the first terminal and the third terminal of the second switch KA2 are turned on, the at least one first capacitor C1 is connected, and the voltage signal is connected to the BNC terminal through the first capacitor C1, and at this time, the BNC terminal can output the charge signal, specifically, one terminal of the first capacitor C1 is connected to the voltage output pin Vout, and the other terminal is connected to the BNC terminal, and the charges accumulated at the two terminals of the first capacitor C1 are the same, and the charge signal is output through the BNC terminal. In practical applications, when the number of the first capacitors C1 is plural, the plural first capacitors C1 may be connected in parallel; specifically, in practical application, capacitors are connected in parallel, the number of the capacitors is increased, the total capacitance value is increased, and according to a formula Q, the capacitor C is increased and the output of the corresponding charge Q is also increased when the voltage U is unchanged; in other words, as the number of parallel first capacitors C1 increases, the output of the charge signal increases accordingly.

When the second terminal of the first switch KA1 is conducted to the third terminal thereof, the current output pin Iout can be connected to the BNC terminal, and at this time, the first terminal of the second switch KA2 can be conducted to the second terminal thereof, and the BNC terminal outputs a current signal.

In the embodiment, through the arrangement of the first switch, the second switch and the first capacitor, the analog signal output by the digital-to-analog converter can be switched among several forms, namely a current signal, a voltage signal and a charge signal, so that the application range of the signal output device is effectively improved.

In one example, the first switch KA1 and the second switch KA2 may be relays, and for convenience of description, they are respectively referred to as a first relay and a second relay, and the first relay and the second relay may be components of the relay control circuit 600. A first end of the first switch KA1 can be marked as a normally closed position NC of the first relay, and correspondingly, a second end of the first switch KA1 can be marked as a normally open position NO of the first relay; the second end of the second switch can be marked as the normally open gear NO of the second relay, and the third end of the second switch can be marked as the normally closed gear NC of the second relay.

When the first relay is switched to a normally closed gear NC, the second relay can be switched to the normally closed gear NC or a normally open gear NO, and correspondingly output is a charge signal (a voltage output pin is connected to a BNC terminal through 2 first capacitors connected in parallel) or a voltage signal (the first capacitors are in short circuit, and the voltage output pin is directly connected to the BNC terminal); when the first relay is switched to the normal open gear NO, the second relay can be switched to the normal open gear NO at the same time, and at the moment, the current signal is output (the first capacitor is in short circuit, and the current output pin is directly connected to the BNC pin).

The first relay and the second relay may also be respectively connected to the third output pin DY1 and the fourth output pin DY2 of the control circuit 100, so as to control the working states of the first relay and the second relay through the control circuit 100.

Optionally, the digital-to-analog converter 210 further includes a bootstrap pin BOOST, and the signal type switching circuit 220 further includes a transistor switch Q1, a first resistor R1, a second resistor R2, and a second capacitor C2;

the bootstrap pin BOOST is connected to the first end of the transistor switch Q1, the current output pin Iout is connected to the control end of the transistor switch Q1, the first end of the first resistor R1, and the first end of the second capacitor C1, the second end of the first resistor R1 is connected to the second end of the transistor switch Q1 and the first end of the second resistor R2, the second end of the second resistor R2 is connected to the second end of the first switch KA1, and the second end of the second capacitor C2 is grounded.

In this embodiment, the transistor switch Q1, the first resistor R1, and the second capacitor C2 may jointly form a constant current source by connecting the transistor switch Q1 to the bootstrap pin BOOST, so that the output current flows through the transistor switch Q1, the power consumption of the digital-to-analog converter 210 is reduced, the stability of the chip is enhanced, and the second resistor R2 may form an output protection resistor.

Optionally, the second end of the second resistor may be grounded through a transient suppression TVS diode D1; further optionally, the signal type switching circuit 220 further includes an inductor L1, the voltage output pin Vout is connected to a first terminal of an inductor L1, and a second terminal of the inductor L1 is connected to a first terminal of a first switch KA 1; in addition, the first end of the inductor L1 is also connected to the Ccomp pin of the digital-to-analog converter 210 through a capacitor, and the second end of the inductor L1 is also connected to ground through the transient suppression TVS diode D2; the stability of the output voltage can be effectively maintained by connecting the first end of the inductor L1 to the Ccomp pin. In one possible embodiment, the model of the transient suppression TVS diode D1 and the transient suppression TVS diode D2 may be AMSH40 CA.

In one example, the digital-to-analog converter 210 described above may be an 12/16-bit digital-to-analog converter with a chip model AD5412, and the output current range may be set to 4-20mA, 0-20mA, or 0-24mA, and the voltage output may be configured to 0-5V, 0-10V, +/-5V, or + -10V.

Optionally, the digital-to-analog conversion output circuit 200 includes a plurality of digital-to-analog converters 210; the digital-to-analog converters 210 are connected in series, and the digital-to-analog converters 210 are connected in series between the first output pin MISO and the first input pin MOSI of the control circuit 100.

In this embodiment, a plurality of digital-to-analog converters 210 are arranged in series, and each digital-to-analog converter 210 can output a corresponding analog signal, so that multiple analog signals can be output simultaneously, and the detection requirements on a plurality of devices to be detected can be met simultaneously.

In one example, the digital-to-analog converters 210 are DAC chips and are 6 in number, and the control circuit 100 is a CPU. The 6 DAC chips are connected in a daisy chain mode, the SDIN pin of the 1 st DAC chip is connected to the MOSI pin of the CPU, the SDO pin of the 1 st DAC chip is connected to the SDIN pin of the 2 nd DAC chip, the SDO pin of the 2 nd DAC chip is connected to the SDIN pin of the 3 rd DAC chip, and correspondingly, the SDO pin of the 6 th DAC chip is connected to the MISO pin of the CPU. At the rising edge of the LATCH signal (corresponding to the LATCH pin of the DAC chip), digital-to-analog data conversion starts, and at the rising edge of the CLK signal (corresponding to the CLK pin of the DAC chip), data starts to be written and latched one by one to the input shift register corresponding to the DAC chip. The input shift register is 24 bits and includes 8-bit address bits and 16-bit data bits, and the address bytes control the operation of the various registers. In the process of writing data into the shift register, 1 CLK clock pulse is needed for writing 1-bit data, and each device needs 24 clock pulses, so if m devices are included in the daisy chain, the total clock pulse is 24 × m, the number of pulses needed in the present application is 24 × 6 ═ 144, and when the address byte is 02, the DAC chip data can be read and stored at the MISO pin.

On the basis of the previous example, each DAC chip can be provided with a single +/-15V power supply filter circuit, so that power supply noise can be filtered out, and the stability of an output signal is improved. Each DAC chip may also be provided with a +5V voltage reference source to control the accuracy of the output signal of the DAC chip, for example, the +5V voltage reference source may include a chip ADR02 to achieve high accuracy (error ± 0.1%) output of the signal of the DAC chip.

Optionally, as shown in fig. 4, the pulse output circuit 300 includes an optical coupler U1 and a third resistor R3; the first end of the input side of the optical coupler U1 is connected with a power supply through the third resistor R3, the second end of the input side of the optical coupler U1 is connected with the second output pin PWM of the control circuit 100, the first end of the output side of the optical coupler U1 forms a third signal output end PWM OUT, and the second end of the output side of the optical coupler U1 is grounded.

In this embodiment, the control circuit can output the pulse signal through the mode of opto-coupler isolation, improves the quality of pulse signal.

Optionally, as shown in fig. 4 and 5, the pulse output circuit 300 further includes a toggle switch K1 and a fourth resistor R4;

the first end of the output side of the optical coupler U1 is also connected with the first end of the toggle switch K1 through the fourth resistor R4; the second end of toggle switch K1 is used for connecting the power, and the quantity of the second end of toggle switch K1 is a plurality of, the first end of toggle switch K1 alternative switch on to any one of a plurality of second ends of toggle switch K1, there is the difference in the voltage of the power that a plurality of second ends of toggle switch K1 correspond to and connect.

In this embodiment, the toggle switch has a plurality of second terminals, and there are at least two power supplies with different voltages connected to the second terminals, for example, one of the second terminals may be connected to a +5V power supply, and the other second terminal may be connected to a +12V power supply, etc. Through the adjustment of the toggle switch, the output pulse light signals can be switched among different amplitude values, and the application range of the pulse light signals is widened.

In one example, the CPU outputs a PWM signal (corresponding to the second signal generation instruction described above) through optical coupling isolation of the model TLP185, and the VOUT signal at the output pull-up end of the optical coupling outputs a switching signal through a toggle switch, so that the amplitude of the output pulse signal can be switched between +5V, +12V and +24V, where the power supply corresponding to +24V is converted into the power supply corresponding to +5V and +12V through a voltage regulator, thereby avoiding a complicated voltage conversion circuit.

Optionally, the number of the second output pins and the number of the pulse output circuits 300 are multiple;

a first output sub-pin PWM1 in the plurality of second output pins is connected with a second end of the input side of the optical coupler included in the first pulse output sub-circuit in the plurality of pulse output circuits 300; the first end of the output side of the optical coupler included in the first pulse output sub-circuit is used for outputting a single pulse signal; a second output sub-pin PWM2 of the plurality of second output pins is connected to a second end of an input side of the optical coupler included in the second pulse output sub-circuit of the plurality of pulse output circuits 300, and a first end of an output side of the optical coupler included in the second pulse output sub-circuit is used for outputting a continuous pulse signal.

In this embodiment, the pulse output circuit outputs at least one single pulse and at least one continuous pulse in an optical coupling isolation manner through the plurality of second output pins, so that the types of output signals can be further increased, and the application range of the signal output device is expanded. For any one of the second output pins, the specific corresponding output of the single pulse or the continuous pulse can be realized through the control of the CPU, and the specific implementation manner belongs to the conventional art and is not described herein again.

Optionally, the signal output apparatus further includes a power supply circuit for supplying power to the control circuit 100, the digital-to-analog conversion output circuit 200, and the pulse output circuit 300;

the power circuit includes at least one of an ac-dc conversion circuit 410, a dc-dc conversion circuit 420, and a low dropout linear regulator circuit 430.

In this embodiment, by providing the power supply circuit, at least one of the ac/dc conversion circuit, the dc/dc conversion circuit, and the low dropout linear regulator circuit can be used according to actual needs, which is beneficial to meeting the power consumption requirements of various power consumption components in the signal output device.

Referring to fig. 6 to 8, in a possible embodiment, the signal output device may further include at least one of the following components: a RESET circuit 510, wherein the RESET circuit 510 is connected to a RESET pin (corresponding to the RESET pin of the CPU) of the control circuit 100; a crystal oscillator circuit 520, wherein the crystal oscillator circuit 520 is connected to a clock pin (corresponding to the XTAL _ O pin and the XTAL _ I pin of the CPU) of the control circuit 100; a USB circuit 530, wherein the USB circuit 530 is connected to USB pins (corresponding to the USB CON pin, the USB DeviceD + pin, the USB DeviceD-pin and the USB VBUS pin of the CPU) of the control circuit 100; a storage circuit 540, wherein the storage circuit 540 is connected to a storage pin (corresponding to a Flash SPI CS pin of the CPU) of the control circuit 100; an indication circuit 550, wherein the indication circuit 550 is connected with status indication pins (corresponding to the pins LED 1-LED 8 of the CPU) of the control circuit 100; and the KEY switch circuit 560, wherein the KEY switch circuit 560 is connected with KEY pins (corresponding to KEY 1-KEY 5 pins of the CPU) of the control circuit 100.

Referring to fig. 8, the CPU may have n pins, which are respectively denoted as a first pin, a second pin, … …, and an nth pin for distinction, and are assigned with corresponding serial numbers. In connection with the above embodiments, the following is summarized for several main pins of the CPU, where n may be equal to 100:

in conjunction with a specific application embodiment, the reset circuit 510 may include a reset chip with a model CAT809T, configured to provide a power-on reset signal for the CPU; the crystal oscillator circuit 520 may include a 12M crystal oscillator for generating a clock signal or providing a reference signal; the memory circuit 540 may include a memory of type MX25L 1608; the key switch circuit 560 can be used for on-off control of analog signals and pulse output, switching of output range and output mode (charge, voltage, current) of analog signals, and switching of pulse signal output mode and voltage. The indication circuit 550 may indicate the operating status of the CPU by an LED light or other structure depending on the status of the key switch circuit 560.

Referring to fig. 7, in one example, the power supply circuit includes an AC-DC conversion circuit (AC/DC circuit) 410, a DC-DC conversion circuit (DC/DC circuit) 420, and a low dropout linear regulator circuit (LDO circuit) 430, which are connected in sequence. The ac-dc conversion circuit 410 may be configured to convert 220V ac power into +24V dc power, and is configured to supply power to circuits such as the reset circuit 510 and the pulse output circuit 300 in the signal output device; the number of the dc-dc conversion circuits 420 can be selected according to actual needs, and can be used to convert the +24V dc into the +12V or +5V dc, and the dc-dc conversion circuit 420 can be used to supply power to the control circuit 100, the digital-to-analog conversion output circuit 200, the pulse output circuit 300, and the like in the signal output device; the low dropout regulator circuit 430 may convert the +5V dc power into +3.3V dc power for supplying power to, for example, the control circuit 100, the reset circuit 510, the USB circuit 530, the storage circuit 540, and the like in the signal output apparatus.

Alternatively, as shown in fig. 9, in a case where the power supply circuit includes an ac-dc conversion circuit 410, the ac-dc conversion circuit 410 includes: a power supply connector J1, a fuse mechanism F1, a third capacitor C3, a thermistor NTC1, a voltage dependent resistor MOV1, a rectifier sub-circuit 411, a filter sub-circuit 412 and a transient voltage suppression diode D3;

wherein a first terminal of the power connector J1 is connected to a first terminal of the fuse F1, and a second terminal of the fuse F1 is connected to a first terminal of the third capacitor C3, a first terminal of the thermistor NTC1 and a first terminal of the varistor MOV 1; the second terminal of the thermistor NTC1 is connected to the first terminal of the input side of the rectifier sub-circuit 411, the second terminal of the power connector J1 is connected to the second terminal of the third capacitor C3, the second terminal of the varistor MOV1 and the second terminal of the input side of the rectifier sub-circuit 411, the first terminal of the output side of the rectifier sub-circuit 411 is connected to the negative terminal of the transient voltage suppression diode D3 and the first terminal of the fourth capacitor C4 included in the filter sub-circuit 412 to form a first voltage output terminal, and the second terminal of the output side of the rectifier sub-circuit 411 is connected to the positive terminal of the transient voltage suppression diode D3 and the second terminal of the fourth capacitor C4 and is grounded.

In one example, the AC-DC conversion circuit 410 may be a plastic package AC/DC power module, which has a small size and no exposed devices, thereby reducing the risk of electric shock; the safety mechanism F1 is a high-voltage self-recovery safety and is free of maintenance; the third capacitor C3 is a safety X capacitor and can inhibit the differential mode interference between L and N; the voltage dependent resistor MOV1 clamps voltage when overvoltage is input, and absorbs redundant current to protect a post-stage circuit; the thermistor NTC1 can effectively restrain surge current during startup; the output side of the rectifying sub-circuit 411 is the filtering sub-circuit 412 and the TVS protection circuit.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (10)

1. A signal output apparatus, comprising:

a control circuit (100);

the digital-to-analog conversion output circuit (200), the digital-to-analog conversion output circuit (200) comprises a digital-to-analog converter (210), and the digital-to-analog converter (210) is connected with a first output pin of the control circuit (100);

the pulse output circuit (300), the pulse output circuit (300) is connected with the second output pin of the control circuit (100).

2. The signal output apparatus according to claim 1, wherein the digital-to-analog converter (210) is provided with a signal type switching circuit (220);

the digital-to-analog converter (210) comprises a voltage output pin and a current output pin, and the signal type switching circuit (220) comprises a first switch, a second switch and at least one first capacitor; the voltage output pin is connected with a first end of the first switch, the current output pin is connected with a second end of the first switch, a third end of the first switch is connected with a first end of the second switch and a first end of each first capacitor in the at least one first capacitor, the second end of the second switch forms a first signal output end, the third end of the second switch is connected with a second end of each first capacitor in the at least one first capacitor, and the third end of the second switch forms a second signal output end; the third terminal of the first switch is selectively conducted to the first terminal of the first switch and the second terminal of the first switch, and the first terminal of the second switch is selectively conducted to the second terminal of the second switch and the third terminal of the second switch.

3. The signal output apparatus of claim 2, wherein the digital-to-analog converter (210) further comprises a bootstrap pin, and the signal type switching circuit (220) further comprises a transistor switch, a first resistor, a second resistor, and a second capacitor;

the bootstrap pin is connected to a first end of the transistor switch, the current output pin is connected to a control end of the transistor switch, a first end of the first resistor and a first end of the second capacitor, a second end of the first resistor is connected to a second end of the transistor switch and the first end of the second resistor, a second end of the second resistor is connected to the second end of the first switch, and a second end of the second capacitor is grounded.

4. The signal output apparatus of claim 1, wherein the digital-to-analog conversion output circuit (200) includes a plurality of digital-to-analog converters (210);

wherein the digital-to-analog converters (210) are connected in series circuit, and the digital-to-analog converters (210) are connected in series between the first output pin and the first input pin of the control circuit (100).

5. The signal output device according to claim 1, wherein the pulse output circuit (300) comprises a light coupling and a third resistor; the first end of the input side of the optical coupler is connected with a power supply through the third resistor, the second end of the input side of the optical coupler is connected with the second output pin of the control circuit (100), the first end of the output side of the optical coupler forms a third signal output end, and the second end of the output side of the optical coupler is grounded.

6. The signal output apparatus according to claim 5, wherein the pulse output circuit (300) further comprises a toggle switch and a fourth resistor;

the first end of the output side of the optocoupler is also connected with the first end of the toggle switch through the fourth resistor; the second end of toggle switch is used for connecting the power, and the quantity of toggle switch's second end is a plurality of, toggle switch's first end alternative switch-on extremely any one second end in a plurality of second ends of toggle switch, the voltage that a plurality of second ends of toggle switch correspond the power of connecting exists differently.

7. The signal output apparatus according to claim 5, wherein the number of the second output pins and the number of the pulse output circuits (300) are plural;

a first output sub-pin in the second output pins is connected with a second end of the input side of the optical coupler included in the first pulse output sub-circuit in the pulse output circuits (300); the first end of the output side of the optical coupler included in the first pulse output sub-circuit is used for outputting a single pulse signal; and a second output sub-pin in the plurality of second output pins is connected with a second end of the input side of the optical coupler included in a second pulse output sub-circuit in the plurality of pulse output sub-circuits (300), and a first end of the output side of the optical coupler included in the second pulse output sub-circuit is used for outputting a continuous pulse signal.

8. The signal output apparatus according to claim 1, further comprising a power supply circuit for supplying power to the control circuit (100), the digital-to-analog conversion output circuit (200), and the pulse output circuit (300);

the power supply circuit includes at least one of an AC-DC conversion circuit (410), a DC-DC conversion circuit (420), and a low dropout linear regulator circuit (430).

9. The signal output apparatus according to claim 8, wherein, in a case where the power supply circuit includes an ac-dc conversion circuit (410), the ac-dc conversion circuit (410) includes: the power supply connector, the safety mechanism, the third capacitor, the thermistor, the piezoresistor, the rectifier sub-circuit (411), the filter sub-circuit (412) and the transient voltage suppression diode;

the first end of the power connector is connected with the first end of the safety mechanism, and the second end of the safety mechanism is connected with the first end of the third capacitor, the first end of the thermistor and the first end of the piezoresistor; the second end of the thermistor is connected with the first end of the input side of the rectifier sub-circuit (411), the second end of the power supply connector is connected with the second end of the third capacitor, the second end of the piezoresistor and the second end of the input side of the rectifier sub-circuit (411), the first end of the output side of the rectifier sub-circuit (411) is connected with the negative electrode of the transient voltage suppression diode and the first end of the fourth capacitor included by the filter sub-circuit (412) to form a first voltage output end, and the second end of the output side of the rectifier sub-circuit (411) is connected with the positive electrode of the transient voltage suppression diode and the second end of the fourth capacitor and is grounded.

10. The signal output apparatus of claim 1, further comprising at least one of:

the reset circuit (510), the reset circuit (510) is connected with the reset pin of the control circuit (100);

the crystal oscillator circuit (520), the crystal oscillator circuit (520) is connected with a clock pin of the control circuit (100);

a USB circuit (530), the USB circuit (530) being connected to a USB pin of the control circuit (100);

a memory circuit (540), the memory circuit (540) being connected to a memory pin of the control circuit (100);

an indication circuit (550), the indication circuit (550) being connected to a status indication pin of the control circuit (100);

the key switch circuit (560), the key switch circuit (560) is connected with the key pin of the control circuit (100).

Images