CN212646773U

CN212646773U - Circuit structure for improving electromagnetic radiation of clock signal end of processor

Info

Publication number: CN212646773U
Application number: CN202020851130.7U
Authority: CN
Inventors: 赵丙南
Original assignee: Nawa Electronics Shanghai Co ltd
Current assignee: Nawa Electronics Shanghai Co ltd
Priority date: 2020-05-20
Filing date: 2020-05-20
Publication date: 2021-03-02
Anticipated expiration: 2030-05-20

Abstract

The utility model belongs to the technical field of electromagnetic radiation, a circuit structure for improving treater clock signal end electromagnetic radiation is disclosed, including the treater, with the function module that the clock signal end of treater links to each other, and is a plurality of the idle PWM signal port of treater is as the output, and is a plurality of the idle IO port of treater connects into many and offsets the return circuit, every as the input some circuit trends of offsetting the return circuit all with the clock signal end of treater and the circuit between the function module trend parallel, the electric current trend of offsetting the return circuit is opposite with the electric current trend in the circuit between the clock signal end of treater and the function module. Utilize the utility model discloses a circuit structure can assist the electromagnetic radiation who reduces the clock signal end, further improves the problem that exceeds standard of RE test, makes it reach EMC test standard, improves the quality level of electronic product.

Description

Circuit structure for improving electromagnetic radiation of clock signal end of processor

Technical Field

The utility model relates to an electromagnetic radiation's technical field especially relates to a circuit structure for improving treater clock signal end electromagnetic radiation.

Background

The RE test in the EMC test of the PCB level of the electronic product is a very important parameter in the safety standard test index of the circuit board, various international standards have strict requirements on the index, and because electromagnetic radiation often appears in a plurality of unpredictable frequency bands, the RE test can be reflected according to the actual test condition, therefore, the RE test is easy to exceed the standard, and for each electronic product, an electronic hardware engineer of the electronic product can spend a plurality of times and a plurality of test costs to solve the problem.

The conventional solutions for RE radiation are roughly two, firstly, a radiation source is found, radiation is reduced by modifying electrical parameters of a circuit resistor, although the problem that RE test exceeds standard is reduced, other problems are often introduced, for example, signal quality is poor due to reduction of signal driving capability, and more experiments are needed to demonstrate stability of the method; secondly, a metal shielding frame is added for shielding, and the cost is generally increased.

SUMMERY OF THE UTILITY MODEL

The utility model provides a circuit structure for improving treater clock signal end electromagnetic radiation has solved current solution and can the increase cost, causes signal drive energy decline scheduling problem.

The utility model discloses the following technical scheme of accessible realizes:

the circuit structure comprises a processor and a functional module connected with a clock signal end of the processor, wherein a plurality of idle PWM signal ports of the processor are used as output ends, a plurality of idle IO ports of the processor are used as input ends, a plurality of offset loops are connected, the trend of part of lines of each offset loop is parallel to the trend of lines between the clock signal end of the processor and the functional module, and the trend of current of the offset loops is opposite to the trend of current in the lines between the clock signal end of the processor and the functional module.

Furthermore, the layer number position of the PCB where a part of lines of each counteracting loop are located is the same as the layer number position of the PCB where the lines between the clock signal end of the processor and the functional module are located, and the rest lines of each counteracting loop are all located in the inner layer of the PCB where the rest lines of each counteracting loop are located.

Further, the working frequency of the PWM signal port is consistent with the working frequency of the clock signal port, and both are set to 25MHz or a frequency multiplication of 25 MHz.

The utility model discloses profitable technological effect lies in:

the idle PWM signal ports of the processors are used as output ends, the idle IO ports of the processors are used as input ends, and a plurality of offset loops are connected, wherein part of lines of each offset loop are parallel to the lines between the clock signal end of the processor and the functional module, and the current direction of the offset loop is opposite to the current direction of the lines between the clock signal end of the processor and the functional module, so that the offset loop generates electromagnetic fields with opposite directions to the electromagnetic fields between the clock signal end of the processor and the functional module, and the electromagnetic fields are offset with each other, thereby assisting in reducing the electromagnetic radiation of the clock signal end, further improving the standard exceeding problem of RE test, enabling the standard exceeding problem to reach EMC test standards, and improving the quality level of electronic products.

Drawings

Fig. 1 is a schematic diagram illustrating a connection between a clock signal terminal and a functional module of a conventional processor;

fig. 2 is a schematic diagram of a connection position of the cancellation circuit according to the present invention, in which a solid line indicates that the connection line is located on the surface layer of the PCB, and a dotted line indicates that the connection line is located on the inner layer of the PCB;

Detailed Description

The following detailed description of the preferred embodiments of the present invention is provided in connection with the accompanying drawings.

With the increasing popularization of electronic products, the requirements on the safety of the electronic products are also increasing, electromagnetic radiation becomes a focus of much attention of people, and the electromagnetic radiation is mainly checked through an EMC test, which is also called as electromagnetic compatibility EMC, which refers to the comprehensive evaluation of EMI and anti-interference capability EMS of the electronic products in the aspect of electromagnetic field, and is one of the most important indexes of the quality of the electronic products, and the purpose of the method is to detect the influence of the electromagnetic radiation generated by the electronic products on human bodies, public place power grids and other normally working electric products. The electromagnetic compatibility is a subject of researching that various electric equipment can coexist in a broad sense and organisms can be contained under the condition of limited space, time and frequency spectrum resources without causing degradation, and comprises two parts of electromagnetic interference and electromagnetic sensitivity, wherein the electromagnetic interference test is to measure the magnitude of electromagnetic wave signals generated and emitted by the tested equipment in a normal working state to reflect the strength of interference on surrounding electronic equipment, and the electromagnetic sensitivity test is to measure the strength of the anti-interference capability of the tested equipment on electromagnetic disturbance.

In an EMC test project, RE test is easy to exceed the standard, the problem is solved firstly by accurately positioning the problem, and the problem is not rectified in the positioning process and is collided everywhere like a headless fly. The problem location has two means, namely, the problem location is judged by the intuition of an engineer and is judged by the EMC experience accumulated by the engineer; and secondly, a comparison test is carried out, and the problem is subjected to detailed positioning judgment by combining an instrument and EMC experience. Generally, two aspects are considered, namely, various power cables and signal cables connected with machine equipment are detected and positioned through plugging, and then different rectification measures are taken according to phenomena; secondly, whether the structural design is reasonable or not has a larger relationship, and the leakage of the shielding body can have great influence on the RE radiation superscript.

If the radiation in the RE test is uniform narrow-band spike group noise, calculate the spacing frequency difference, which may be the fundamental frequency of the radiation source, and if the RE radiation is single spike noise, see if the spike noise and the clock frequency on the single board have a frequency multiplication relation, for this type of RE radiation, the utility model provides a circuit structure for improving the electromagnetic radiation of the processor clock signal end, which comprises a processor, a functional module connected with the clock signal end of the processor, as shown in fig. 1, with the idle PWM signal ports of a plurality of processors as the output end, and with the idle IO ports of a plurality of processors as the input end, to connect a plurality of cancellation loops, as shown in fig. 2, wherein a part of the lines of each cancellation loop are parallel to the line between the clock signal end of the processor and the functional module, and the current trend of the cancellation loop is opposite to the current trend in the line between the clock signal end of the processor and the functional module. Therefore, according to the theory and the actual phenomenon that the electromagnetic field can offset each other, the idle PWM signal port and the IO port on the processor are connected to form an offset loop, and part of the line trend of the idle PWM signal port and the IO port on the processor is parallel to the line trend between the clock signal end and the functional module of the processor, the processor is used for controlling the current trend in the offset loop, the idle PWM signal port and the IO port on the processor generate the electromagnetic field with the direction opposite to the direction of the electromagnetic field between the clock signal end and the functional module according to the right-hand spiral law, and the electromagnetic field and the functional module offset each other, thereby being capable of assisting in reducing the electromagnetic radiation of the clock signal end on the basis of adopting other electromagnetic radiation standard exceeding problems such as adding a metal shielding mechanism and the like, further improving the standard exceeding problem of RE test, leading the idle PWM signal port to reach the EMC test standard, improving the quality level of electronic products, the practicability is higher.

In order to improve the counteracting effect of the electromagnetic field, the layer number position of the PCB where a part of circuits of each counteracting loop are located is the same as the layer number position of the PCB where the circuits between the clock signal end of the processor and the functional module are located, and the rest circuits of each counteracting loop are all located in the inner layer of the PCB where the circuits are located. Generally, the circuit from the clock signal terminal to the functional module is designed on the surface layer of the PCB, as shown in fig. 2, so as to reduce the circuit consumption and ensure the quality of signal transmission, but the electromagnetic radiation is relatively high, therefore, a part of the circuit corresponding to the cancellation circuit should be disposed on the surface layer of the PCB, and the rest of the circuit should be disposed as much as possible on the inner layer of the PCB, so as to avoid generating additional electromagnetic radiation.

Generally, the working frequency of a clock signal end applied to an electronic circuit is 25MHz or the frequency multiplication of 25MHz, for example 125MHz, and at this time, only software debugging is needed to set the working frequency of a corresponding PWM signal end in a processor to be consistent with the working frequency of the clock signal end, so that the electromagnetic field intensities generated by the two ends are equivalent, mutual cancellation is easier, and the probability of generating additional electromagnetic radiation by a cancellation loop can be reduced.

Adopt the utility model discloses a circuit structure's concrete implementation method as follows:

firstly, in the design stage, according to the actual circuit PCB topological structure, the line directions and positions of a clock signal end and a functional module of a processor can be known in advance, idle IO ports and PWM signal ports on a plurality of processors are selected, a plurality of offset loops X1 and X2 … Xn are designed, and according to the actual conditions of the line directions and positions of the clock signal end and the functional module, the clock signal end and the functional module can be arranged on the left side and the right side of the functional module or arranged on one side at intervals;

secondly, after the PCB is processed by a factory, carrying out EMC test on the PCB, determining the standard exceeding point of the RE test of the PCB and the range of the offset loop, selecting one or more corresponding offset loops, using software to allocate and control the current and working frequency in the offset loop to make the current and working frequency consistent with the working frequency of the clock signal end of the processor, and using a far-field antenna to observe the radiation condition in real time until the optimal position of the offset loop is found;

and finally, storing the parameters into a system, and opening corresponding cancellation loops when each circuit generating the RE signal works, so that the RE test superscript point on the whole PCB is eliminated.

Although specific embodiments of the present invention have been described above, it will be appreciated by those skilled in the art that these embodiments are merely illustrative and various changes or modifications may be made therein without departing from the principles and spirit of the invention, and therefore, the scope of the invention is defined by the appended claims.

Claims

1. A circuit arrangement for improving electromagnetic radiation at a clock signal terminal of a processor, comprising a processor, a functional block coupled to the clock signal terminal of the processor, characterized in that: and the direction of part of lines of each counteracting loop is parallel to the direction of lines between a clock signal end of the processor and the functional module, and the direction of current of the counteracting loop is opposite to the direction of current in the lines between the clock signal end of the processor and the functional module.

2. The circuit arrangement for improving processor clock signal side electromagnetic radiation of claim 1, wherein: the number of layers of the PCB where a part of lines of each counteracting loop are located is the same as the number of layers of the PCB where the lines between the clock signal end of the processor and the functional module are located, and the rest of the lines of each counteracting loop are located in the inner layer of the PCB where the rest of the lines of each counteracting loop are located.

3. The circuit arrangement for improving processor clock signal side electromagnetic radiation of claim 2, wherein: the working frequency of the PWM signal end is consistent with that of the clock signal end and is set to be 25MHz or the frequency multiplication of 25 MHz.