CN212515728U - Array substrate, display panel and display device - Google Patents

Abstract

The application provides an array substrate, a display panel and a display device, relates to the technical field of display, and can reduce the degree of abnormal (mura) of a display picture caused by the fact that whether a touch signal line couples with a pixel capacitor or not among sub-pixels. The array substrate comprises a substrate, and a data line, a common electrode, a touch signal line and a shielding signal line which are arranged on the substrate and positioned in an opening area; the common electrode is positioned on one side of the data line, which is deviated from the substrate; the touch signal line and the shielding signal line are positioned between the data line and the common electrode; the extending directions of the touch signal line and the shielding signal line are consistent with the extending direction of the data line, and the touch signal line and the shielding signal line are arranged oppositely; the touch signal line and the shielding signal line correspond to different data lines.

Description

Array substrate, display panel and display device

Technical Field

The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.

Background

Touch display panels (touch panels) are currently common display panels, and are widely applied in the fields of inquiry of public information, industrial control, military command, electronic games, multimedia teaching and the like due to a simple, convenient and natural man-machine interaction mode.

In the related art, a touch signal line (TP trace) is disposed between a portion of a data line (data line) and a common electrode (also referred to as a com electrode) in an array substrate (array) of the touch display panel, and each touch signal line is connected to a plurality of touch sensing electrodes (touch sensor pads) located in a sub-pixel region; in this case, the sub-pixels with the touch signal lines and the sub-pixels without the touch signal lines are coupled to the pixel capacitors at different levels, thereby causing abnormal (mura) display under some heavy-duty display conditions; in particular, in some touch display panels with specific arrangement of sub-pixels, horizontal crosstalk (horizontal crosstalk-talk) phenomenon may also occur in the display screen due to the influence of the data signal loaded on the data line.

SUMMERY OF THE UTILITY MODEL

The application provides an array substrate, a display panel and a display device, which can reduce the degree of abnormal (mura) of a display picture caused by the fact that whether a touch signal line is coupled with a pixel capacitor or not among sub-pixels.

The application provides an array substrate, which comprises a substrate, and a data line, a common electrode, a touch signal line and a shielding signal line which are arranged on the substrate and positioned in an opening area; the common electrode is positioned on one side of the data line, which is far away from the substrate; the touch signal line and the shielding signal line are positioned between the data line and the common electrode; the extending directions of the touch signal line and the shielding signal line are consistent with the extending direction of the data line, and the touch signal line and the shielding signal line are both arranged opposite to the data line; the touch signal line and the shielding signal line correspond to different data lines.

To sum up, the array substrate that this application embodiment provided sets up the shielding signal line through the below of common electrode directly over the data line that does not set up touch signal line, through to shielding the signal line and appling fixed electric potential, respectively through touch signal line and shielding signal line capacitive coupling effect, can make the coupling capacitance in each sub-pixel region more even, and then has reduced the degree that the touch electrode shows unusually (touch sensor pad mura) under the heavy load shows.

In some possible implementation manners, each data line is arranged opposite to the touch signal line or opposite to the shielding signal line; therefore, the uniformity of the coupling capacitance of the touch signal line and the shielding signal line on the common electrode can be ensured to the maximum extent, and the degree of occurrence of touch sensor pad mura under heavy-load display is effectively reduced.

In some possible implementations, the width of the shielding signal line is greater than the width of the data line.

In some possible implementations, the array substrate further includes: pixel electrodes respectively located in the opening region and in a plurality of sub-pixels arranged in a matrix; the pixel electrode comprises a strip-shaped sub-electrode; the pixel electrodes in the sub-pixels in the same column are connected with the same data line; the data lines which are arranged opposite to the shielding signal lines are first data lines, N rows of sub-pixels are arranged between every two adjacent first data lines at intervals, and N is an odd number; and the pixel electrodes which are positioned in the same row and connected with the adjacent two first data lines are positioned in two sub-pixels with the same color which are sequentially arranged in the sub-pixels in the row.

In this case, on one hand, the touch signal line is moved away from the position right above the first data line, so that the touch signal line and the touch sensing electrode connected with the touch signal line are prevented from causing coupling and dragging on the electric potential of the sub-pixel area where the common electrode is located; on the other hand, a shielding signal line is arranged right above the first data line, and the coupling degree of the data signal change on the first data line to the sub-pixel area where the common electrode is located is reduced through the shielding effect of the shielding signal line; and further, the degree of crosstalk of the common electrode by the data line is reduced, the phenomenon of horizontal crosstalk of a display picture is reduced, and the charging start time of the pixel electrode through the data line is shortened.

In some possible implementation manners, the plurality of sub-pixels arranged in a matrix are divided into a plurality of first pixel units and a plurality of second pixel units, and the first pixel units and the second pixel units are sequentially and alternately arranged in the row direction and the column direction; the first pixel unit includes: the red sub-pixels, the green sub-pixels and the blue sub-pixels are sequentially arranged along the row direction; the second pixel unit includes: the red sub-pixels, the green sub-pixels and the white sub-pixels are sequentially arranged along the row direction; the first data line is connected with pixel electrodes in the blue sub-pixels and the white sub-pixels which are positioned in the same column and are sequentially and alternately arranged.

In this case, on one hand, the coupling and dragging of the common electrode to the potential of the blue sub-pixel area by the touch signal line and the touch sensing electrode connected with the touch signal line are avoided; on the other hand, the coupling degree of the data signal change on the first data line to the corresponding blue sub-pixel region of the common electrode is reduced, the phenomenon that horizontal crosstalk occurs on a display picture under a blue crosstalk test pattern is reduced, and the charging starting time of the pixel electrode through the data line is shortened.

In some possible implementations, the pixel electrode is located on a side of the common electrode facing away from the substrate; the common electrode comprises a planar sub-electrode positioned in each sub-pixel; namely, the array substrate is an FFS type array substrate.

In some possible implementation manners, the common electrode is provided with a hollow-out portion in an area opposite to the shielding signal line; to reduce the secondary coupling of the common electrode due to the data signal loaded on the data line.

In some possible implementations, a surface of the shielding signal line on a side toward the data line is convex to the common electrode side in a width direction; in this case, on one hand, since the lower surface of the shielding signal line protrudes upwards, the lateral coupling electric field of the data line can be blocked, and the coupling degree of the data signal on the data line to the common electrode can be effectively reduced; on the other hand, the shielding signal line is a signal which is independently electrically connected, a tiny reverse voltage difference can be provided when the data line transmits the signal, so that the data line can transmit the data signal, when the common electrode is coupled, the voltage of the shielding signal line is utilized to carry out tiny reverse pulling on the common electrode, and then the part of the data line generating a lateral coupling electric field to the common electrode can be corrected back through the shielding signal line.

In some possible implementations, both ends of all the shielding signal lines are laterally connected by a connection portion located at a non-opening area; the coupling voltage amplitude of the data signal loaded on the data line to the shielding signal line is reduced, and meanwhile, the potential of the shielding signal line can be quickly restored to the original potential.

In some possible implementation manners, among all the shielding signal lines, a plurality of shielding signal lines which are adjacent in sequence in the row direction form a shielding unit, and two ends of the plurality of shielding signal lines in the shielding unit are transversely connected through a connecting part located in a non-opening area; the shielding signal lines in different shielding units are independently arranged. Therefore, on one hand, the coupling voltage amplitude of the data signal loaded on the data line to the shielding signal line is reduced, and the shielding signal line can be rapidly restored to the original potential; on the other hand, the high coupling voltage amplitude generated by the data signal loaded on the data line of the local area to the shielding signal line is avoided, the voltage of the shielding signal line of the adjacent area is raised, and the influence on the shielding signal line of the adjacent area is also avoided.

In some possible implementations, adjacent ones of the shielding signal lines are laterally connected by a connecting portion located within the opening area; so as to ensure that the shielded signal line can be quickly restored to the original potential.

In some possible implementation manners, the touch signal line and the shielding signal line are made of the same material in the same layer; so as to simplify the manufacturing process and reduce the manufacturing cost.

The embodiment of the present application further provides a display panel, which includes the array substrate, the opposite-box substrate, and the liquid crystal layer located between the array substrate and the opposite-box substrate in any one of the foregoing possible implementation manners.

In some possible implementation manners, a photolithography gap pillar is disposed on a side of the pair of box substrates facing the array substrate, and the photolithography gap pillar is opposite to a region of the array substrate where the shielding signal line is disposed; so as to avoid the friction between the main gap column and the alignment film, and further avoid the PS mura of the display picture.

The embodiment of the application further provides a display device, which is characterized by comprising a backlight module and a display panel in any one of the possible implementation modes, wherein the display panel is positioned on the light emergent side of the backlight module.

Drawings

Fig. 1 is a schematic plan view of a display panel according to an embodiment of the present disclosure;

FIG. 2 is a schematic cross-sectional view of the display panel of FIG. 1 at position AA';

fig. 3 is a schematic view of a sub-pixel arrangement of a display panel according to an embodiment of the present disclosure;

fig. 4 is a schematic partial cross-sectional view of an array substrate according to an embodiment of the present disclosure;

fig. 5 is a schematic view of a display panel provided in the related art of the present application;

fig. 6 is a schematic diagram of a display panel according to an embodiment of the present disclosure;

fig. 7 is a schematic partial cross-sectional view of an array substrate according to an embodiment of the present disclosure;

fig. 8 is a partial schematic view of an array substrate according to an embodiment of the present disclosure;

fig. 9 is a partial schematic view of an array substrate according to an embodiment of the present disclosure;

fig. 10 is a schematic distribution diagram of shielding signal lines in an array substrate according to an embodiment of the present disclosure;

fig. 11 is a schematic distribution diagram of shielding signal lines in an array substrate according to an embodiment of the present disclosure;

fig. 12 is a schematic distribution diagram of shielding signal lines in an array substrate according to an embodiment of the present disclosure;

fig. 13 is a schematic partial cross-sectional view of an array substrate according to an embodiment of the present disclosure;

FIG. 14 is a schematic diagram illustrating timing of potentials on a data line and a shielding signal line according to an embodiment of the present disclosure;

fig. 15 is a schematic partial cross-sectional view of a display panel according to an embodiment of the present disclosure.

Detailed Description

To make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below with reference to the drawings in the present application, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terms "first," "second," and the like in the description examples and claims of this application and in the drawings are used for descriptive purposes only and are not to be construed as indicating or implying relative importance, nor order. Furthermore, the terms "comprises" and "comprising," as well as any variations thereof, are intended to cover a non-exclusive inclusion, such as a list of steps or elements. A method, system, article, or apparatus is not necessarily limited to those steps or elements explicitly listed, but may include other steps or elements not explicitly listed or inherent to such process, system, article, or apparatus. "Upper," "lower," and the like are used solely in relation to the orientation of the components in the figures, and these directional terms are relative terms that are used for descriptive and clarity purposes and that will vary accordingly depending on the orientation in which the components in the figures are placed.

The embodiment of the application provides a display device, which is a touch display device and can be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a vehicle-mounted computer, a digital photo frame, a navigator and the like, is not particularly limited in the present application with respect to the specific form of the display device.

In some possible implementation manners, the display device may be a liquid crystal display (liquid crystal display) device, and the display device includes a backlight module and a display panel, and the display panel is located on a light emitting side of the backlight module. The following examples are given by way of illustration.

An embodiment of the present application provides a display panel, as shown in fig. 1, which is divided into an open area (AA area for short) 01 and a non-open area 02.

As shown in fig. 2 (a cross-sectional view along AA' of fig. 1), the display panel includes an array substrate 1, a pair of cell substrates 2, and a liquid crystal layer 3 between the array substrate 1 and the pair of cell substrates 2. Of course, the display panel further includes other devices, such as a data driving IC, a polarizer, and the like, which are not described herein.

It is understood that, in some possible implementations, the opposing substrate 2 may be a color filter substrate, that is, a color filter layer is disposed on the opposing substrate 2. In some possible implementations, a color filter layer may also be disposed on the array substrate 1; the present application is not particularly limited with respect to the specific arrangement form of the cartridge substrate 2.

In some possible implementations, referring to fig. 1 and 3, the display panel is provided with sub-pixels p (sub-pixels) arranged in a matrix in the opening area 01. For example, as shown in fig. 3, the subpixels P arranged in a matrix may include: red sub-pixel R, green sub-pixel G and blue sub-pixel B which are repeatedly arranged along the line direction XX'; in the column direction YY', the sub-pixels in the same column have the same color; however, the arrangement of the sub-pixels P is not limited thereto.

In conjunction with the foregoing description, the following further describes a specific arrangement of the array substrate 1 in the display panel of the present application.

As shown in fig. 4 (a transverse cross-sectional view of the array substrate 1 at the position of a plurality of adjacent sub-pixels P), the array substrate 1 includes: a substrate 11, and a data line 12(data line), a common electrode 13, and a pixel electrode 14 disposed on the substrate 11 in the opening area 01.

The common electrode 13 is distributed over the entire opening area 01, and portions of the common electrode 13 located in the respective sub-pixels P are electrically connected in an integral structure. In some possible implementations, the common electrode 13 may include a planar sub-electrode (refer to fig. 4) in the region of each sub-pixel P; for example, in the region of each sub-pixel P, the pixel electrode 14 includes a stripe-shaped sub-electrode, and the pixel electrode 14 is closer to the liquid crystal layer side than the common electrode 13. In some possible implementations, the common electrode 13 may include a plurality of strip-shaped sub-electrodes in the region of each sub-pixel P. For example, in the region of each sub-pixel P, the common electrode 13 and the pixel electrode 14 each include a strip-shaped electrode located on a side close to the liquid crystal layer (i.e., the uppermost layer of the array substrate), and the strip-shaped sub-electrodes in the common electrode 13 and the pixel electrode 14 are sequentially and alternately arranged in the same layer.

It is understood that, in the case where the common electrode 13 is a planar sub-electrode in the region of each sub-pixel P, the pixel electrode 14 is located above the common electrode 13 (i.e., the pixel electrode 14 is located on the side of the common electrode 13 away from the substrate 1); that is, the display panel using the array substrate is an FFS (fringe field switching) type display panel. In the case that the common electrode 13 includes a plurality of strip-shaped sub-electrodes in the region of each sub-pixel P, the strip-shaped sub-electrodes in the pixel electrode 14 and the strip-shaped sub-electrodes in the common electrode 13 may be alternately arranged in the same layer or in different layers (i.e., different layers); that is, the display panel using the array substrate is an IPS (in plane switch) type. In this case, when the display panel displays, a pixel capacitor is formed between the common electrode and each pixel electrode, and an electric field with different intensity is formed at the position of the liquid crystal layer to drive the liquid crystal molecules to rotate, so as to realize different gray scale display (for example, 0 to 255 gray scales).

In addition, in the array substrate, the pixel electrodes 14 in the sub-pixels P in the same column are connected to the same data line 12, and the pixel electrodes 14 in the sub-pixels P in the same row are connected to the same gate line (gate line); the data line 12 is located in a region between two adjacent columns of the sub-pixels P, and the gate line (not shown in fig. 4) is located in a region between two adjacent rows of the sub-pixels P.

Illustratively, in some possible implementations, the array substrate 1 is provided with a Thin Film Transistor (TFT) in each sub-pixel P, and a drain of the TFT in each sub-pixel P is connected to a pixel electrode 14 in the sub-pixel P, a source of the TFT in the sub-pixel P in the same column is connected to the same data line 12, and a gate of the TFT in the sub-pixel P in the same row is connected to the same gate line, so that each row of sub-pixels is turned on by inputting a scanning signal to the gate line row by row, and when a row of sub-pixels is turned on, the data line writes a data signal into the pixel electrode of each sub-pixel P in the row through the TFT, thereby implementing continuous image display.

In addition, as shown in fig. 3 and 4, the array substrate 1 provided in the embodiment of the present application further includes: a touch signal line layer located between the data line layer and the common electrode layer, the touch signal line layer comprising: and a plurality of touch signal lines 15 aligned in the extending direction of the data lines 12. The touch signal line 15 is located right above part of the data line 12; that is, the touch signal line 15 overlaps with the orthographic projection of the data line 12 on the substrate 1. The touch signal line 15 can be generally aligned with the center line of the data line 12; illustratively, the width of the touch signal line 15 is greater than the width of the data line 12. Hereinafter, "directly above" can be understood in terms of the overlapping of the orthographic projections of the two on the substrate 1.

It can be understood that, in the array substrate 1, the data lines 12 are respectively disposed for each row of the sub-pixels P, and the disposing density of the touch signal lines 15 is less than that of the data lines 12, and the touch signal lines 15 are generally disposed at intervals of a plurality of rows of the sub-pixels P; that is, the array substrate is provided with the touch signal line 15 only right above a part of the data line 12. In addition, a plurality of touch sensor pads (touch sensor pads) connected to the touch signal lines 15 and a plurality of sensing signal lines crossing the touch signal lines 15 are disposed in the subpixel region of the array substrate 1 to implement touch control.

Compared with the sub-pixel regions without the touch signal lines 15, the sub-pixel regions partially provided with the touch signal lines 15 are capacitively coupled with the pixel electrodes 14, the adjacent gate lines and the data lines 12 above the touch signal lines 15 and the touch sensing electrodes connected with the touch signal lines 15, so that the regions electrically insulated between the touch sensing electrodes in the sub-pixel regions have different capacitance values, and the touch electrode display abnormality (touch sensor pad mura) occurs under heavy-load display.

Based on this, as shown in fig. 3 and fig. 4, in the array substrate 1 provided in the embodiment of the present application, for a portion of the data line 12 without the touch signal line 15 disposed thereon, a shielding signal line 16 consistent with the extending direction of the data line 12 may be disposed directly above the portion of the data line 12, and the shielding signal line 16 is located on a side of the common electrode 13 close to the substrate 11, that is, both the shielding signal line 16 and the touch signal line 15 are located between the data line 12 and the common electrode 13, and the shielding signal line 16 and the touch signal line 15 are disposed opposite to different data lines 12 respectively.

To sum up, the array substrate that this application embodiment provided sets up the shielding signal line through the below of common electrode directly over the data line that does not set up touch signal line, through to shielding the signal line and appling fixed electric potential, respectively through touch signal line and shielding signal line capacitive coupling effect, can make the coupling capacitance in each sub-pixel region more even, and then has reduced the degree that the touch electrode shows unusually (touch sensor pad mura) under the heavy load shows.

In some possible implementations, as shown in fig. 4, the array substrate 1 may be provided with a shielding signal line 16 directly above each data line 12 where no touch signal line 15 is provided; that is, for any data line 12, one of the touch signal line 15 and the shielding signal line 16 is inevitably disposed right above the data line, so that the uniformity of the coupling capacitance of the touch signal line and the shielding signal line on each sub-pixel region can be ensured to the greatest extent, and the degree of touch electrode display abnormality (touch sensor pad mura) occurring under heavy-load display can be effectively reduced.

In addition, as shown in fig. 5, the plurality of sub-pixels P arranged in a matrix in the display panel divide a plurality of first pixel units U1 and a plurality of second pixel units U2, and the first pixel units U1 and the second pixel units U2 are alternately arranged in sequence in the row direction XX 'and the column direction YY'. Wherein the first pixel unit U1 includes: the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are sequentially arranged along the XX' direction; the second pixel unit U2 includes: and the red sub-pixel R, the green sub-pixel G and the white sub-pixel W are sequentially arranged along the line direction XX'. It is to be understood that, under this arrangement rule, the blue sub-pixels B and the white sub-pixels W are alternately arranged in turn in the column direction YY ', and five (odd number) sub-pixels are spaced between two blue sub-pixels B adjacent in turn in the row direction XX'.

In the display panel, the data line 12 connected to the pixel electrodes in the blue subpixel B and the white subpixel W in the same column is defined as a first data line, and the touch signal line 15 is disposed directly above the first data line. In this way, when the display panel performs display by using a one-column inversion (one-column inversion), the polarities of the sub-pixels P located in the same column are the same, and the polarities of the sub-pixels in two adjacent columns are opposite.

As shown in fig. 5, in a certain display frame, the sub-pixels in the odd-numbered columns are all positive polarity (+), and the sub-pixels in the even-numbered columns are all negative polarity (-), and in the next display frame, the polarity of each column of sub-pixels is inverted, that is, the sub-pixels in the odd-numbered columns are all negative polarity (-), and the sub-pixels in the even-numbered columns are all positive polarity (+). In this case, it can be understood that, since the touch signal line 15 is disposed right above the data line (i.e. the first data line) connected to the pixel electrode of the blue sub-pixel B, that is, when a data signal is loaded on the first data line, the touch signal line 15 and the touch sensing electrode connected thereto will couple with the potential of the common electrode at the blue sub-pixel position; meanwhile, because the polarities of the two blue sub-pixels B sequentially arranged in the same row are the same, that is, the potential of the common electrode is coupled and pulled in the same direction of all the blue sub-pixels in the same row, so that a horizontal crosstalk phenomenon occurs in a display screen under a blue crosstalk (cross talk) test pattern.

Based on this, in some embodiments of the present application, as shown in fig. 6 and fig. 7 (a cross-sectional view of fig. 6 at a plurality of sub-pixel positions along a row direction), the shielding signal line 16 may be disposed directly above the first data line 12 ', and the touch signal line 15 may be moved to be directly above the other data lines 12 except the first data line 12'. Fig. 7 is a schematic illustration only showing that the touch signal line 15 is moved to a position right above the data line connected to the pixel electrode in the red sub-pixel R in the same column, but the present application is not limited thereto, and in some possible implementation manners, the touch signal line 15 may be moved to a position right above the data line connected to the pixel electrode in the green sub-pixel R in the same column. In some possible implementation manners, the shielding signal line 16 may also be disposed directly above the data line connected to the pixel electrode in the sub-pixel of the same column color, for example, the shielding signal line 16 may also be disposed directly above the data line connected to the pixel electrode in the green sub-pixel of the same column in fig. 7.

In this case, on one hand, by moving the touch signal line 15 away from the position right above the first data line 12', the touch signal line 15 and the touch sensing electrode connected to the touch signal line 15 are prevented from causing coupling pulling on the potential of the common electrode 13 in the blue subpixel region; on the other hand, the shielding signal line 16 is arranged right above the first data line 12', and the coupling degree of the data signal change on the first data line to the corresponding blue sub-pixel area of the common electrode is reduced through the shielding effect of the shielding signal line; and further, the degree of crosstalk of the common electrode by the data line is reduced, the phenomenon that horizontal crosstalk occurs on a display picture under a blue crosstalk test pattern is reduced, and the charging start time of the pixel electrode through the data line is shortened.

In addition, the above-mentioned solution of reducing crosstalk by adjusting the positions of the shielding signal line 16 and the touch signal line 15 to reduce the coupling capacitance amplitude to the common electrode is not only applicable to the display panel adopting the sub-pixel arrangement mode in fig. 6, but also applicable to other specific display panels in which sub-pixels are specifically arranged.

For example, in some display panels, when two subpixels of the same specific color are sequentially arranged in the same row with N (N odd number) subpixels therebetween, the polarities of the subpixels of the specific color in the row are the same when the display is performed by single-column inversion, which also causes the problem of row crosstalk. In this case, the above arrangement can also be adopted, the shielding signal line 16 is arranged above the data line connected to the pixel electrode of the sub-pixel of the specific color (the touch signal line 15 is arranged on the other data line), and at this time, the sub-pixels of N columns are arranged between two adjacent shielding signal lines 16, so as to solve the problem of the row crosstalk caused by the same polarity of the sub-pixels of the specific color in the same row in the display process of the display panel.

Other related arrangements of the shield signal line 16 will be further described below.

In some possible implementations, as shown in fig. 8, the common electrode 13 may remain a portion located directly above the shielding signal line 15. In some possible implementations, as shown in fig. 9, the common electrode 13 may remove a portion directly above the shielding signal line 15, that is, the common electrode 13 is provided with a hollow portion S in a region directly opposite to the shielding signal line 13.

In the above-mentioned technical solution in which the common electrode 13 is left right above the shielding signal line 15, when a data signal is applied to the data line 12, the shielding signal line 15 easily causes secondary coupling to the common electrode 13. In contrast, the technical solution that the common electrode 12 is provided with the hollow portion S directly above the shielding signal line 15 can reduce the secondary coupling of the common electrode 12 caused by the data signal loaded on the data line 12.

Illustratively, in some embodiments, only the portion connected between the corresponding left and right subpixel regions in the region where the common electrode 13 is directly opposite to the shielding signal line 13 may be remained, and all the others may be removed, so as to reduce the secondary coupling of the common electrode 12 caused by the data signal loaded on the data line 12 to the greatest extent.

In some possible implementation manners, in order to simplify the manufacturing process and reduce the manufacturing cost, as shown in fig. 7, the touch signal line 15 and the shielding signal line 16 may be made of the same material in the same layer; namely, the touch signal line 15 and the shielding signal line 16 are manufactured by the same manufacturing process; this is explained below as an example.

Illustratively, in some possible implementation manners, the touch signal line 15 and the shielding signal line 16 are made of the same metal film through processes such as exposure, development, etching, and stripping.

In some possible implementations, as shown in fig. 10, two ends of all the shielding signal lines 16 located in the opening area 01 may be connected laterally (i.e., along the row direction XX') by a connection portion L1 located in the non-opening area 02, so as to reduce the magnitude of the coupling voltage generated by the data signal loaded on the data line to the shielding signal lines, and simultaneously, ensure that the potential of the shielding signal lines can be quickly restored to the original potential.

Schematically, as shown in fig. 10, in some possible implementations, the connection portion L1 at the upper end of the shielding signal line 16 may be made of the same material as the shielding signal line 16, that is, the connection portion L1 at the upper end of the shielding signal line 16 and the shielding signal line 16 are made by the same manufacturing process; the connection portion L1 at the lower end of the shielding signal line 16 may be made of the same material as the common electrode 13, that is, the connection portion L1 at the lower end of the shielding signal line 16 and the common electrode 13 are made by the same manufacturing process.

In some possible implementations, as shown in fig. 11, among all the shielding signal lines 16 located in the opening area 01, a plurality of shielding signal lines 16 which are adjacent in sequence in the row direction XX 'form a shielding unit C, and both ends of the plurality of shielding signal lines 16 in the shielding unit C are connected laterally (i.e., in the row direction XX') by a connecting portion L2 located in the non-opening area 02; the shielding signal lines 16 in different shielding units C are independently arranged, that is, the shielding units C are independently arranged, and no electrical connection occurs. Therefore, on one hand, the coupling voltage amplitude of the data signal loaded on the data line to the shielding signal line is reduced, and the shielding signal line can be rapidly restored to the original potential; on the other hand, the high coupling voltage amplitude generated by the data signal loaded on the data line of the local area to the shielding signal line is avoided, the voltage of the shielding signal line of the adjacent area is raised, and the influence on the shielding signal line of the adjacent area is also avoided.

Schematically, as shown in fig. 11, in some possible implementations, the connection portion L2 at the upper end of the shielding unit C may be made of the same material as the shielding signal line 16, that is, the connection portion L2 at the upper end of the shielding unit C and the shielding signal line 16 are made by the same manufacturing process; the connection portion L2 at the lower end of the shielding unit C may be made of the same material as the common electrode 13, that is, the connection portion L2 at the lower end of the shielding unit C and the common electrode 13 are made by the same manufacturing process.

In some possible implementations, in order to further ensure that the shielding signal lines can be quickly restored to the original potential, as shown in fig. 12 (referring to the label in fig. 11 for the opening area 01 and the non-opening area 02), a plurality of adjacent shielding signal lines 16 may be arranged to be connected transversely (i.e., along the row direction XX') by a connecting portion L3 located in the opening area 01.

Illustratively, as shown in fig. 12, in some possible implementations, the common electrode 13 is disposed in blocks (i.e., each block is connected to the corresponding touch signal line 15 as a touch electrode), the connection portion L3 may be disposed in an area between the common electrodes (i.e., the touch electrodes) of adjacent blocks in the same column, and the connection portion L3 and the shielding signal line 16 are formed by the same manufacturing process (i.e., the connection portion L3 and the shielding signal line 16 are made of the same material). In addition, the connection portion L1 at the upper end of the shielding signal line 16 and the shielding signal line 16 may be formed by the same manufacturing process (i.e., the connection portion L1 at the upper end of the shielding signal line 16 and the shielding signal line 16 are the same layer and the same material), and the connection portion L1 at the lower end of the shielding signal line 16 and the common electrode 13 may be formed by the same manufacturing process (i.e., the connection portion L1 at the lower end of the shielding signal line 16 and the common electrode 13 may be the same layer and the same material).

For the connecting parts L1 and L2 located in the non-opening area 02, the connecting parts L1 and L2 and the shielding signal line 16 can be arranged in different layers according to the actual wiring requirement of the array substrate and are respectively manufactured by two manufacturing processes; the connection portions L1 and L2 may be provided in the same layer as the shield signal line 16 and manufactured by a single manufacturing process.

In some possible implementation manners, as shown in fig. 4, the width of the shielding signal line 15 may be set to be greater than the width of the data line 12, that is, the orthographic projection of the shielding signal line 15 on the substrate 11 covers the orthographic projection of the data line 12 on the substrate 11, so as to ensure that the shielding effect of the shielding signal line on the data signal on the data line is effectively ensured, and the coupling degree of the data signal on the data line to the common electrode is effectively reduced.

In some possible implementation manners, as shown in fig. 13, a surface of the shielding signal line 16 on a side facing the data line 12 may be provided to be convex toward the common electrode 13 in a width direction, that is, a lower surface of the shielding signal line 16 is convex upward, and as for an upper surface of the shielding signal line 16, the application is not particularly limited, and the upper surface may be a plane, and may also be a curved surface convex toward the common electrode 13.

In this case, on one hand, since the lower surface of the shielding signal line protrudes upwards, the lateral coupling electric field of the data line can be blocked, and the coupling degree of the data signal on the data line to the common electrode can be effectively reduced; on the other hand, the shielding signal line 16 is an independent electrically connected signal, and can apply a slight reverse voltage difference when the data line transmits a signal, so that the data line can transmit a data signal (see Vdata in fig. 14), and when the common electrode is coupled, the voltage (see V16 in fig. 14) of the shielding signal line is used to slightly pull the common electrode in the reverse direction, so that the portion of the data line generating the lateral coupling electric field to the common electrode can be corrected back through the shielding signal line 16.

It should be noted here that, for the shielding signal line 16 with the above-mentioned bump structure, it is understood that the shielding signal line 16 is made of a metal material, and insulating layers are inevitably disposed above and below the shielding signal line 16, so as to avoid the shielding signal line 16 from being electrically connected with other conductive patterns in the array substrate 1. Schematically, referring to fig. 13, in some possible implementations, before the shielding signal line 16 is fabricated, an insulating layer 17 having a convex structure may be formed in a region where the shielding signal line 16 is to be fabricated by using a semi-transparent mask (i.e., a halftone mask); then, a metal thin film is formed on the insulating layer 17, and the shielded signal lines 16 protruding in the width direction are formed by a patterning process (including exposure, development, etching, peeling, and the like).

In addition, the insulating layer in the array substrate may adopt one or both of an organic insulating material and an inorganic insulating material. Illustratively, the organic insulating material may include an organic resin material; the inorganic insulating material may include one or more of silicon nitride, silicon oxide, and silicon oxynitride.

On this basis, as shown in fig. 15, the array substrate 01 is provided with an alignment film (not shown) on the side of the uppermost layer contacting the liquid crystal layer 03, and the alignment film controls the alignment direction of the liquid crystal molecules Lc in the liquid crystal layer. Since the thickness of the shielding signal line 16 is larger than that of the insulating layer on the upper layer, the alignment film on the uppermost layer is bumped at a position corresponding to the shielding signal line 16.

In this case, in order to avoid relative displacement between the opposing-cell substrate 2 and the array substrate 1, rubbing between the photo-etching gap Pillar (PS) 20 disposed on the side of the opposing-cell substrate 2 close to the liquid crystal layer 3 and the alignment film of the array substrate 1 at the position corresponding to the shielding signal line 16 is easily caused, which causes damage to the alignment film, and thus causes mura in the display screen, which may also be referred to as gap pillar display anomaly (PS mura).

In order to solve the above technical problem, as shown in fig. 15, in some embodiments of the present application, the photolithography gap pillar 20 on the pair box substrate 2 may be disposed opposite to the position of the shielding signal line 16 on the array substrate 1, that is, in the display panel, the photolithography gap pillar 20 on the pair box substrate 2 is disposed right above the shielding signal line 16 on the array substrate 01.

It should be understood herein that, as shown with reference to fig. 15, the lithographic gap post 20 may generally include a main gap post 21(main PS) and a sub gap post 22(sub PS); after the box alignment substrate 2 and the array substrate 1 are aligned, the array substrate 1 is in direct contact with the main gap column 21 located right above the main gap column 21 and is not in contact with the auxiliary gap column 22 at the position corresponding to the main gap column 21; that is, the main gap pillar 21 directly abuts against the alignment film of the array substrate 1 at the position corresponding to the main gap pillar 21 as an abutting structure, so that friction between the main gap pillar 21 and the alignment film is avoided, and PS mura of the display screen is avoided.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (14)

1. An array substrate is characterized by comprising a substrate, and a data line, a common electrode, a touch signal line and a shielding signal line which are arranged on the substrate and positioned in an opening area;

the common electrode is positioned on one side of the data line, which is far away from the substrate; the touch signal line and the shielding signal line are positioned between the data line and the common electrode;

the touch signal line and the shielding signal line are consistent with the extending direction of the data line, and the touch signal line and the shielding signal line are arranged opposite to the data line; the touch signal line and the shielding signal line correspond to different data lines.

2. The array substrate of claim 1, wherein each of the data lines is disposed opposite to the touch signal line or opposite to the shielding signal line.

3. The array substrate of claim 1 or 2, wherein the width of the shielding signal line is larger than the width of the data line.

4. The array substrate of claim 1, further comprising: pixel electrodes respectively located in the opening region and in a plurality of sub-pixels arranged in a matrix; the pixel electrode comprises a strip-shaped sub-electrode;

the pixel electrodes in the sub-pixels in the same column are connected with the same data line;

the data lines which are arranged opposite to the shielding signal lines are first data lines, N rows of sub-pixels are arranged between every two adjacent first data lines at intervals, and N is an odd number;

and the pixel electrodes which are positioned in the same row and connected with the adjacent two first data lines are positioned in two sub-pixels with the same color which are sequentially arranged in the sub-pixels in the row.

5. The array substrate of claim 4, wherein the plurality of sub-pixels arranged in a matrix are divided into a plurality of first pixel units and a plurality of second pixel units, and the first pixel units and the second pixel units are alternately arranged in sequence in the row direction and the column direction;

the first pixel unit includes: the red sub-pixels, the green sub-pixels and the blue sub-pixels are sequentially arranged along the row direction; the second pixel unit includes: the red sub-pixels, the green sub-pixels and the white sub-pixels are sequentially arranged along the row direction;

the first data line is connected with pixel electrodes in the blue sub-pixels and the white sub-pixels which are positioned in the same column and are sequentially and alternately arranged.

6. The array substrate of claim 4 or 5, wherein the pixel electrode is located on a side of the common electrode facing away from the substrate; the common electrode includes a planar sub-electrode in each sub-pixel.

7. The array substrate of claim 1, wherein the common electrode is provided with a hollow portion in a region directly opposite to the shielding signal line.

8. The array substrate of claim 1, wherein a surface of the shielding signal line on a side facing the data line is convex to the common electrode side in a width direction.

9. The array substrate of claim 1, wherein the two ends of all the shielding signal lines are connected laterally by a connecting portion located at a non-opening area;

or, in all the shielding signal lines, a plurality of shielding signal lines which are adjacent in sequence in the row direction form a shielding unit, and two ends of the plurality of shielding signal lines in the shielding unit are transversely connected through a connecting part positioned in a non-opening area; the shielding signal lines in different shielding units are independently arranged.

10. The array substrate of claim 9, wherein adjacent ones of the shielding signal lines are laterally connected by a connecting portion located in the opening area.

11. The array substrate of claim 1, wherein the touch signal line and the shielding signal line are made of the same material in the same layer.

12. A display panel comprising the array substrate according to any one of claims 1 to 11, a cell-to-cell substrate, and a liquid crystal layer between the array substrate and the cell-to-cell substrate.

13. The display panel according to claim 12, wherein the pair of cell substrates are provided with a photolithography gap pillar on a side facing the array substrate, and the photolithography gap pillar is opposite to a region on the array substrate where the shielding signal line is provided.

14. A display device comprising a backlight module and the display panel of claim 12 or 13, wherein the display panel is located at the light-emitting side of the backlight module.

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