CN212484193U - Voltage regulating circuit and voltage regulator - Google Patents
Voltage regulating circuit and voltage regulator Download PDFInfo
- Publication number
- CN212484193U CN212484193U CN202020773553.1U CN202020773553U CN212484193U CN 212484193 U CN212484193 U CN 212484193U CN 202020773553 U CN202020773553 U CN 202020773553U CN 212484193 U CN212484193 U CN 212484193U
- Authority
- CN
- China
- Prior art keywords
- voltage
- capacitor
- node
- switching tube
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
Abstract
An embodiment of the utility model provides a voltage regulating circuit and voltage regulator for realize the function that steps up and step down simultaneously, simplify circuit structure, reduce cost, and reduce the voltage regulator volume. The circuit comprises: the capacitor branch comprises a first capacitor and a second capacitor which are connected in series, the second voltage input end is connected with the second voltage output end, a third capacitor and a fourth capacitor are connected between the second voltage input end and the first voltage output end in series, the first voltage input end is connected with a first node and a second node respectively, a first inductor is connected between the connection point of the second voltage input end and the third capacitor and the third node, and a second inductor is connected between the connection point of the first voltage output end and the fourth capacitor and the fourth node.
Description
Technical Field
The utility model relates to an alternating current voltage regulator field especially relates to a voltage regulating circuit and voltage regulator.
Background
The voltage regulator is generally used in scientific research, experiments, detection, heating and heat preservation, soft start and other occasions, and is used for providing different voltages for a load and enabling the voltages to be linearly regulated under the power-on condition.
In the prior art, there are three common methods for implementing an ac voltage regulator: the first is a voltage regulator structure of a contact transformer, which adopts a servo motor to drive an electric brush to move so as to change the turn ratio of the transformer and achieve the purpose of regulating the alternating current output voltage. However, due to the existence of the electric brush, the problems of poor contact caused by easy wear or electric sparks caused by voltage regulation are caused, and further, the voltage regulation response is slow, and frequent maintenance is required. In addition, the existence of the transformer causes the whole weight and the volume of the voltage regulator to be heavy. The second type is a contactless transformer voltage regulator structure, which uses silicon controlled rectifier as electronic switch to regulate the output voltage of the transformer. However, since the voltage regulation is staged, continuous voltage regulation cannot be realized, and thus the output accuracy is low. In addition, the transformer still exists, and the whole voltage regulator still weighs heavily, bulky. The third is a structure without transformer, one part of the voltage regulator adopts a switching tube high-frequency chopping mode to realize the regulation of alternating voltage, and most of the voltage regulator can only reduce voltage and can not realize a boosting function or can only realize boosting and can not realize a reducing function. Although some of the devices can realize voltage boosting and voltage reducing simultaneously, the devices have the disadvantages of complex circuit, more inductors and electronic tubes, high cost and large volume.
In summary, the ac voltage regulator in the prior art has the problems of incapability of simultaneously realizing voltage boosting and voltage reduction, complex circuit, high cost, large volume and the like.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a voltage regulating circuit and voltage regulator for realize the function that steps up and step down simultaneously, simplify circuit structure, reduce cost, and reduce the voltage regulator volume.
In a first aspect, an embodiment of the present invention provides a voltage regulation circuit, including: the capacitor branch circuit comprises a first capacitor and a second capacitor which are connected in series, the second voltage input end is connected with the second voltage output end, a third capacitor and a fourth capacitor are connected between the second voltage input end and the first voltage output end in series, the first voltage input end is respectively connected with a first node and a second node, a first inductor is connected between the connection point of the second voltage input end and the third capacitor and the third node, and a second inductor is connected between the connection point of the first voltage output end and the fourth capacitor and the fourth node;
the first node is a middle node of a first capacitor and a second capacitor, the second node is a middle node of a third capacitor and a fourth capacitor, the third node is a middle node of two switching tubes connected in series in a first switching tube bridge arm, and the fourth node is a middle node of two switching tubes connected in series in a second switching tube bridge arm.
The embodiment of the utility model provides a voltage regulation circuit includes: the capacitor branch comprises a first capacitor and a second capacitor which are connected in series, the second voltage input end is connected with the second voltage output end, a third capacitor and a fourth capacitor are connected between the second voltage input end and the first voltage output end in series, the first voltage input end is connected with a first node and a second node respectively, a first inductor is connected between the connection point of the second voltage input end and the third capacitor and the third node, and a second inductor is connected between the connection point of the first voltage output end and the fourth capacitor and the fourth node. Compared with the prior art, the voltage boosting and reducing function can be realized simultaneously, and the voltage regulating range is wide; the device has a voltage harmonic compensation function, and can improve the sine degree of the alternating voltage; meanwhile, the circuit has simple topology, few devices and low cost, and can further reduce the volume of the voltage regulator.
In one possible embodiment, the first switching tube bridge arm comprises a first switching tube and a second switching tube connected in series.
In one possible embodiment, a diode is connected between the source and the drain of the first switching tube in anti-parallel, and a diode is connected between the source and the drain of the second switching tube in anti-parallel.
In one possible embodiment, the second switching tube bridge arm includes a third switching tube and a fourth switching tube connected in series.
In one possible implementation, a diode is connected between the source and the drain of the third switching tube in an anti-parallel manner, and a diode is connected between the source and the drain of the fourth switching tube in an anti-parallel manner.
In one possible implementation, the circuit further includes: and one end of the third switching tube bridge arm is connected with the fourth node, and the other end of the third switching tube bridge arm is connected with a connecting line of the first node and the second node.
In a possible implementation manner, the third switching tube bridge arm includes a fifth switching tube and a sixth switching tube connected in series, a drain of the fifth switching tube is connected to a connection line of the first node and the second node, a source of the fifth switching tube is connected to a source of the sixth switching tube, and a drain of the sixth switching tube is connected to the fourth node.
In one possible implementation, a diode is connected between the source and the drain of the fifth switching tube in an anti-parallel manner, and a diode is connected between the source and the drain of the sixth switching tube in an anti-parallel manner.
In one possible embodiment, the second voltage input is connected to the neutral line of the alternating current.
In a second aspect, the embodiment of the present invention further provides a voltage regulator, including if the embodiment of the present invention provides a voltage regulating circuit.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
fig. 1 is a schematic structural diagram of an energy absorption circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a topology of an energy absorption circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of an energy absorption circuit according to an embodiment of the present invention;
fig. 4 is a schematic diagram of another energy absorption circuit provided by an embodiment of the present invention;
fig. 5 is a schematic diagram of another energy absorption circuit provided by an embodiment of the present invention;
fig. 6 is a schematic diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 10 is a schematic diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another energy absorption circuit according to an embodiment of the present invention;
fig. 12 is a schematic diagram of a topology of another energy absorption circuit according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described with reference to the accompanying drawings, and it should be understood that the embodiments described herein are merely illustrative and explanatory of the present invention, and are not restrictive of the invention.
In view of the ac voltage regulator ubiquitous among the prior art is bulky, with high costs, the complicated scheduling problem of circuit, the embodiment of the utility model provides a voltage regulating circuit for realize the function of stepping up and step-down simultaneously, simplify circuit structure, reduce cost, and reduce the voltage regulator volume.
The circuit provided by the embodiment of the present invention is described in detail below with reference to the accompanying drawings.
Example one
As shown in fig. 1, an embodiment of the present invention provides a voltage regulating circuit, including: the first voltage input end Lin1, the second voltage input end Lin2, the first voltage output end Lout1, the second voltage output end Lout2, and a first switching tube bridge arm, a capacitance branch and a second switching tube bridge arm which are connected in parallel, wherein the capacitance branch comprises a first capacitor C1 and a second capacitor C2 which are connected in series, the second voltage input end Lin2 is connected with the second voltage output end Lout2, a third capacitor C3 and a fourth capacitor C4 are connected between the second voltage input end Lin2 and the first voltage output end Lout1 in series, the first voltage input end Lin1 is respectively connected with a first node A1 and a second node A2, a first inductor L1 is connected between the connection point of the second voltage input end Lin2 and the third capacitor C3 and a third node A3, and a second inductor L2 is connected between the connection point of the first voltage output end Lin1 and the fourth capacitor C4 and a fourth node A4;
the first node a1 is a middle node between a first capacitor C1 and a second capacitor C2, the second node a2 is a middle node between a third capacitor C3 and a fourth capacitor C4, the third node A3 is a middle node between two switching tubes connected in series in the first switching tube bridge arm, and the fourth node a4 is a middle node between two switching tubes connected in series in the second switching tube bridge arm.
In one possible implementation, the first switch tube bridge arm includes a first switch tube Q1 and a second switch tube Q2 connected in series.
In one possible embodiment, a diode is connected between the source and the drain of the first switching tube Q1 in anti-parallel, and a diode is connected between the source and the drain of the second switching tube Q2 in anti-parallel.
In one possible embodiment, the second switching tube bridge arm includes a third switching tube Q3 and a fourth switching tube Q4 connected in series.
In one possible implementation, a diode is connected between the source and the drain of the third switching tube Q3 in anti-parallel, and a diode is connected between the source and the drain of the fourth switching tube Q4 in anti-parallel.
In one possible embodiment, the second voltage input Lin2 is connected to the neutral line of the alternating current.
When the specific implementation, the embodiment of the utility model provides a voltage regulating circuit can divide into following two parts according to the function: one part is a PFC (Power Factor Correction) circuit, which is used to store energy for the first capacitor C1 and the second capacitor C2, and is composed of a first switch tube Q1, a second switch tube Q2, a first inductor L1, a first capacitor C1, a second capacitor C2, and a third capacitor C3; the fourth capacitor C4 outputs various waveforms as required, and includes a third switching transistor Q3, a fourth switching transistor Q4, a second inductor L2, a first capacitor C1, a second capacitor C2, and a fourth capacitor C4. The first capacitor C1 and the second capacitor C2 are bus capacitors, C1 is a positive bus energy storage capacitor, C2 is a negative bus energy storage capacitor, and the PFC circuit and the INV circuit share the two capacitors.
The embodiment of the utility model provides a voltage regulation circuit's novelty lies in, first voltage input end Lin1 is connected to bus capacitor C1, C2 mid point, and the zero line of alternating current is connected to second voltage input end, and then voltage regulation circuit's first voltage output just equals third electric capacity C3's voltage, adds fourth electric capacity C4's voltage, and the equivalent circuit picture is as shown in FIG. 2. The voltage of the fourth capacitor C4 is controlled by the INV circuit part, any waveform can be output, positive voltage or negative voltage can be adopted, the voltage regulating circuit can complete alternating voltage compensation, stable voltage with proper sine degree can be output, and the voltage regulating function of voltage boosting and reducing can be realized.
The following describes the operation of the voltage regulating circuit according to an embodiment of the present invention with reference to the accompanying drawings.
Implementation mode one
When the input signal of the first voltage input end Lin1 is a sinusoidal positive voltage, the PFC circuit part stores energy into the first inductor L1 when the first switch tube Q1 is turned on; when the Q1 is turned off, the second capacitor C2 is charged through the diode of the second switch tube Q2.
As shown in fig. 3, when the first switch Q1 is turned on, the input signal sequentially passes through the first capacitor C1, the first switch Q1, the first inductor L1, the third capacitor C3 from the first voltage input end Lin1, and finally returns to the first voltage input end, wherein the first inductor L1 and the third capacitor C3 are further connected to the second voltage input end, and the second voltage input end is connected to the zero line.
As shown in fig. 4, when the first switch Q1 is turned off, the input signal sequentially passes through the second capacitor C2, the parallel diode of the second switch Q2, the first inductor L1, the third capacitor C3 from the first voltage input terminal Lin1, and finally returns to the first voltage input terminal, wherein the first inductor L1 and the third capacitor C3 are further connected to the second voltage input terminal, and the second voltage input terminal is connected to the zero line.
Second embodiment
When the input signal of the first voltage input end Lin1 is a sinusoidal negative voltage, the PFC circuit part stores energy into the first inductor L1 when the first switch tube Q2 is turned on; when the Q2 is turned off, the first capacitor C1 is charged through the diode of the first switch Q1.
As shown in fig. 5, when the second switch Q2 is turned on, the input signal sequentially passes through the third capacitor C3, the first inductor L1, the second switch Q2, the second capacitor C2 from the first voltage input end Lin1, and finally returns to the first voltage input end, wherein the first inductor L1 and the third capacitor C3 are further connected to the second voltage input end, and the second voltage input end is connected to the zero line.
As shown in fig. 6, when the first switch Q2 is turned off, the input signal sequentially passes through the third capacitor C3, the first inductor L1, the parallel diode of the first switch Q1, and the first capacitor C1 from the first voltage input terminal Lin1, and finally returns to the first voltage input terminal, where the first inductor L1 and the third capacitor C3 are further connected to the second voltage input terminal, and the second voltage input terminal is connected to the zero line.
Third embodiment
In specific implementation, the INV circuit portion may enable the fourth capacitor C4 to output a positive voltage or a negative voltage with any waveform according to circuit requirements, so as to compensate the voltage signal of the first voltage input terminal, thereby completing the voltage boosting or voltage reducing function. The operation of the INV circuit part outputting positive voltage will be described below by taking a sine wave as an example.
As shown in fig. 7, when the third switching tube Q3 is turned on, the input signal sequentially passes through the third switching tube Q3, the second inductor L2, the fourth capacitor C4, the second node a2, the first node a1 from the positive electrode of the first capacitor C1, and finally returns to the negative electrode of the first capacitor C1, thereby completing the energy storage process of the second inductor L2.
As shown in fig. 8, when the third switch Q3 is turned off, the input signal sequentially passes through the parallel diodes of the fourth capacitor C4, the second node a2, the first node a1, the second capacitor C2, and the fourth switch Q4 from the second inductor L2, and finally returns to the second inductor L2, thereby completing the freewheeling process of the second inductor L2.
Note that when the INV circuit portion outputs a positive voltage, if the input signal of the first voltage input terminal Lin1 is a positive voltage at this time, the output signal of the first voltage output terminal appears to be boosted; if the input signal of the first voltage input terminal Lin1 is a negative voltage at this time, the output signal of the first voltage output terminal Lout1 appears as a step-down.
Embodiment IV
In specific implementation, the INV circuit portion may enable the fourth capacitor C4 to output a positive voltage or a negative voltage with any waveform according to circuit requirements, so as to compensate the voltage signal of the first voltage input terminal, thereby completing the voltage boosting or voltage reducing function. The operation of the INV circuit portion outputting negative voltage will be described below by taking a sine wave as an example.
As shown in fig. 9, when the fourth switch Q4 is turned on, the input signal sequentially passes through the first node a1, the second node a2, the fourth capacitor C4, the second inductor L2, and the fourth switch Q4 from the positive electrode of the second capacitor C2, and finally returns to the negative electrode of the second capacitor C2, thereby completing the energy storage process of the second inductor L2.
As shown in fig. 10, when the fourth switching tube Q4 is turned off, the input signal sequentially passes through the parallel diode of the third switching tube Q3, the first capacitor C1, the first node a1, the second node a2, and the fourth capacitor C4 from the second inductor L2, and finally returns to the second inductor L2, thereby completing the freewheeling process of the second inductor L2.
It should be noted that when the INV circuit portion outputs a negative voltage, if the input signal of the first voltage input terminal Lin1 is a positive voltage at this time, the output signal of the first voltage output terminal appears as a step-down; if the input signal of the first voltage input terminal Lin1 is a negative voltage at this time, the output signal of the first voltage output terminal Lout1 appears as a boosted voltage.
Example two
As shown in fig. 11, an embodiment of the present invention provides a voltage regulating circuit, including: the first voltage input end Lin1, the second voltage input end Lin2, the first voltage output end Lout1, the second voltage output end Lout2, and a first switching tube bridge arm, a capacitance branch and a second switching tube bridge arm which are connected in parallel, wherein the capacitance branch comprises a first capacitor C1 and a second capacitor C2 which are connected in series, the second voltage input end Lin2 is connected with the second voltage output end Lout2, a third capacitor C3 and a fourth capacitor C4 are connected between the second voltage input end Lin2 and the first voltage output end Lout1 in series, the first voltage input end Lin1 is respectively connected with a first node A1 and a second node A2, a first inductor L1 is connected between the connection point of the second voltage input end Lin2 and the third capacitor C3 and a third node A3, and a second inductor L2 is connected between the connection point of the first voltage output end Lin1 and the fourth capacitor C4 and a fourth node A4;
the first node a1 is a middle node between a first capacitor C1 and a second capacitor C2, the second node a2 is a middle node between a third capacitor C3 and a fourth capacitor C4, the third node A3 is a middle node between two switching tubes connected in series in the first switching tube bridge arm, and the fourth node a4 is a middle node between two switching tubes connected in series in the second switching tube bridge arm.
In one possible implementation, the first switch tube bridge arm includes a first switch tube Q1 and a second switch tube Q2 connected in series.
In one possible embodiment, a diode is connected between the source and the drain of the first switching tube Q1 in anti-parallel, and a diode is connected between the source and the drain of the second switching tube Q2 in anti-parallel.
In one possible embodiment, the second switching tube bridge arm includes a third switching tube Q3 and a fourth switching tube Q4 connected in series.
In one possible implementation, a diode is connected between the source and the drain of the third switching tube Q3 in anti-parallel, and a diode is connected between the source and the drain of the fourth switching tube Q4 in anti-parallel.
In one possible implementation, the circuit further includes: and one end of the third switching tube bridge arm is connected with the fourth node A4, and the other end of the third switching tube bridge arm is connected with a connecting line of the first node A1 and the second node A2.
In a possible implementation, the third switching tube bridge arm includes a fifth switching tube Q5 and a sixth switching tube Q6 connected in series, a drain of the fifth switching tube Q5 is connected to a connection line between the first node a1 and the second node a2, a source of the fifth switching tube Q5 is connected to a source of the sixth switching tube Q6, and a drain of the sixth switching tube Q6 is connected to the fourth node a 4.
In one possible implementation, a diode is connected between the source and the drain of the fifth switching tube Q5 in anti-parallel, and a diode is connected between the source and the drain of the sixth switching tube Q6 in anti-parallel.
In one possible embodiment, the second voltage input Lin2 is connected to the neutral line of the alternating current.
EXAMPLE III
In a possible implementation manner, the INV circuit portion of the voltage regulation circuit provided in the embodiment of the present invention may also be connected in parallel to two ends of the fourth capacitor C4, as shown in fig. 12.
Based on the above-mentioned the utility model discloses the embodiment thinks the same, the embodiment of the utility model provides a still provides a voltage regulator, include if the embodiment of the utility model provides a voltage regulating circuit.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A voltage regulation circuit, comprising: the capacitive load circuit comprises a first voltage input end, a second voltage input end, a first voltage output end, a second voltage output end, and a first switching tube bridge arm, a capacitive branch and a second switching tube bridge arm which are connected in parallel, wherein the capacitive branch comprises a first capacitor and a second capacitor which are connected in series, the second voltage input end is connected with the second voltage output end, a third capacitor and a fourth capacitor are connected in series between the second voltage input end and the first voltage output end, the first voltage input end is respectively connected with a first node and a second node, a first inductor is connected between the connection point of the second voltage input end and the third capacitor and the third node, and a second inductor is connected between the connection point of the first voltage output end and the fourth capacitor and the fourth node;
the first node is a middle node between the first capacitor and the second capacitor, the second node is a middle node between the third capacitor and the fourth capacitor, the third node is a middle node between two switching tubes connected in series in the first switching tube bridge arm, and the fourth node is a middle node between two switching tubes connected in series in the second switching tube bridge arm.
2. The circuit of claim 1, wherein the first switch tube bridge arm comprises a first switch tube and a second switch tube connected in series.
3. The circuit of claim 2, wherein a diode is connected between the source and the drain of the first switch tube in anti-parallel, and a diode is connected between the source and the drain of the second switch tube in anti-parallel.
4. The circuit of claim 1, wherein the second switch tube bridge arm comprises a third switch tube and a fourth switch tube connected in series.
5. The circuit as claimed in claim 4, wherein a diode is connected between the source and the drain of the third switching tube in an anti-parallel manner, and a diode is connected between the source and the drain of the fourth switching tube in an anti-parallel manner.
6. The circuit of claim 1, further comprising: and one end of the third switching tube bridge arm is connected with the fourth node, and the other end of the third switching tube bridge arm is connected with a connecting line of the first node and the second node.
7. The circuit of claim 6, wherein the third switching tube bridge arm comprises a fifth switching tube and a sixth switching tube connected in series, a drain of the fifth switching tube is connected to a connection line between the first node and the second node, a source of the fifth switching tube is connected to a source of the sixth switching tube, and a drain of the sixth switching tube is connected to the fourth node.
8. The circuit as claimed in claim 7, wherein a diode is connected between the source and the drain of the fifth switching tube in anti-parallel, and a diode is connected between the source and the drain of the sixth switching tube in anti-parallel.
9. The circuit of claim 1 wherein the second voltage input is connected to the neutral line of alternating current.
10. A voltage regulator, characterized in that it comprises a voltage regulation circuit according to any one of claims 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020773553.1U CN212484193U (en) | 2020-05-11 | 2020-05-11 | Voltage regulating circuit and voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020773553.1U CN212484193U (en) | 2020-05-11 | 2020-05-11 | Voltage regulating circuit and voltage regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212484193U true CN212484193U (en) | 2021-02-05 |
Family
ID=74460655
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020773553.1U Active CN212484193U (en) | 2020-05-11 | 2020-05-11 | Voltage regulating circuit and voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212484193U (en) |
-
2020
- 2020-05-11 CN CN202020773553.1U patent/CN212484193U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN201789430U (en) | Inverter | |
| CN109302119B (en) | Control method, controller and system for full-period low-common-mode voltage operation | |
| CN107210684A (en) | Five level topology units and five-electrical level inverter | |
| US10361626B2 (en) | Multi-level power factor correction circuit using hybrid devices | |
| CN110915117A (en) | Multi-buck single-boost optimizer | |
| CN111722662A (en) | Voltage regulating circuit and voltage regulator | |
| CN108667124B (en) | Multi-state PWM command for 3-level inverter | |
| CN102684472A (en) | Three-phase power factor correction circuit device | |
| CN112202322B (en) | Method for inhibiting secondary ripple current based on equivalent zero impedance of active negative capacitor | |
| US9455624B2 (en) | Power supply with power factor correction circuit | |
| CN212484193U (en) | Voltage regulating circuit and voltage regulator | |
| RU2012130138A (en) | METHOD FOR CONTROL OF DIRECT CONVERTER AND DEVICE FOR ITS IMPLEMENTATION | |
| Kusumah et al. | A direct three-phase to single-phase AC/AC converter for contactless electric vehicle charger | |
| Sathiyanathan et al. | Multi-input and multi-output bi-directional power converter for solar photovoltaic system | |
| Öztürk et al. | Zero-current switching technique for constant voltage constant frequency sinusoidal PWM inverter | |
| CN211377892U (en) | Power supply unit and power factor correction circuit thereof | |
| CN211655748U (en) | Single-phase voltage regulating circuit and charging equipment | |
| Tiwari et al. | An interleaved multilevel converter for onboard EV charging application | |
| Megahed | Increasing efficiency and power factor for power supplies using parallel Flyback converter | |
| CN112054696A (en) | Multilevel converter optimization control method and device based on minimum backflow power | |
| CN115021603B (en) | ANPC circuit, control method, device, equipment and medium | |
| CN110912193B (en) | Micro-inverter alternating current side power coupling system and control method | |
| CN112290816B (en) | Integrated circuit for controlling three-level inverter | |
| Zhang et al. | Predictive control method for secondary ripple suppression of two-stage single-phase inverter | |
| Oren et al. | Modeling, Simulation, and Experimental Validation of Broad Input Output Range Three Voltage Level Rectifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |