CN212461141U

CN212461141U - Embedded intelligent voice controller

Info

Publication number: CN212461141U
Application number: CN202020635334.7U
Authority: CN
Inventors: 陈明洋; 谭科华; 刘星; 魏佳英; 张棚
Original assignee: Panzhihua University
Current assignee: Panzhihua University
Priority date: 2020-04-24
Filing date: 2020-04-24
Publication date: 2021-02-02
Anticipated expiration: 2030-04-24

Abstract

The utility model relates to a speech control technique, it discloses a can be applicable to the embedded intelligent speech controller of miniaturization, low cost in little control fields such as intelligent house, consumer electronics. The voice recognition system comprises a voice recognition module, an audio decoding output module and a main control module; the voice recognition module is communicated with the main control module through an SPI protocol, and the main control module is connected with the audio decoding output module through a serial port; the voice recognition module is used for analyzing and extracting characteristics of voice input of a user, obtaining a voice recognition result through matching a keyword list and transmitting the voice recognition result to the main control module; and the main control module controls corresponding execution equipment to execute corresponding actions according to the voice recognition result and controls the audio decoding output module to output corresponding audio prompt contents.

Description

Embedded intelligent voice controller

Technical Field

The utility model relates to a voice control technique, concretely relates to embedded intelligent voice controller, the little control field such as specially adapted intelligence house, consumer electronics.

Background

With the continuous development of the internet of things technology, people have higher and higher requirements on convenience, quick action and flexibility of a controller, and complicated traditional keyboard and button operations cannot meet the requirements, so that a more convenient, more intelligent and more humanized man-machine control mode is urgently needed to be established. Under the background, an intelligent voice recognition control technology free from the constraint of two hands is developed. The method is a novel man-machine interaction mode based on voice acquisition. However, the current mainstream voice control technology is a database comparison scheme based on a PC statistical model, which has a large computation amount, has high requirements on the device memory and the computation speed, and is high in cost.

Embedded voice control refers to the implementation of voice recognition control techniques at board level or chip level using software or hardware using various advanced microprocessors. Compared with the voice control based on a PC (personal computer), the embedded voice control has the advantages of small volume, low power consumption, high reliability, low cost, flexible installation and the like although the running speed and the memory capacity are limited to a certain extent.

Therefore, it is necessary to provide a small-sized and low-cost embedded intelligent voice controller and a control method thereof, which are applicable to the field of micro control such as smart home and consumer electronics.

SUMMERY OF THE UTILITY MODEL

The utility model discloses the technical problem that will solve is: a miniaturized and low-cost embedded intelligent voice controller applicable to the field of micro control such as intelligent home and consumer electronics is provided.

The utility model provides a technical scheme that above-mentioned technical problem adopted is:

an embedded intelligent voice controller comprises a voice recognition module, an audio decoding output module and a main control module; the voice recognition module is communicated with the main control module through an SPI protocol, and the main control module is connected with the audio decoding output module through a serial port; the voice recognition module is used for analyzing and extracting characteristics of voice input of a user, obtaining a voice recognition result through matching a keyword list and transmitting the voice recognition result to the main control module; and the main control module controls corresponding execution equipment to execute corresponding actions according to the voice recognition result and controls the audio decoding output module to output corresponding audio prompt contents.

As a further optimization, the master control module comprises: the circuit comprises a singlechip, a program interface, first to fourth capacitors C1-C4, a first crystal oscillator Y1, a second crystal oscillator Y2, a ninth capacitor C9, a ninth resistor R9, a fifth resistor R5, a third diode D3 and a key S1; two ends of the first crystal oscillator Y1 are respectively connected with a PC14 pin and a PC15 pin of the single chip microcomputer and are respectively grounded through a first capacitor C1 and a second capacitor C2; two ends of the second crystal oscillator Y2 are respectively connected with a PD0 pin and a PD1 pin of the single chip microcomputer and are respectively grounded through a fourth capacitor C4 and a ninth capacitor C9; the ninth resistor R9 is connected in parallel across the second crystal oscillator Y2; the anode of the third diode D3 is connected with the 4 pins of the program interface, and the cathode is connected with the ground through a fifth resistor R5; the pin 1 of the program interface is grounded, and the

pins

2 and 3 are respectively connected with a PA14 pin and a PA13 pin of the singlechip; one end of the third resistor R3 is connected with the 4 pins of the program interface, and the other end is grounded through a third capacitor C3; one end of the key S1 is connected with the NRST pin of the singlechip, and the other end is grounded.

As further optimization, the single chip microcomputer adopts an STM32F103C8T6 chip.

As a further optimization, the speech recognition module comprises: the voice recognition chip comprises a first resistor R1, a second resistor R2, a fourth resistor R4, sixth to eighth resistors R6-R8, tenth to twentieth resistors R10-R20, twenty-second to twenty-seventh resistors R22-R27, a microphone, fifth to seventh capacitors C5-C7, tenth to fourteenth capacitors C10-C14, twentieth to twenty-second capacitors C20-C22, twenty-fourth to twenty-sixth capacitors C24-C26, a first diode D1, a second diode D2 and an inductor L1;

one end of each of the fourth resistor R4, the seventh resistor R7, the eighth resistor R8, the tenth resistor R10, the eleventh resistor R11, the thirteenth resistor R13, the fourteenth resistor R14 and the fifteenth resistor R15 is correspondingly connected with pins P0-P7 of the voice recognition chip, and the other end of each of the fourth resistor R4, the seventh resistor R7, the eighth resistor R8, the tenth resistor R10, the eleventh resistor R11, the thirteenth resistor R13, the fourteenth resistor R14 and; one end of the tenth capacitor, the fourteenth capacitor, C10-C14, is grounded after being connected in parallel, and the other end of the tenth capacitor, the fourteenth capacitor, C10-C14, is connected with the A0 pin of the voice recognition chip through a sixteenth resistor R16; one ends of the seventeenth resistor R17-the twentieth resistor R20 are respectively and correspondingly connected with an RDB pin, a WRB pin, a CSB pin and an RSTB pin of the voice recognition chip, and the other ends of the seventeenth resistor R17-the twentieth resistor R20 are respectively connected with a 3.3V voltage; one ends of the first resistor R1 and the second resistor R2 are both connected with 3.3V voltage, and the other ends are respectively connected to an RSV6 pin and an RSV7 pin of the voice recognition chip through a first diode D1 and a second diode D2; one ends of the fifth capacitor C5 and the seventh capacitor C7 are respectively connected to the MICP pin and the MICN pin of the voice recognition chip, the other ends of the fifth capacitor C5 and the seventh capacitor C7 are respectively connected to the anode and the cathode of the microphone, and the fifth capacitor C5 and the seventh capacitor C7 are respectively connected to two ends of a sixth capacitor C6 through a sixth resistor R6 and a twelfth resistor R12; one end of the fifteenth capacitor C15 is connected with an EQ1 pin of the voice recognition chip, and the other end of the fifteenth capacitor C15 is connected with a parallel circuit formed by a twenty-fifth resistor R25 and a twentieth capacitor C20 through a twenty-third resistor R23; the VREE pin of the voice recognition chip is grounded through a parallel circuit of a twenty-first capacitor C21 and a twenty-second capacitor C22; the VDDA pin of the voice recognition chip is grounded through a filter circuit consisting of an inductor L1 and twenty-fourth to twenty-sixth capacitors C24-C26.

As a further optimization, the voice recognition chip adopts an LD3320 chip.

As a further optimization, the audio decoding output module includes: the device comprises a flash chip, a voice decoding chip, a USB interface, a voltage stabilizing chip, a power amplifier module, sixteenth to nineteenth capacitors C16-C19, a twenty-first resistor R21, a twenty-sixth resistor R26, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a fourth diode D4, a fifth diode D5 and twenty-seventh to thirty-fifth capacitors C27-C31;

the pin D0 of the flash chip is connected with the pin P01 of the voice decoding chip through a twenty-first resistor R21, and the pin P02 of the voice decoding chip is grounded through a fourth diode D4 and a twenty-ninth resistor R29; a VCOM pin of the voice decoding chip is connected with a pin 5 of the USB interface through a eighteenth capacitor C28, and a pin 1 of the USB interface is connected with an input end of the voltage stabilizing chip through a fifth diode D5; the input end of the voltage stabilizing chip is grounded through a twenty-ninth capacitor C29; the output end of the voltage stabilizing chip is connected with the power supply ends of the flash chip and the voice decoding chip and is grounded through a parallel circuit of a thirtieth capacitor C30 and a thirty-first capacitor C31; one end of the nineteenth capacitor C19 and one end of the twenty-seventh capacitor C27 are respectively connected with the VMCU pin and the power supply end of the voice decoding chip, and the other ends are grounded; the IN + pin of the power amplification module is grounded through an eighteenth capacitor C18, and the IN-pin is connected with the DACR pin of the voice decoding chip through a twenty-sixth resistor R26 and a twenty-third capacitor C23; the VDD pin of the power amplifier module is grounded through a parallel circuit of a sixteenth capacitor C16 and a seventeenth capacitor C17, and the VO pin is connected with the IN-pin through a eighteenth resistor R28.

As a further optimization, the voice decoding chip adopts a JQ8400-FL audio hard decoding chip.

The utility model has the advantages that:

the embedded intelligent voice controller based on the structure of the utility model adopts the off-line voice acquisition chip LD3320 as the voice recognition module, adopts the non-specific voice recognition technology, does not need the user to carry out recording training, and can dynamically edit the recognition key word list, only needs to transmit the recognized key words into the chip in the form of character strings, and can take effect immediately in the next recognition; an STM32F103C8T6 micro control chip which is low in power consumption, offset in price and rich in IO interfaces is used as a main control, so that a PC (personal computer) of a traditional voice recognition control system is replaced, and execution equipment is controlled to execute corresponding actions according to a voice recognition result; the JQ8400-FL voice decoding chip is used as audio decoding output, corresponding voice prompts are output in a hard decoding mode, and the stability and the tone quality of the system are guaranteed so as to improve the user interaction experience. The embedded intelligent voice controller is simple in structure, low in implementation cost and small in size, and is particularly suitable for voice interaction control in the field of micro control of intelligent home, consumer electronics and the like.

Drawings

Fig. 1 is a schematic diagram of an embedded intelligent voice controller according to the present invention;

fig. 2 is a circuit structure diagram of the embedded intelligent voice controller of the present invention.

Detailed Description

The utility model aims at providing a can be applicable to the embedded intelligent speech controller of miniaturization, low cost in little control field such as intelligent house, consumer electronics. The embedded intelligent voice controller comprises a voice recognition module, an audio decoding output module and a main control module; the voice recognition module is communicated with the main control module through an SPI protocol, and the main control module is connected with the audio decoding output module through a serial port. The implementation principle is as shown in fig. 1, the voice recognition module LD3320 collects the voice input of the user,

analyzing and extracting characteristics, obtaining a voice recognition result through matching the keyword list, and transmitting the voice recognition result to an STM32 main control module through an SPI protocol; the STM32 main control module controls the peripheral circuit to execute corresponding action according to the voice recognition result, and controls the audio decoding output module JQ8400 to output corresponding audio prompt content through the serial port, and the audio prompt content is fed back to the user through the loudspeaker.

Example (b):

the circuit diagram of the embedded intelligent voice controller in this embodiment is shown in fig. 2, and each part is specifically described as follows:

1. a main control module: the main control module adopts STM32F103C8T6 chip based on ARM Cortex-M332 bit RISC kernel from ST company. The working frequency of the chip can reach 72MHz at most, a high-speed memory and abundant enhanced I/O ports are arranged in the chip, and reliable guarantee is provided for the controller to control peripheral circuits.

2. A voice recognition module: the voice recognition adopts an LD3320 chip. The LD3320 chip adopts a non-specific human voice recognition technology, and does not need a user to carry out recording training; the dynamically editable identification key word list can be immediately effective in the next identification only by transmitting the identified key words into the chip in the form of character strings; the method supports the user to freely edit 50 key word bars, namely, at most 50 key words are identified at the same time, and the terminal user can edit and update the contents of the 50 key words at any time according to scene needs, so that the method is applicable to control under various environments and various conditions.

The speech recognition processing process adopts the working mode of interrupt response. The priority of interruption is different, and the priority from high to low is set in sequence according to the importance of different events, so that the important events with high priority can be processed when the chip receives a plurality of voice instructions, and when the chip does not receive a voice signal, the chip automatically enters dormancy standby after a certain time.

In order to improve the identification accuracy, the LD3320 chip establishes a fault-tolerant sentence library and a garbage sentence library in an identification arithmetic unit inside the chip. In the operation identification, some garbage characteristic values are preset, and when the introduced characteristic values are similar to the preset garbage sentences, the operator directly serves as the garbage sentences for processing; when the incoming characteristic value is similar to the sentence in the fault-tolerant sentence library, the event with the closest similarity is processed, and therefore the misjudgment rate of recognition is reduced.

3. The audio decoding output module: the JQ8400-FL voice decoding chip is adopted, the chip adopts an SOC scheme, integrates a 16-bit MCU and an ADSP special for audio decoding, and adopts a hard decoding mode to further ensure the stability and tone quality of the system. In the aspect of voice content replacement, only the voice content in the SPI-flash needs to be replaced, and the problem that the voice can be replaced only by installing an upper computer on a traditional voice chip is simplified. On audio output, the STM32 master control and the JQ8400-FL transmit the audio identification code to be played in a serial port communication mode so as to achieve audio output.

In the hardware connection, the utility model discloses the collection input with pronunciation, well accuse are handled, the three module of speech output of processing result independently parts of innovation, have reduced the fault rate, have improved the processing speed and the precision of controller. The LD3320 and STM32 modules are connected and communicated through an SPI protocol, when an STM32 reads a recognized mark, corresponding equipment is controlled to act, and meanwhile, the JQ8400 and the STM32 serial port 2 of the voice output module are connected through serial port communication for voice prompt after voice recognition.

The working process of the embedded intelligent voice controller is as follows:

the LD3320 chip acquires a user voice segment input by a microphone by using an endpoint detection VAD technology, performs spectrum analysis on the voice segment, extracts voice features, matches the extracted voice features in a key word list, outputs a final voice recognition result by using a key word with the highest score in the key word list, transmits the recognition result to an STM32 main control through an SPI protocol, inquires a corresponding control command according to the recognition result by the STM32 main control, and sends the control command to a corresponding peripheral circuit so as to execute a corresponding control function, meanwhile, the STM32 main control transmits an identification code of audio content to be played to a JQ8400-FL voice decoding chip through a serial port, and the JQ8400-FL voice decoding chip performs hardware decoding and then drives a loudspeaker to play the corresponding audio content through an amplifying circuit.

Claims

1. An embedded intelligent voice controller is characterized in that,

the voice recognition system comprises a voice recognition module, an audio decoding output module and a main control module; the voice recognition module is communicated with the main control module through an SPI protocol, and the main control module is connected with the audio decoding output module through a serial port; the voice recognition module is used for analyzing and extracting characteristics of voice input of a user, obtaining a voice recognition result through matching a keyword list and transmitting the voice recognition result to the main control module; and the main control module controls corresponding execution equipment to execute corresponding actions according to the voice recognition result and controls the audio decoding output module to output corresponding audio prompt contents.

2. The embedded intelligent voice controller of claim 1,

the master control module comprises: the circuit comprises a single chip microcomputer, a program interface, first to fourth capacitors (C1-C4), a first crystal oscillator (Y1), a second crystal oscillator (Y2), a ninth capacitor (C9), a ninth resistor (R9), a fifth resistor (R5), a third resistor (R3), a third diode (D3) and a key (S1); two ends of the first crystal oscillator (Y1) are respectively connected with a pin PC14 and a pin PC15 of the single chip microcomputer and are respectively grounded through a first capacitor (C1) and a second capacitor (C2); two ends of the second crystal oscillator (Y2) are respectively connected with a PD0 pin and a PD1 pin of the single chip microcomputer and are respectively grounded through a fourth capacitor (C4) and a ninth capacitor (C9); the ninth resistor (R9) is connected in parallel with two ends of the second crystal oscillator (Y2); the anode of the third diode (D3) is connected with the 4 pins of the program interface, and the cathode of the third diode is grounded through a fifth resistor (R5); the pin 1 of the program interface is grounded, and the pins 2 and 3 are respectively connected with a PA14 pin and a PA13 pin of the singlechip; one end of the third resistor (R3) is connected with the 4 pins of the program interface, and the other end is grounded through a third capacitor (C3); one end of the key (S1) is connected with an NRST pin of the singlechip, and the other end of the key is grounded.

3. The embedded intelligent voice controller of claim 2,

the single chip microcomputer adopts an STM32F103C8T6 chip.

4. The embedded intelligent voice controller of claim 2,

the speech recognition module includes: the microphone comprises a voice recognition chip, a first resistor (R1), a second resistor (R2), a fourth resistor (R4), sixth to eighth resistors (R6-R8), tenth to twentieth resistors (R10-R20), twenty-second to twenty-seventh resistors (R22-R27), a microphone, fifth to seventh capacitors (C5-C7), tenth to fourteenth capacitors (C10-C14), twentieth to twenty-second capacitors (C20-C22), twenty-fourth to twenty-sixth capacitors (C24-C26), a first diode (D1), a second diode (D2) and an inductor (L1);

one end of each of the fourth resistor (R4), the seventh resistor (R7), the eighth resistor (R8), the tenth resistor (R10), the eleventh resistor (R11), the thirteenth resistor (R13), the fourteenth resistor (R14) and the fifteenth resistor (R15) is correspondingly connected with a pin P0-P7 of the voice recognition chip, and the other end of each resistor is connected with a 3.3V voltage; one end of the tenth capacitor to the fourteenth capacitor (C10-C14) is grounded after being connected in parallel, and the other end is connected with the A0 pin of the voice recognition chip through a sixteenth resistor (R16); one ends of the seventeenth resistor, the twentieth resistor (R17-R20) are respectively and correspondingly connected with an RDB pin, a WRB pin, a CSB pin and an RSTB pin of the voice recognition chip, and the other ends of the seventeenth resistor, the twentieth resistor and the RSTB pin are respectively connected with 3.3V voltage; one ends of the first resistor (R1) and the second resistor (R2) are connected with 3.3V voltage, and the other ends of the first resistor (R1) and the second resistor (R2) are connected to an RSV6 pin and an RSV7 pin of the voice recognition chip through a first diode (D1) and a second diode (D2), respectively; one ends of the fifth capacitor (C5) and the seventh capacitor (C7) are respectively connected to the MICP pin and the MICN pin of the voice recognition chip, the other ends of the fifth capacitor (C5) and the seventh capacitor (C7) are respectively connected to the positive electrode and the negative electrode of the microphone, and the fifth capacitor (C5) and the seventh capacitor (C7) are respectively connected to two ends of the sixth capacitor (C6) through a sixth resistor (R6) and a twelfth resistor (R12; one end of the fifteenth capacitor (C15) is connected with an EQ1 pin of the voice recognition chip, and the other end of the fifteenth capacitor (C15) is connected with a parallel circuit formed by a twenty-fifth resistor (R25) and a twentieth capacitor (C20) through a twenty-third resistor (R23); the VREE pin of the voice recognition chip is grounded through a parallel circuit of a twenty-first capacitor (C21) and a twenty-second capacitor (C22); the VDDA pin of the voice recognition chip is grounded through a filter circuit consisting of an inductor (L1) and twenty-fourth to twenty-sixth capacitors (C24-C26).

5. The embedded intelligent voice controller of claim 4,

the voice recognition chip adopts an LD3320 chip.

6. The embedded intelligent voice controller of claim 2,

the audio decoding output module includes: the device comprises a flash chip, a voice decoding chip, a USB interface, a voltage stabilizing chip, a power amplifier module, sixteenth to nineteenth capacitors (C16-C19), a twenty-first resistor (R21), a twenty-sixth resistor (R26), a twenty-eighth resistor (R28), a twenty-ninth resistor (R29), a fourth diode (D4), a fifth diode (D5) and twenty-seventh to thirty-eighth capacitors (C27-C31);

the pin D0 of the flash chip is connected with the pin P01 of the voice decoding chip through a twenty-first resistor (R21), and the pin P02 of the voice decoding chip is connected with the ground through a fourth diode (D4) and a twenty-ninth resistor (R29); the VCOM pin of the voice decoding chip is connected with the 5 pin of the USB interface through a twenty-eighth capacitor (C28), and the 1 pin of the USB interface is connected with the input end of the voltage stabilizing chip through a fifth diode (D5); the input end of the voltage stabilizing chip is grounded through a twenty-ninth capacitor (C29); the output end of the voltage stabilizing chip is connected with the power supply ends of the flash chip and the voice decoding chip and is grounded through a parallel circuit of a thirtieth capacitor (C30) and a thirty-first capacitor (C31); one end of the nineteenth capacitor (C19) and one end of the twenty-seventh capacitor (C27) are respectively connected with the VMCU pin and the power supply end of the voice decoding chip, and the other ends of the nineteenth capacitor and the twenty-seventh capacitor are both grounded; the IN + pin of the power amplifier module is grounded through an eighteenth capacitor (C18), and the IN-pin is connected with the DACR pin of the voice decoding chip through a twenty-sixth resistor (R26) and a twenty-third capacitor (C23); the VDD pin of the power amplifier module is grounded through a parallel circuit of a sixteenth capacitor (C16) and a seventeenth capacitor (C17), and the VO pin is connected with the IN-pin through a twenty-eighth resistor (R28).

7. The embedded intelligent voice controller of claim 6,

the voice decoding chip adopts a JQ8400-FL audio hard decoding chip.