CN212435650U - TDD power amplifier control circuit - Google Patents
TDD power amplifier control circuit Download PDFInfo
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- CN212435650U CN212435650U CN202022772020.4U CN202022772020U CN212435650U CN 212435650 U CN212435650 U CN 212435650U CN 202022772020 U CN202022772020 U CN 202022772020U CN 212435650 U CN212435650 U CN 212435650U
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- adjustable attenuator
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Abstract
The utility model relates to a wireless communication technology field, concretely relates to TDD power amplifier control circuit, including radio frequency amplifier, the control unit, logic unit, temperature sensor, adjustable attenuator and wave detector. The utility model realizes the fast switch of the switch control signal through the combination of the control unit and the logic unit; the power amplifier temperature is output to the control unit through the temperature sensor, the corresponding grid voltage data is obtained through the table lookup of the control unit, and the analog voltage corresponding to the temperature is output to the adjustable attenuator, so that the temperature-link gain compensation is realized; and the detector is combined to realize automatic level control, so that the power amplifier protection function is achieved.
Description
Technical Field
The utility model relates to a wireless communication technology field, especially a TDD power amplifier control circuit.
Background
In a communication system in a time division duplex mode, the receiving and the transmitting of signals are mutually separated in time, for a TDD power amplifier control circuit, a radio frequency amplifier not only needs to output high power, but also can lead the switches of a receiving channel and a transmitting channel to be in different time when the radio frequency amplifier is in a continuous switch switching process. If the transmitting channel is not closed at the receiving moment, the interference between the channels is easily caused, and the self-excitation damage of the device can be caused when the interference is serious. Therefore, the TDD power amplifier control circuit must have a function of high-speed switching.
Meanwhile, the static working point of the power amplifier has temperature characteristics, and the change of the static working current can affect the indexes of gain, efficiency, linearity and the like of the system. Therefore, maintaining the static operating point of the power amplifier constant during operation is one of the key points of design, and the gate voltage needs to be compensated in real time according to the operating state of the power amplifier. However, the prior art generally only includes one of the functions, and therefore, a TDD power amplifier control circuit having both high-speed switching and temperature compensation is needed.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a: aiming at the problem that a TDD power amplifier control circuit with a high-speed switch switching function and a temperature compensation function is lacked in the prior art, the TDD power amplifier control circuit is provided.
In order to realize the purpose, the utility model discloses a technical scheme be:
a TDD power amplifier control circuit comprises a control unit, a logic unit and a radio frequency amplifier which are electrically connected in sequence; the radio frequency amplifier is electrically connected with an external power amplifier unit, and the control unit sends uplink and downlink TDD time slot signals to the logic unit; the logic unit outputs corresponding multi-channel signals to the radio frequency amplifier according to the uplink and downlink TDD time slot signals; the fast switching of the switch control signals is realized; the radio frequency amplifier controls the uplink and downlink switches according to the multi-channel signals; the method is characterized in that: the circuit also comprises a temperature sensor, an adjustable attenuator and a detector;
the temperature sensor, the control unit, the adjustable attenuator and the radio frequency amplifier are electrically connected in sequence; the temperature sensor collects temperature data of the external power amplifier unit and sends the temperature data to the control unit; the control unit receives the temperature data, obtains corresponding grid voltage according to a temperature-grid voltage curve table built in the control unit, converts the grid voltage into a corresponding temperature power signal and sends the temperature power signal to the adjustable attenuator, and the adjustable attenuator controls the size of the signal output to the radio frequency amplifier according to the temperature power signal; temperature-link gain compensation is realized;
the detector is electrically connected with the control unit, detects OPD and RPD of an uplink and a downlink, outputs analog voltage to the control unit, converts the analog voltage into a feedback power signal and outputs the feedback power signal to the adjustable attenuator, and adjusts the attenuation of the adjustable attenuator to realize automatic level control. The utility model realizes the fast switch of the switch control signal through the combination of the control unit and the logic unit; the power amplifier temperature is output to the control unit through the temperature sensor, the corresponding grid voltage data is obtained through the table lookup of the control unit, and the analog voltage corresponding to the temperature is output to the adjustable attenuator, so that the temperature-link gain compensation is realized; and the detector is combined to realize automatic level control, so that the power amplifier protection function is achieved.
The control unit comprises a single chip microcomputer, a FLASH memory, an analog-to-digital converter and a digital-to-analog converter;
the analog-to-digital converter is respectively electrically connected with the temperature sensor and the single chip microcomputer, and is used for receiving temperature data sent by the temperature sensor, and sending the temperature data to the single chip microcomputer after analog-to-digital conversion processing;
the single chip microcomputer is respectively electrically connected with the FLASH memory and the digital-to-analog converter and is used for receiving the temperature data and outputting a corresponding grid voltage signal to the digital-to-analog converter according to a temperature-grid voltage curve prestored in the FLASH memory;
the digital-to-analog converter is electrically connected with the radio frequency amplifier and used for receiving the grid voltage signal, and outputting voltage at a corresponding temperature to the radio frequency amplifier after digital-to-analog conversion;
the digital-to-analog converter is electrically connected with the adjustable attenuator and is used for outputting analog voltage corresponding to the target attenuation amount, realizing the control of the attenuation amount of the adjustable attenuator and realizing the gain control of a power amplifier link;
the single chip microcomputer is also electrically connected with the logic unit and is used for outputting TDD uplink and downlink time slot signals to the logic unit. The utility model discloses a prestore temperature-grid voltage curve in the FLASH memory, and according to the grid voltage that the temperature data output of temperature sensor input corresponds is in the process digital analog converter conversion back, the temperature power signal that the output corresponds arrives adjustable attenuator to realized temperature-link gain compensation, the effectual static operating point that has maintained the power amplifier unit is invariable.
As a preferred aspect of the present invention, the logic unit includes a programmable ASIC device and a logic gate circuit;
the programmable ASIC device is electrically connected with the logic gate circuit and is used for receiving the TDD uplink and downlink time slot signals and outputting uplink and downlink switch signals to the logic gate circuit;
the logic gate circuit is electrically connected with the radio frequency amplifier and is used for converting the received uplink and downlink switch signals into corresponding multi-channel signals and sending the multi-channel signals to the radio frequency amplifier for amplification so as to control uplink and downlink switches.
As a preferred embodiment of the present invention, the logic gate circuit includes a decoder and an and nor gate.
As the preferred scheme of the utility model, programmable ASIC device adopts programmable logic device CPLD or field programmable gate array FPGA.
As the preferred embodiment of the present invention, the temperature sensor is a digital sensor or an analog sensor.
As the preferable scheme of the utility model, the adjustable attenuator adopts digital adjustable attenuator DVGA or analog adjustable attenuator AVGA.
As the preferred scheme of the utility model, the control unit through general asynchronous receiving and dispatching transmitter UART with outside power amplifier unit communication connection.
To sum up, owing to adopted above-mentioned technical scheme, the beneficial effects of the utility model are that:
1. the utility model realizes the fast switch of the switch control signal through the combination of the control unit and the logic unit; the power amplifier temperature is output to the control unit through the temperature sensor, the corresponding grid voltage data is obtained through the table lookup of the control unit, and the analog voltage corresponding to the temperature is output to the adjustable attenuator, so that the temperature-link gain compensation is realized; and the detector is combined to realize automatic level control, so that the power amplifier protection function is achieved.
2. The utility model discloses a prestore temperature-grid voltage curve in the FLASH memory, and according to the grid voltage that the temperature data output of temperature sensor input corresponds is in the process digital analog converter conversion back, the temperature power signal that the output corresponds arrives adjustable attenuator to realized temperature-link gain compensation, the effectual static operating point that has maintained the power amplifier unit is invariable.
Drawings
Fig. 1 is a schematic structural diagram of a TDD power amplifier control circuit according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of the automatic level control and temperature link compensation process of the TDD power amplifier control circuit according to embodiment 2 of the present invention;
fig. 3 is a schematic diagram of an adjustable attenuator of a TDD power amplifier control circuit according to embodiment 2 of the present invention;
fig. 4 is a schematic diagram of a flow of switching fast of the TDD power amplifier control circuit according to embodiment 3 of the present invention;
fig. 5 is a schematic diagram of a logic gate circuit of a TDD power amplifier control circuit according to embodiment 3 of the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
Example 1
As shown in fig. 1, a TDD power amplifier control circuit includes a radio frequency amplifier, a control unit, a logic unit, a temperature sensor, an adjustable attenuator, and a detector.
The radio frequency amplifier is electrically connected with the external power amplifier unit and is used for controlling the external power amplifier unit.
The control unit is electrically connected with the logic unit and is used for sending uplink and downlink TDD time slot signals to the logic unit.
The logic unit is electrically connected with the radio frequency amplifier and is used for receiving the uplink and downlink TDD time slot signals sent by the control unit and outputting corresponding multi-channel signals to the radio frequency amplifier according to the time slot signals so as to control uplink and downlink switches.
The temperature sensor is electrically connected with the control unit and used for collecting temperature data of the external power amplification unit and transmitting the temperature data to the control unit.
The control unit is electrically connected with the adjustable attenuator and is used for receiving the temperature data, obtaining corresponding grid voltage according to a temperature-grid voltage curve table built in the control unit, converting the grid voltage into a corresponding temperature power signal and sending the temperature power signal to the adjustable attenuator; the horizontal axis and the vertical axis of the temperature-grid voltage curve table respectively correspond to temperature and grid voltage, and each temperature corresponds to one grid voltage; when temperature data is input to the control unit, the control unit obtains the grid voltage corresponding to the corresponding temperature on the curve according to the temperature-grid voltage curve table, and converts the grid voltage into a corresponding temperature power signal through a built-in digital-to-analog converter.
The adjustable attenuator is electrically connected with the radio frequency amplifier and used for adjusting the size of a signal output to the radio frequency amplifier according to the temperature power signal sent by the control unit.
The detector is electrically connected with the control unit and used for detecting the OPD and the RPD of the uplink and the downlink and outputting analog voltage to the control unit, and the control unit converts the analog voltage into a feedback power signal and outputs the feedback power signal to the adjustable attenuator, so that the attenuation of the adjustable attenuator is controlled, and the gain control of the power amplifier link is realized.
Example 2
The difference between the present embodiment and embodiment 1 is that the control unit includes a single chip microcomputer, a FLASH memory, an analog-to-digital converter, and a digital-to-analog converter;
the temperature link compensation process is as shown in fig. 2, the temperature sensor sends temperature data to the analog-to-digital converter, and the temperature data is sent to the single chip microcomputer after being processed by analog-to-digital conversion; the single chip microcomputer outputs a corresponding grid voltage signal to the digital-to-analog converter according to a temperature-grid voltage curve table prestored in the FLASH memory; after the digital-to-analog converter is used for conversion, a temperature power signal corresponding to the grid voltage is output to the adjustable attenuator; and the adjustable attenuator adjusts the size of the signal output to the radio frequency amplifier according to the received temperature power signal, so as to realize temperature-link gain compensation.
Meanwhile, the automatic level control process is as shown in fig. 2, the detector collects output power detection OPD and reflected power detection RPD of the uplink and downlink, outputs analog voltage to the analog-to-digital converter, and sends the analog voltage to the single chip microcomputer after analog-to-digital conversion processing; after being processed by the singlechip, the data are sent to the digital-to-analog converter; and after the digital-to-analog converter is converted, outputting a corresponding feedback power signal to the adjustable attenuator. Therefore, automatic level control is realized, and the stability of the quiescent current of the radio frequency amplifier is ensured.
As shown in FIG. 3, the adjustable attenuator employs an IDTF1956NBGI8 Low Dropout (LDO) regulator with a step value of 0.25dB and a total attenuation value of 31.5 dB.
Example 3
The difference between the present embodiment and embodiment 2 is that the logic unit includes a programmable ASIC device and a logic gate circuit; the programmable ASIC device adopts a programmable logic device CPLD or a field programmable gate array FPGA.
The fast switching flow of the switch control signal is shown in fig. 4, the single chip sends TDD uplink and downlink timeslot signals to the programmable logic device CPLD, and outputs uplink and downlink switch signals to the logic gate circuit after being processed by the programmable logic device CPLD; and the logic gate circuit converts the received uplink and downlink switching signals into corresponding multi-channel signals, and sends the multi-channel signals to the radio frequency amplifier for amplification, thereby controlling the uplink and downlink switching and realizing the quick switching of the switching control signals.
As shown in fig. 5, the logic gate circuit includes a decoder and an and nor gate, and the decoder employs 2-4 decoders.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (8)
1. A TDD power amplifier control circuit comprises a control unit, a logic unit and a radio frequency amplifier which are electrically connected in sequence, wherein the control unit transmits a TDD time slot signal through the logic unit and the radio frequency amplifier so as to control an uplink and a downlink switch; the radio frequency amplifier is electrically connected with an external power amplification unit; the method is characterized in that: the circuit also comprises a temperature sensor, an adjustable attenuator and a detector;
the temperature sensor, the control unit, the adjustable attenuator and the radio frequency amplifier are electrically connected in sequence; the temperature sensor collects temperature data of the external power amplifier unit and adjusts the size of a signal output to the radio frequency amplifier through the control unit and the adjustable attenuator;
the detector is electrically connected with the control unit, detects OPD and RPD of the uplink and downlink, and adjusts the attenuation of the adjustable attenuator through the control unit.
2. The TDD power amplifier control circuit of claim 1, wherein: the control unit comprises a single chip microcomputer, a FLASH memory, an analog-to-digital converter and a digital-to-analog converter;
the analog-to-digital converter is electrically connected with the temperature sensor and the single chip microcomputer respectively; the single chip microcomputer is electrically connected with the FLASH memory and the digital-to-analog converter respectively; the digital-to-analog converter is electrically connected with the radio frequency amplifier; the digital-to-analog converter is electrically connected with the adjustable attenuator; the single chip microcomputer is also electrically connected with the logic unit.
3. The TDD power amplifier control circuit of claim 1, wherein: the logic unit comprises a programmable ASIC device and a logic gate circuit;
the programmable ASIC device is electrically connected with the logic gate circuit; the logic gate circuit is electrically connected with the radio frequency amplifier.
4. The TDD power amplifier control circuit of claim 3, wherein: the logic gate circuit comprises a decoder and an AND NOR gate.
5. The TDD power amplifier control circuit of claim 3, wherein: the programmable ASIC device adopts a programmable logic device CPLD or a field programmable gate array FPGA.
6. The TDD power amplifier control circuit of claim 1, wherein: the temperature sensor adopts a digital sensor or an analog sensor.
7. The TDD power amplifier control circuit of claim 1, wherein: the adjustable attenuator adopts a digital adjustable attenuator DVGA or an analog adjustable attenuator AVGA.
8. The TDD power amplifier control circuit of claim 1, wherein: the control unit is in communication connection with the external power amplification unit through a Universal Asynchronous Receiver Transmitter (UART).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022772020.4U CN212435650U (en) | 2020-11-26 | 2020-11-26 | TDD power amplifier control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022772020.4U CN212435650U (en) | 2020-11-26 | 2020-11-26 | TDD power amplifier control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212435650U true CN212435650U (en) | 2021-01-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022772020.4U Active CN212435650U (en) | 2020-11-26 | 2020-11-26 | TDD power amplifier control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212435650U (en) |
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- 2020-11-26 CN CN202022772020.4U patent/CN212435650U/en active Active
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