CN212379837U - Active power distribution network real-time simulator digital-analog interface circuit based on FPGA - Google Patents
Active power distribution network real-time simulator digital-analog interface circuit based on FPGA Download PDFInfo
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Abstract
The utility model relates to an active power distribution network real-time simulator digifax interface circuit based on FPGA, its major technical features is: the FPGA simulation development board comprises a power supply board, a digital-to-analog conversion board card and an FPGA simulation development board, wherein a digital signal input interface of the digital-to-analog conversion board card is connected with a data output interface of the FPGA simulation development board; the FPGA simulation development board comprises a simulation calculation module, a data output module, a floating point fixed point number conversion module and a number system conversion module which are connected in sequence. The utility model relates to a rationally, full play FPGA's interface resource advantage and the parallel technical advantage of hardware architecture, when the communication speed and the commonality of the digifax interface of simulator when guaranteeing, realized that real-time simulator simulation result is high-speed, effectual output function.
Description
Technical Field
The utility model belongs to the technical field of real-time simulator, especially, active power distribution network real-time simulator digifax interface circuit based on FPGA.
Background
In recent years, with the continuous development and application of distributed power generation and microgrid technology, flexible alternating current power distribution technology and intelligent power distribution and utilization technology, a power distribution network is changed from a traditional passive network into a multi-source complex system, the dynamic process of the power distribution network is more complicated due to the addition of numerous new elements and new technology, and the power distribution network faces greater challenges in many aspects such as planning design, operation scheduling, control protection, simulation analysis and the like, so that the operation mechanism and dynamic characteristics of the active power distribution network must be deeply understood by means of accurate and efficient transient simulation.
Different from offline electromagnetic transient simulation, active power distribution network real-time simulation can simulate the transient process of a system more truly, and the power distribution network real-time simulation system has the capability of hardware-in-loop simulation, development and test work of various control and protection devices can be developed by connecting a real-time simulator with actual physical equipment, the complex transient process of the active power distribution network under various operation scenes such as illumination and wind speed change, voltage drop, short-circuit fault, load shedding and the like can be simulated, the research and development and test cost can be effectively reduced, and the influence of equipment to be tested on the actual system is avoided.
At present, commercial real-time simulators including a real-time digital simulator (RTDS), a full-digital real-time simulator (hypermthe full digital real-time simulator, HYPERSIM) and the like have been widely applied in the fields of power system operation and protection, distributed power controller design, power electronic equipment research and development and the like, the scale of an active power distribution network is continuously increased, equipment models of a distributed power supply and the like are increasingly complex, the universality of interfaces between real-time simulators and between the real-time simulators and external equipment is low, the speed of information interaction is low, and how to improve the universality of the interfaces between the real-time simulators and the external equipment and the speed of information interaction becomes an urgent problem to be solved.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art not enough, provide an active power distribution network real-time simulator digifax interface circuit based on FPGA, solved among the prior art between the real-time simulator and between real-time simulator and external equipment the interface commonality lower, the lower problem of information interaction's speed.
The utility model provides a its technical problem take following technical scheme to realize:
the utility model provides an active power distribution network real-time simulator digifax interface circuit based on FPGA which characterized in that: including power strip, digital analog conversion integrated circuit board and FPGA simulation development board, wherein:
the two output interfaces of the power panel are respectively connected with and supply power to the power input end of the digital-to-analog conversion board card and the power input end of the FPGA simulation development board;
the digital signal input interface of the digital-to-analog conversion board card is connected with the data output interface of the FPGA simulation development board, the enable signal input interface of the digital-to-analog conversion board card is connected with the enable signal output interface of the FPGA simulation development board, and the clock signal input interface of the digital-to-analog conversion board card is connected with the clock signal output interface of the FPGA simulation development board;
the FPGA simulation development board comprises a simulation calculation module, a data output module, a floating point fixed point number conversion module and a number system conversion module, wherein the input end of the simulation calculation module is a data input interface of the FPGA simulation development board, the output end of the simulation calculation module is connected with the input end of the data output module, the output end of the data output module is connected with the input end of the floating point fixed point number conversion module, and the output end of the floating point fixed point number conversion module is connected with the input end of the number system conversion module.
The digital system conversion module comprises a first register, a second register, an address generation module and a double-rate random access memory, wherein the input end of the first register is the input end of the digital system conversion module, the output end of the first register is connected with the input end of the second register, the output end of the second register is connected with the input end of the address generation module, the output end of the address generation module is connected with the input end of the double-rate random access memory, and the output end of the double-rate random access memory is the output end of the digital system conversion module.
The digital-to-analog conversion board card is formed by connecting a high-frequency D/A conversion chip DAC900 and peripheral circuits thereof.
The FPGA simulation development board adopts StratixV series EP4SGX530KH40C 2N.
The utility model has the advantages that:
the utility model has reasonable design, fully exerts the interface resource advantage of FPGA and the parallel technical advantage of hardware structure, and realizes the high-speed and effective output of the simulation result of the real-time simulator while ensuring the communication speed and the universality of the digital-analog interface of the real-time simulator; therefore, the problems that in the prior art, interfaces between real-time simulators and between the real-time simulators and external equipment are low in universality and low in information interaction speed are solved.
Drawings
Fig. 1 is a block diagram of the circuit of the present invention;
the system comprises a power panel 1, a digital-to-analog conversion board card 2 and an FPGA simulation development board 3; 31-a simulation calculation module, 32-a data output module, 33-a floating point fixed point conversion module and 34-a numerical system conversion module; 341-first register, 342-second register, 343-address generation module, 344-dual-rate random access memory.
Detailed Description
The embodiments of the present invention will be described in detail with reference to the accompanying drawings.
A digital-analog interface circuit of an active power distribution network real-time simulator based on FPGA (field programmable gate array) is shown in figure 1 and comprises a power panel 1, a digital-analog conversion board card 2 and an FPGA simulation development board 3, wherein,
the power panel 1 is used for supplying power for the digital-to-analog conversion board card 2 and the FPGA simulation development board 3, an output interface J1 of the power panel 1 is connected with a power input end of the digital-to-analog conversion board card 2, and an output interface J2 of the power panel 1 is connected with a power input end K4 of the FPGA simulation development board 3.
The digital-to-analog conversion board card 2 is used for converting input digital signals into output analog signals, a digital signal input interface M1 of the digital-to-analog conversion board card 2 is connected with a data output interface K1 of the FPGA simulation development board 3, an enabling signal input interface M2 of the digital-to-analog conversion board card 2 is connected with an enabling signal output interface K2 of the FPGA simulation development board 3, and a clock signal input interface M3 of the digital-to-analog conversion board card 2 is connected with a clock signal output interface K3 of the FPGA simulation development board 3.
In this embodiment, the digital-to-analog conversion board card 2 is formed by connecting a high-frequency D/a conversion chip DAC900 and its peripheral circuits.
FPGA emulation development board 3 is used for buffering, filtering, fixed point number floating point number conversion and emulation calculation to the digital signal of input, and its computational method is conventional algorithm, is not the utility model discloses the content of protection. The FPGA simulation development board 3 is provided with a simulation calculation module 31, a data output module 32, a floating point fixed point number conversion module 33 and a number system conversion module 34, the input end of the simulation calculation module 31 is a data input interface K1 of the FPGA simulation development board 3, the output end of the simulation calculation module 31 is connected with the input end of the data output module 32, the output end of the data output module 32 is connected with the input end of the floating point fixed point number conversion module 33, and the output end of the floating point fixed point number conversion module 33 is connected with the input end of the number system conversion module 34.
The numerical system conversion module 34 includes: a first register 341, a second register 342, an address generation module 343, and a dual-rate random access memory 344, the input terminal of the first register 341 is the input terminal of the number system conversion module 34, the output terminal of the first register 341 is connected to the input terminal of the second register 342, an input of the second register 342 is connected to an output of the first register 341, an output of the second register 342 is connected to an input of the address generation module 343, an input of the address generation module 343 is connected to an output of the second register 342, an output of the address generation module 343 is coupled to an input of the dual-rate ram 344, an input of the dual-rate random access memory 344 is connected to an output of the address generation module 343, the output of the dual rate ram 344 is the output of the digital to analog conversion module 34.
In the present embodiment, the FPGA simulation development board 3 employs the stratxv series EP4SGX530KH40C2N by Intel corporation.
The utility model discloses the nothing is mentioned the part and is applicable to prior art.
It should be emphasized that the embodiments described herein are illustrative and not restrictive, and thus the present invention includes but is not limited to the embodiments described in the detailed description, as well as other embodiments derived from the technical solutions of the present invention by those skilled in the art, which also belong to the scope of the present invention.
Claims (4)
1. The utility model provides an active power distribution network real-time simulator digifax interface circuit based on FPGA which characterized in that: including power strip, digital analog conversion integrated circuit board and FPGA simulation development board, wherein:
the two output interfaces of the power panel are respectively connected with and supply power to the power input end of the digital-to-analog conversion board card and the power input end of the FPGA simulation development board;
the digital signal input interface of the digital-to-analog conversion board card is connected with the data output interface of the FPGA simulation development board, the enable signal input interface of the digital-to-analog conversion board card is connected with the enable signal output interface of the FPGA simulation development board, and the clock signal input interface of the digital-to-analog conversion board card is connected with the clock signal output interface of the FPGA simulation development board;
the FPGA simulation development board comprises a simulation calculation module, a data output module, a floating point fixed point number conversion module and a number system conversion module, wherein the input end of the simulation calculation module is a data input interface of the FPGA simulation development board, the output end of the simulation calculation module is connected with the input end of the data output module, the output end of the data output module is connected with the input end of the floating point fixed point number conversion module, and the output end of the floating point fixed point number conversion module is connected with the input end of the number system conversion module.
2. The digital-analog interface circuit of the active power distribution network real-time simulator based on the FPGA of claim 1, which is characterized in that: the digital system conversion module comprises a first register, a second register, an address generation module and a double-rate random access memory, wherein the input end of the first register is the input end of the digital system conversion module, the output end of the first register is connected with the input end of the second register, the output end of the second register is connected with the input end of the address generation module, the output end of the address generation module is connected with the input end of the double-rate random access memory, and the output end of the double-rate random access memory is the output end of the digital system conversion module.
3. The digital-analog interface circuit of the active power distribution network real-time simulator based on the FPGA as claimed in claim 1 or 2, wherein: the digital-to-analog conversion board card is formed by connecting a high-frequency D/A conversion chip DAC900 and peripheral circuits thereof.
4. The digital-analog interface circuit of the active power distribution network real-time simulator based on the FPGA as claimed in claim 1 or 2, wherein: the FPGA simulation development board adopts Stratix V series EP4SGX530KH40C 2N.
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