CN212367252U - Chip pin multiplexing circuit - Google Patents
Chip pin multiplexing circuit Download PDFInfo
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- CN212367252U CN212367252U CN202021926646.XU CN202021926646U CN212367252U CN 212367252 U CN212367252 U CN 212367252U CN 202021926646 U CN202021926646 U CN 202021926646U CN 212367252 U CN212367252 U CN 212367252U
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Abstract
The invention relates to the field of chip design, and particularly discloses a chip pin multiplexing circuit.A universal function control unit, a special function control unit and other functional modules are arranged, so that a multiplexing pin can be used as a normal function at any time; when special functions are needed, such as an online debugging function, after the hardware debugger is connected, the debugging function can be switched to, and the debugging signal and the function cannot be influenced by running codes; after debugging is finished, the hardware debugger is removed, and normal functions can be recovered. The beneficial effects are as follows: the multiplexing of chip pins is realized, the pin resources are saved, and the use of normal functions is not influenced.
Description
Technical Field
The invention relates to the field of chip design, in particular to a chip pin multiplexing circuit.
Background
In the chip design process, a pin of a chip is a scarce resource, and therefore, a plurality of functions need to be multiplexed onto the same pin. Generally, a pin can multiplex only one function at a time, such as GPIO (general purpose input/output), ADC (analog to digital converter), CMP (single chip multiprocessor), etc., but in some special scenarios, it is necessary to multiplex 2 or more functions on the same pin, such as an online debugging function. The current pin multiplexing methods include the following methods: 1. some pins are fixedly used as an online debugging function, and the method wastes pin resources; 2. some pins are multiplexed into online debugging and other functions, the default is the online debugging function when the system is started, and software can switch the pins into other functions according to needs; 3. some pins are multiplexed into online debugging and other functions, when the system is started, whether the pins are multiplexed into the online debugging functions or not is determined according to the level states of the pins, although the method also saves pin resources, the system has requirements on the levels of the pins when being started, normal function use is influenced, and the debugging functions cannot be switched after the system is started.
Disclosure of Invention
The invention provides a chip pin multiplexing circuit, which solves the technical problems that the existing pin multiplexing mode wastes pin resources and influences the use of normal functions. In order to solve the technical problems, the invention provides a chip pin multiplexing circuit, which comprises a multiplexing pin, wherein one end of the multiplexing pin is connected with a general function control unit, and the other end of the multiplexing pin is connected with a special function control unit;
the multiplexing pin is used for being connected with external equipment and receiving a general function signal and a special function signal;
the general function control unit is used for detecting the general function signal input and controlling whether to output the general function signal;
the special function control unit is used for detecting the special function signal input and controlling whether the special function signal is output or not.
Further, the general function control unit includes: the input unit is connected with the multiplexing pin, the first output unit is connected with the first output control switch, and the first output control switch is also connected with the multiplexing pin;
the input unit is used for detecting a level value on the multiplexing pin at any time and storing the level value;
the first output unit is used for storing a first output level and outputting the first output level to the first output control switch and the special function control unit;
the first output control switch is used for judging whether the general function signal is allowed to be output according to the first output level.
Further, the special function control unit includes: the device comprises an arithmetic unit connected with a multiplexing pin and a first output unit, an input detection unit connected with the arithmetic unit, a second output unit, and a second output control switch connected with the second output unit, wherein the second output control switch is also connected with the multiplexing pin;
the arithmetic unit is used for calculating the difference value between the level of the multiplexing pin and the first output level, comparing the difference value with the first output level and judging whether a special function signal is input or not;
the input detection unit is used for detecting the level value of the operation unit at any time and storing the level value;
the second output unit is used for storing a second output level and outputting the second output level to the second output control switch;
and the second output control switch is used for judging whether the special function signal is allowed to be output or not according to the second output level.
Furthermore, the input unit comprises a Schmitt trigger and a first input data register connected with the Schmitt trigger;
the first output unit comprises a first output data register and a first output driving circuit connected with the first output data register;
the Schmitt trigger is used for detecting a level value on the multiplexing pin at any time and storing the level value into a first input data register;
the first output data register is used for storing the first output level;
the first output driving circuit is configured to output the first output level to the first output control switch.
Furthermore, the input detection unit comprises a Schmitt trigger and a second input data register connected with the Schmitt trigger;
the output unit comprises a second output data register and a second output driving circuit connected with the second output data register;
the Schmitt trigger is used for detecting a level value on the arithmetic unit at any time and storing the level value into a second input data register;
the second output data register is used for storing the second output level;
the second output driving circuit is configured to output the second output level to the second output control switch.
Furthermore, when the difference between the difference value and the first output level is greater than a first value, the input detection unit judges that a special function signal is input at a high level; when the difference between the output level of the general function unit and the difference value is smaller than a second value, the input detection unit judges that a special function signal is input at a low level, the first value and the second value are configured through a chip register, and the effective range is 1V-3V.
Further, the general function control unit and the special function control unit are also connected with other function modules, including but not limited to GPIO general purpose input/output port, ADC digital-to-analog converter, UART general asynchronous transceiver transmitter, I2C bus.
The invention provides a chip pin multiplexing circuit.A universal function control unit, a special function control unit and other functional modules are arranged, so that a multiplexing pin can be used as a normal function at any time; when special functions are needed, such as an online debugging function, after the hardware debugger is connected, the debugging function can be switched to, and the debugging signal and the function cannot be influenced by running codes; after debugging is finished, the hardware debugger is removed, and normal functions can be recovered. The beneficial effects are as follows: the multiplexing of chip pins is realized, the pin resources are saved, and the use of normal functions is not influenced.
Drawings
Fig. 1 is a diagram of a multiplexing circuit for chip pins according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of an input unit according to an embodiment of the present invention;
fig. 3 is a circuit diagram of a first output unit according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of an input detecting unit according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a second output unit according to an embodiment of the present invention;
FIG. 6 is a diagram illustrating a scenario for using general functions provided by an embodiment of the present invention;
fig. 7 is a usage scenario diagram of a special function provided in an embodiment of the present invention.
Detailed Description
The embodiments of the present invention will be described in detail below with reference to the accompanying drawings, which are given solely for the purpose of illustration and are not to be construed as limitations of the invention, including the drawings which are incorporated herein by reference and for illustration only and are not to be construed as limitations of the invention, since many variations thereof are possible without departing from the spirit and scope of the invention.
As shown in fig. 1, a structure diagram of a multiplexing circuit for a chip pin according to an embodiment of the present invention includes a multiplexing pin, where one end of the multiplexing pin is connected to a general function control unit, and the other end of the multiplexing pin is connected to a special function control unit, the general function control unit is connected to the special function control unit, and the general function control unit and the special function control unit are further connected to other function modules.
The general function control unit includes: the circuit comprises an input unit connected with a multiplexing pin, a first output unit and a first output control switch connected with the first output unit, wherein the first output control switch is also connected with the multiplexing pin.
The special function control unit includes: the device comprises an arithmetic unit connected with a multiplexing pin and a first output unit, an input detection unit connected with the arithmetic unit, a second output unit, and a second output control switch connected with the second output unit, wherein the second output control switch is also connected with the multiplexing pin.
Fig. 2 is a circuit configuration diagram of an input unit in a general function control unit, the input unit including a schmitt trigger, and a first input data register connected to the schmitt trigger. As shown in fig. 3, the first output unit includes a first output data register, and a first output driving circuit connected to the first output data register.
Fig. 4 is a circuit configuration diagram of an input detection unit of the special function control unit, the input detection unit including a schmitt trigger and a second input data register connected to the schmitt trigger. As shown in fig. 5, the output unit includes a second output data register, and a second output driving circuit connected to the second output data register.
The general function control unit can detect a level value on a pin at any time through a Schmitt trigger (the trigger level of the general function control unit can be configured through a chip register) and stores the level value into a first input data register of the chip; the first output drive circuit can output the first output level to the pin according to the first output level stored in the first output register, the first output control switch can control whether to allow the output of the general function signal according to the value of the first output level (the value can be determined according to the requirement), when the multiplexing pin is used as the general function output, the first output control switch can turn on the output function, and when the multiplexing pin is used for the general function input, the special function input or the special function output, the output function can be turned off.
The special function control unit includes a similar structure, and by means of a schmitt trigger (the trigger level of which can be configured by a chip register), the level value on the multiplexing pin can be detected at any time and stored in the second input data register. Unlike the general function control unit, the special function control unit includes an additional arithmetic unit that calculates the difference (denoted as Vsi) between the pin level and the general function unit output level (denoted as Vgo) so that the input signal for the special function (e.g., a debug signal sent by a debugger) on the pin can be correctly received even when the general function unit output is enabled.
When the Vsi is larger than a certain value of the Vgo (the value can be configured through a chip register, and the effective range is 1V-3V), the external high-level input of a special function signal is considered;
when Vsi is smaller than a certain value of Vgo (the value can be configured by a chip register, and the effective range is 1V-3V), a low-level input of a special function signal is considered to be available.
The second output drive circuit can output the second output level to the pin according to the second output level stored in the second output register, the second output control switch can control whether to allow the special function signal to be output according to the value of the second output level (the value can be determined according to the requirement), when the multiplexing pin is used as the special function output, the second output control switch can turn on the output function, and when the multiplexing pin is used for the special function input, the general function input or the general function output, the output function can be turned off. When the output is enabled, the output function of the general-purpose function control unit can also be disabled by controlling the output control signal of the general-purpose function control unit so that a correct signal can be output to the outside.
The general function control unit and the special function control unit output enable scenarios are shown in table one:
watch 1
The general function control unit and the special function control unit can be matched with other function modules to complete more complex functions, such as adding a debugger for debugger debugging.
The working principle of the chip pin multiplexing circuit provided by the embodiment of the invention is as follows:
the general function control unit detects the level value of the multiplexing pin to judge whether the general function signal is input, and the special function control unit detects the level value of the multiplexing pin to judge whether the special function signal is input;
if the special function control unit judges that a special function signal is input at a high level, the second output control switch receives the second output level and controls the output of the special function signal, and meanwhile, the first output control switch controls the output of the general function signal to be forbidden;
if the general function control unit judges that a general function signal is input and the special control unit judges that a special function signal is input at a low level, the first output control switch controls the general function signal to be output, meanwhile, the arithmetic unit calculates the difference value between the level of the multiplexing pin and the first output level, compares the difference value with the first output level and judges whether a special function signal is input at a high level or not, if the special function signal is input at a high level, the second output control switch receives the second output level and controls the special function signal to be output, meanwhile, the first output control switch controls the general function signal to be forbidden to be output, and if the special function signal is input at a low level, the general function control unit keeps the general function signal to be output;
and after the special function signal is output, the second output control switch prohibits the special function signal from being output, and the first output control switch allows the general function signal to be output. When the difference between the difference value and the output level value of the general function unit is larger than a first value, the input detection unit judges that a special function signal is input at a high level; when the difference between the output level of the general function unit and the difference value is smaller than a second value, the input detection unit judges that a special function signal is input at a low level, the first value and the second value are configured through a chip register, and the effective range is 1V-3V.
By the invention, the special function control unit can be activated by the external device (such as a hardware debugger) by sending specific information (such as a self-defined section of high, low, high and low pulses, which can be used as a communication protocol, defined by the special function module) to the special function control unit at any time when the general function control unit works normally. When the special function control unit identifies the protocol information defined by the special function module, the output of the general function control unit can be forbidden, so that the signal which can be identified by the outside can be correctly output by the general function control unit.
Example one
Taking MCU online debugging function as an example, the invention can make the chip enter the debugging state at any time and automatically release the occupation of the pin after the debugging is finished.
a) When the general function control unit is in the input mode:
i. the special function control unit is also in an input mode, under the mode, the unit receives and analyzes an input signal on the multiplexing pin in real time to determine whether a signal and a protocol input related to online debugging exist or not, at the moment, the special function control unit directly detects whether the signal and the protocol input related to online debugging exist or not, and the operation unit does not need to calculate a difference value;
if the protocol input is resolved, the special function control unit switches the multiplexing pin (not limited to the pin) to an output mode so as to communicate with the debugger;
and iii, after the output is finished, the output mode of the special function control unit is disabled so as not to influence the general function.
b) When the general function control unit is in the output mode:
i. the special function control unit is in an input mode, and in the input mode, the special function control unit receives and analyzes an input signal on a multiplexing pin in real time and compares the input signal with the output level of the general function control unit to determine whether a signal and a protocol related to online debugging are input;
if the protocol input is resolved, the special function control unit switches the multiplexing pin (not limited to the pin) into an output mode, and if necessary, the output function of the general function control unit can be disabled so as to perform protocol communication with the debugger;
and iii, after the output is finished, disabling the output mode of the special function control unit, and then disabling the output function of the general function so as not to influence the general function.
The above scenario can be used in the technical solutions shown in fig. 6 and 7, when the LED lamp is in a normal function, the two pins can be used as general GPIO outputs to control the LED lamp; when online debugging is needed, a hardware debugger is connected, a section of protocol (defined by a chip) is input on a pin, the general GPIO output function can be closed, and the debug function is supported.
The invention provides a chip pin multiplexing circuit.A universal function control unit, a special function control unit and other functional modules are arranged, so that a multiplexing pin can be used as a normal function at any time; when special functions are needed, such as an online debugging function, after the hardware debugger is connected, the debugging function can be switched to, and the debugging signal and the function cannot be influenced by running codes; after debugging is finished, the hardware debugger is removed, and normal functions can be recovered. The beneficial effects are as follows: the multiplexing of chip pins is realized, the pin resources are saved, and the use of normal functions is not influenced.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (7)
1. A chip pin multiplexing circuit is characterized in that: the system comprises a multiplexing pin, wherein one end of the multiplexing pin is connected with a general function control unit, and the other end of the multiplexing pin is connected with a special function control unit;
the multiplexing pin is used for being connected with external equipment and receiving a general function signal and a special function signal;
the general function control unit is used for detecting the general function signal input and controlling whether to output the general function signal;
the special function control unit is used for detecting the special function signal input and controlling whether the special function signal is output or not.
2. The chip pin multiplexing circuit of claim 1, wherein the general function control unit comprises: the input unit is connected with the multiplexing pin, the first output unit is connected with the first output control switch, and the first output control switch is also connected with the multiplexing pin;
the input unit is used for detecting a level value on the multiplexing pin at any time and storing the level value;
the first output unit is used for storing a first output level and outputting the first output level to the first output control switch and the special function control unit;
the first output control switch is used for judging whether the general function signal is allowed to be output according to the first output level.
3. The chip pin multiplexing circuit of claim 2, wherein the special function control unit comprises: the device comprises an arithmetic unit connected with a multiplexing pin and a first output unit, an input detection unit connected with the arithmetic unit, a second output unit, and a second output control switch connected with the second output unit, wherein the second output control switch is also connected with the multiplexing pin;
the arithmetic unit is used for calculating the difference value between the level of the multiplexing pin and the first output level, comparing the difference value with the first output level and judging whether a special function signal is input or not;
the input detection unit is used for detecting the level value of the operation unit at any time and storing the level value;
the second output unit is used for storing a second output level and outputting the second output level to the second output control switch;
and the second output control switch is used for judging whether the special function signal is allowed to be output or not according to the second output level.
4. The chip pin multiplexing circuit of claim 3, wherein: the input unit comprises a Schmitt trigger and a first input data register connected with the Schmitt trigger;
the first output unit comprises a first output data register and a first output driving circuit connected with the first output data register;
the Schmitt trigger is used for detecting a level value on the multiplexing pin at any time and storing the level value into a first input data register;
the first output data register is used for storing the first output level;
the first output driving circuit is configured to output the first output level to the first output control switch.
5. The chip pin multiplexing circuit of claim 4, wherein: the input detection unit comprises a Schmitt trigger and a second input data register connected with the Schmitt trigger;
the output unit comprises a second output data register and a second output driving circuit connected with the second output data register;
the Schmitt trigger is used for detecting a level value on the arithmetic unit at any time and storing the level value into a second input data register;
the second output data register is used for storing the second output level;
the second output driving circuit is configured to output the second output level to the second output control switch.
6. The chip pin multiplexing circuit of claim 3, wherein: when the difference between the difference value and the first output level is larger than a first value, the input detection unit judges that a special function signal is input at a high level; when the difference between the output level of the general function unit and the difference value is smaller than a second value, the input detection unit judges that a special function signal is input at a low level, the first value and the second value are configured through a chip register, and the effective range is 1V-3V.
7. The chip pin multiplexing circuit of claim 1, wherein: the general function control unit and the special function control unit are also connected with other function modules, wherein the other function modules include but are not limited to GPIO general purpose input/output ports, ADC digital-to-analog converters, UART general asynchronous transceiver transmitters and I2C buses.
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| CN202021926646.XU CN212367252U (en) | 2020-09-04 | 2020-09-04 | Chip pin multiplexing circuit |
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| CN202021926646.XU CN212367252U (en) | 2020-09-04 | 2020-09-04 | Chip pin multiplexing circuit |
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