CN212365293U

CN212365293U - FPGA experimental box

Info

Publication number: CN212365293U
Application number: CN202021256184.5U
Authority: CN
Inventors: 王庆波
Original assignee: Tangshan Normal University
Current assignee: Tangshan Normal University
Priority date: 2020-07-01
Filing date: 2020-07-01
Publication date: 2021-01-15
Anticipated expiration: 2030-07-01

Abstract

The utility model discloses a FPGA experimental box, which comprises an experimental box main body, wherein a fan set is arranged on the outer wall of one side of the experimental box main body, an airflow cavity is arranged at the output end of the fan set, an airflow groove communicated with the inside of the experimental box main body is arranged on the outer wall of the other side of the airflow cavity, and the airflow groove is used for compressing the output airflow of the fan set and reducing the temperature of the airflow; the fan set is characterized in that a positioning block is movably arranged on the outer side of the fan set, and a filter plate is arranged inside the positioning block. This FPGA experimental box can make the air current compression through the air current groove behind the output air current input air current chamber of fan group, and the temperature can reduce when the air current compression, and the air current after the cooling down this moment can carry to the inside unsettled FPGA circuit board surface of installing on the circuit board erection column of experimental box main part to lower the temperature to the FPGA circuit board, when debris such as the inside dust of filter was too much, with the quick change and the installation of carrying on of filter.

Description

FPGA experimental box

Technical Field

The utility model relates to a FPGA box technical field specifically is a FPGA experimental box.

Background

FPGA (field Programmable Gate array) is a product of further development on the basis of Programmable devices such as PAL, GAL and the like. The FPGA main board is arranged in the FPGA test box, so that a worker can carry the FPGA with him, and the worker can debug the FPGA chip conveniently or reprogram, modify and program the FPGA chip and the like.

But current FPGA experimental box discovers in the use, because the inside electronic component of FPGA experimental box is more, produce a large amount of heats easily when using, and current inside cooling mechanism of FPGA experimental box is too simple, and filter equipment can't dismantle, after long-time the use, filter equipment is stopped up by debris such as dust, make cooling mechanism intake diminish, lead to the cooling effect weak, can't eliminate the inside heat of FPGA experimental box, lead to the overheated and influence the FPGA result of use of FPGA experimental box, can lead to the circuit to burn out the short circuit seriously.

Aiming at the problems, innovative design is urgently needed on the basis of the original FPGA experimental box.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a FPGA experimental box to it is too simple to provide current FPGA experimental box inside cooling mechanism in solving above-mentioned background art, and filter equipment can't dismantle, and the cooling effect weakens after long-time the use, leads to FPGA experimental box overheated and influence the FPGA result of use, can lead to the problem that the short circuit was burnt out to the circuit seriously.

Technical scheme

In order to achieve the above object, the utility model provides a following technical scheme: an FPGA experimental box comprises an experimental box main body, wherein a fan set is arranged on the outer wall of one side of the experimental box main body, an airflow cavity is arranged at the output end of the fan set, an airflow groove communicated with the inside of the experimental box main body is arranged on the outer wall of the other side of the airflow cavity, and the airflow groove is used for compressing the output airflow of the fan set and reducing the temperature of the airflow; the fan set is characterized in that a positioning block is movably arranged on the outer side of the fan set, and a filter plate is arranged inside the positioning block.

Preferably, the two sides of the positioning block are provided with convex plates, one side of the adjacent experiment box main body is provided with a groove, the filter plate is arranged in the groove and keeps attached to the input end of the fan set through a reset mechanism arranged between the positioning block and the experiment box main body.

Preferably, canceling release mechanical system includes spliced pole and limiting plate, the experiment case main part is adjacent the groove that resets has been seted up to the inside of fan group one side, the one end fixed mounting of spliced pole in the bottom of locating piece, the other end of spliced pole runs through and extends to the inside in groove that resets, limiting plate fixed mounting in the spliced pole is located on the port in the groove that resets.

Preferably, the reset mechanism further comprises a reset spring, and the reset spring is arranged between the limiting plate and the inner wall of the reset groove and is sleeved on the connecting column.

Preferably, four circuit board mounting columns are arranged inside the experiment box main body, and the FPGA circuit board is mounted on the circuit board mounting columns in a suspended mode.

Preferably, an exhaust net is arranged on one side of the experiment box main body opposite to the fan set.

Compared with the prior art, the beneficial effects of the utility model are that:

1. this FPGA experimental box, the inside of adoption in the experimental box main part sets up fan group to set up the mode that sets up air current chamber and air current groove at fan group's output, can make the air current compression through the air current groove behind the output air current input air current chamber of fan group, the temperature can reduce when the air current compression, the air current after the reduction in temperature this moment can carry to the inside unsettled FPGA circuit board surface of installing on the circuit board erection column of experimental box main part, in order to cool down the FPGA circuit board.

2. This FPGA experimental box adopts the filter mounting means of being convenient for to change, and when debris such as the inside dust of filter were too much, the flange that sets up through locating piece both sides was with the locating piece to the outside pulling, can take out the filter and clear up the change, and when the filter clean up back, in inserting the filter in the inboard recess of locating piece, make the locating piece fix the filter at the input of fan group under reset spring's effort.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

This document provides an overview of various implementations or examples of the technology described in this disclosure, and is not a comprehensive disclosure of the full scope or all features of the disclosed technology.

Drawings

FIG. 1 is a schematic view of the overall front view structure of the present invention;

FIG. 2 is a schematic view of the overall back view structure of the present invention;

FIG. 3 is a schematic side sectional view of the present invention;

fig. 4 is an enlarged schematic view of a point a in fig. 3 according to the present invention.

In the figure: 1. a main body of the experiment box; 2. a circuit board mounting post; 3. an FPGA circuit board; 4. positioning blocks; 5. a convex plate; 6. a groove; 7. a filter plate; 8. connecting columns; 9. a limiting plate; 10. a return spring; 11. a reset groove; 12. a fan set; 13. an airflow chamber; 14. an air flow groove; 15. an exhaust net; 16. a reset mechanism.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of the word "comprising" or "comprises", and the like, in this disclosure is intended to mean that the elements or items listed before that word, include the elements or items listed after that word, and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may also include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.

To maintain the following description of the embodiments of the present disclosure clear and concise, a detailed description of known functions and known components have been omitted from the present disclosure.

Referring to fig. 1-4, the present invention provides a technical solution: an FPGA experiment box comprises an experiment box main body 1, wherein a fan set 12 is arranged on the outer wall of one side of the experiment box main body 1, an airflow cavity 13 is arranged at the output end of the fan set 12, an airflow groove 14 communicated with the inside of the experiment box main body 1 is arranged on the outer wall of the other side of the airflow cavity 13, and the airflow groove 14 is used for compressing the output airflow of the fan set 12 and reducing the temperature of the airflow; the outer side of the fan set 12 is movably provided with a positioning block 4, the inner part of the positioning block 4 is provided with a filter plate 7, the fan set 12 is arranged in the experiment box main body 1, the output end of the fan set 12 is provided with an airflow chamber 13 and an airflow groove 14, the output airflow of the fan set 12 can be input into the airflow chamber 13 and then compressed through the airflow groove 14, the temperature can be reduced when the airflow is compressed, the airflow with the reduced temperature can be conveyed to the surface of the FPGA circuit board 3 which is arranged on the circuit board mounting column 2 in the experiment box main body 1 in a suspended way to cool the FPGA circuit board 3, meanwhile, the installation mode of the filter plate 7 which is convenient to replace is adopted, when the impurities such as dust and the like in the filter plate 7 are excessive, the positioning block 4 is pulled outwards through the convex plates 5 arranged on the two sides of the positioning block 4, the filter plate 7 can be taken out and, the filter plate 7 is inserted into the groove 6 on the inner side of the positioning block 4, so that the positioning block 4 fixes the filter plate 7 on the input end of the fan set 12 under the action of the return spring 10.

As shown in figure 1, the two sides of the positioning block 4 are provided with the convex plates 5, one side of the adjacent experiment box main body 1 is provided with the groove 6, the filter plate 7 is arranged in the groove 6 and is kept attached to the input end of the fan set 12 through the reset mechanism 16 arranged between the positioning block 4 and the experiment box main body 1, and the filter plate 7 is convenient to replace when the dust and other impurities in the filter plate 7 are excessive.

As shown in fig. 4, the reset mechanism 16 includes a connection post 8 and a limit plate 9, a reset groove 11 is formed in the inner side of the experiment box main body 1 adjacent to the fan set 12, one end of the connection post 8 is fixedly mounted at the bottom of the positioning block 4, the other end of the connection post 8 penetrates and extends into the reset groove 11, the limit plate 9 is fixedly mounted on the port of the connection post 8 located in the reset groove 11, the reset mechanism 16 further includes a reset spring 10, the reset spring 10 is disposed between the limit plate 9 and the inner wall of the reset groove 11 and is sleeved on the connection post 8, when the above-mentioned structure design is excessive in dust and other impurities in the filter plate 7, the positioning block 4 is pulled outwards by the convex plates 5 disposed at both sides of the positioning block 4, so as to take out the filter plate 7 and perform cleaning and replacement, after the filter plate 7 is cleaned up, the filter plate, the positioning block 4 fixes the filter plate 7 at the input end of the fan set 12 under the action of the return spring 10.

As shown in fig. 1-3, four circuit board mounting columns 2 are arranged inside the experiment box main body 1, an FPGA circuit board 3 is mounted on the circuit board mounting columns 2 in a suspended manner, and the FPGA circuit board 3 is mounted on the FPGA circuit board 3 in a suspended manner, so that the ventilation and cooling effects are enhanced.

Wherein, the side of experiment case main part 1 relative to fan group 12 is provided with exhaust network 15, and above-mentioned structural design can let the air that fan group 12 was inputed directly discharge the inside of experiment case main part 1 through exhaust network 15, keeps the circulation of wind direction.

The working principle is as follows: when using this device, as shown in fig. 1-3, when the experimenter uses the experiment box main body 1, at first start the fan set 12, inhale the air current from the filter 7 through the fan set 12, and input back in the air current chamber 13, make the air current compress through the air current groove 14, the temperature can reduce when the air current compresses, the air current after the reduction temperature can be carried to the inside unsettled FPGA circuit board 3 surface of installing on circuit board erection column 2 of experiment box main body 1, in order to cool down FPGA circuit board 3, the air after the reduction temperature is through exhausting inside of experiment box main body 1 of exhaust net 15 discharge.

As shown in fig. 1-4, when the filter plate 7 has excessive dust and other impurities, the positioning block 4 is pulled outwards by the convex plates 5 arranged on both sides of the positioning block 4, so that the filter plate 7 can be taken out and cleaned and replaced, and after the filter plate 7 is cleaned up, the filter plate 7 is inserted into the groove 6 on the inner side of the positioning block 4, so that the positioning block 4 fixes the filter plate 7 at the input end of the fan set 12 under the action of the return spring 10.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. The utility model provides a FPGA experimental box, includes experimental box main part (1), its characterized in that:

the outer wall of one side of the experiment box main body (1) is provided with a fan set (12), the output end of the fan set (12) is provided with an airflow cavity (13), the outer wall of the other side of the airflow cavity (13) is provided with an airflow groove (14) communicated with the inside of the experiment box main body (1), and the airflow groove (14) is used for compressing the output airflow of the fan set (12) and reducing the temperature of the airflow;

the fan set is characterized in that a positioning block (4) is movably arranged on the outer side of the fan set (12), and a filter plate (7) is arranged inside the positioning block (4).

2. The FPGA experimental box of claim 1, wherein: the improved experimental box is characterized in that protruding plates (5) are arranged on two sides of the positioning block (4), a groove (6) is formed in one side of the experimental box main body (1) in an adjacent mode, the filter plate (7) is arranged in the groove (6), and the reset mechanism (16) arranged between the positioning block (4) and the experimental box main body (1) keeps attached to the input end of the fan set (12).

3. The FPGA experimental box of claim 2, wherein: reset mechanism (16) are including spliced pole (8) and limiting plate (9), it is adjacent to experiment case main part (1) reset groove (11) have been seted up to the inside of fan group (12) one side, the one end fixed mounting of spliced pole (8) in the bottom of locating piece (4), the other end of spliced pole (8) runs through and extends to reset the inside of groove (11), limiting plate (9) fixed mounting in spliced pole (8) are located reset on the port in groove (11).

4. The FPGA experimental box of claim 3, wherein: the reset mechanism (16) further comprises a reset spring (10), and the reset spring (10) is arranged between the limiting plate (9) and the inner wall of the reset groove (11) and is sleeved on the connecting column (8).

5. The FPGA experimental box of claim 1, wherein: four circuit board installing columns (2) are arranged inside the experiment box main body (1), and the FPGA circuit board (3) is arranged on the circuit board installing columns (2) in a suspended mode.

6. The FPGA experimental box of claim 1, wherein: an exhaust net (15) is arranged on one side, opposite to the fan set (12), of the experiment box main body (1).