CN212364422U - Wide frequency detection circuit - Google Patents
Wide frequency detection circuit Download PDFInfo
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- CN212364422U CN212364422U CN202020584301.4U CN202020584301U CN212364422U CN 212364422 U CN212364422 U CN 212364422U CN 202020584301 U CN202020584301 U CN 202020584301U CN 212364422 U CN212364422 U CN 212364422U
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Abstract
The utility model provides a wide frequency detection circuitry, this circuit is including wide frequency signal source, high frequency filter circuit, voltage conversion circuit, a comparison circuit, programmable logic processor, wide frequency signal source is used for the input alternating voltage signal, and apply in high frequency filter circuit's input side, high frequency filter circuit is used for exporting voltage conversion circuit through its output side after filtering alternating voltage signal's high frequency interference, voltage conversion circuit exports low-voltage signal to comparison circuit and programmable logic processor, comparison circuit compares and produces comparison pulse signal to the low-voltage signal of input, comparison circuit exports comparison pulse signal to programmable logic processor, with the work of the inside timer of control programmable logic processor. The utility model discloses can online real-time supervision electric wire netting frequency to use electric wire netting frequency to carry out target tracking feedback control as the reference benchmark.
Description
Technical Field
The utility model relates to a power electronic technology field especially relates to a wide frequency detection circuit.
Background
Due to the uncertainty of the load of the power grid and the access of a large amount of distributed energy, the frequency of the power grid fluctuates, which is a great challenge for power electronic equipment which depends on the frequency of the power grid for control. Therefore, a technique for adapting to a wide voltage frequency is important for the use of power electronic devices.
In the prior art, for example, a zero-cross detection circuit with patent application number CN201821470201 mainly includes a sampling circuit and an amplifying circuit. The sampling circuit samples the power supply voltage to obtain a zero-crossing signal with the same frequency as the power supply; the input end of the amplifying circuit is connected with the sampling circuit, the output end of the amplifying circuit is connected with a zero-crossing detection port of the control system, and the amplifying circuit amplifies the sampled zero-crossing signal with the same frequency as the power supply to enable the signal to be closer to a zero-crossing point.
The scheme firstly depends heavily on the accuracy of the sampling circuit, and secondly the detection of the zero-crossing point signal is deviated due to the switch voltage drop of the amplifying circuit.
In the prior art, for example, in a method for controlling variable PI variable frequency of a large-capacity isolation type direct current converter with the patent application number of CN201310367377, the whole controller adopts 3 gears corresponding to 3 sets of PI control parameters, and the whole process is continuously circulated by continuously performing voltage judgment, accumulated timing, gear lifting judgment and parameter output, but the variable frequency is that the controller actively changes the control frequency, and is not changed due to the change of the power grid frequency, and if the power grid frequency changes, the purpose of rapid tracking control cannot be achieved.
GB/T15945 Standard "frequency allowed deviation of Power quality electric Power System": "the frequency of the electric network in China is normally 50Hz, and the deviation is not more than plus or minus 0.2Hz for the electric network capacity of 300 ten thousand kilowatts and above; for the power grid with the capacity of less than 300 million watts, the deviation is not more than +/-0.5 Hz', and the frequencies of all other power grids are qualified only within the range of 49.8-50.2 Hz except that the frequencies of 3 independent power grids of Hainan, Ulmaria and Lasa are within the range of 49.5-50.5 Hz from 6 provincial power grids of the currently developed and formed four provinces of northeast, North China, east China, northwest China and south China, and 6 independent power grids of Shandong, Chuanyu, Fujian, Hainan, Ulmaria and Lasa.
Because the power utilization scenes of the power electronic equipment are complex and changeable, the frequency of a power grid connected with the power electronic equipment is not fixed at 50Hz and is generally influenced by factors such as transformer capacity, power utilization equipment, a power supply and the like. Under some severe conditions, the use frequency range of power electronic equipment is increased to 45-65 Hz, the same equipment is suitable for a wide frequency range, a severe test is conducted on a controller and a modulator, and usually, a parameter under a certain frequency is switched to another frequency for use and needs to be corrected. Particularly, when the frequency is switched from 45Hz to 65Hz, the frequency change rate reaches 44.4%, and a set of coefficients can hardly meet the control stability under various frequencies.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a wide frequency detection circuit capable of detecting signal frequency on line and controlling the same.
In order to achieve the above main object, the present invention provides a wide frequency detection circuit, which comprises a wide frequency signal source, a high frequency filter circuit, a voltage conversion circuit, a comparison circuit, and a programmable processor, the wide frequency signal source is used for inputting an alternating voltage signal containing a zero-crossing signal of the same frequency of the power supply voltage, and is applied to the input side of the high-frequency filter circuit, the high-frequency filter circuit is used for filtering the high-frequency interference of the alternating voltage signal and outputting the filtered high-frequency interference to the voltage conversion circuit through the output side of the high-frequency filter circuit, the voltage conversion circuit outputs a low voltage signal to the comparison circuit and the programmable processor, the comparison circuit compares the input low voltage signal and generates a comparison pulse signal, the comparison circuit outputs the comparison pulse signal to the programmable processor so as to control the operation of the internal timer of the programmable processor.
In a further aspect, the wide frequency signal source includes an electrical grid and an equivalent impedance of a power transformer connected to the electrical grid.
In a further aspect, a transformer is connected between the high frequency filter circuit and the voltage conversion circuit.
In a further aspect, the high-frequency filter circuit includes a first inductor, a second inductor, a first capacitor, and an inverter, a first end of the second inductor is connected to the second terminal on the primary side of the transformer in series and then connected to the signal output terminal of the wide-frequency signal source, a first end of the first capacitor is connected to the first terminal on the primary side of the transformer in series and then grounded, a second end of the first capacitor is connected between the second end of the second inductor and the first end of the first inductor, a second end of the first inductor is connected to one side of the inverter, and the other side of the inverter is connected to the programmable processor.
In a further aspect, the voltage conversion circuit includes a first comparator and a second comparator, a first terminal of the secondary side of the transformer is connected to an inverting input terminal of the first comparator, a second terminal of the secondary side of the transformer is connected to a non-inverting input terminal of the first comparator, an output terminal of the first comparator is connected to a non-inverting input terminal of the second comparator, and an output terminal of the second comparator is connected to an input terminal of the comparison circuit.
In a further aspect, the comparison circuit includes a third comparator, a non-inverting input of the third comparator is connected to the output of the second comparator, and an output of the third comparator is connected to the programmable processor.
Therefore, the utility model discloses mainly including wide frequency signal source, high frequency filter circuit, voltage conversion circuit, comparison circuit, programmable logic controller (chip) etc. circuit module, can realize full-automatic closed loop, reduce the influence that the components and parts error brought for the result, the implementation is comparatively simple, only needs under one set of control parameter's the condition, just can adapt to 45Hz-65Hz voltage wide frequency fluctuation, can reach 1- ∞Hzin theory.
Therefore, the utility model discloses can be so that power electronic equipment avoids under the different frequency control parameter inconsistent, the limited problem of range of application, in the enough high condition of analog comparator and timer precision, the utility model discloses the frequency range that theoretically supports equipment to be suitable for is 1 infinity Hz.
Drawings
Fig. 1 is a schematic circuit diagram of an embodiment of the wide frequency detection circuit of the present invention.
Fig. 2 is a schematic circuit diagram of a comparison circuit in an embodiment of the wide frequency detection circuit of the present invention.
Fig. 3 is a schematic diagram of a ZCD comparator in an embodiment of the wide frequency detection circuit of the present invention.
Fig. 4 is a schematic diagram of multiple zero-crossing detection in an embodiment of the wide frequency detection circuit of the present invention.
Fig. 5 is a schematic diagram of a frequency tracking method applied in an embodiment of the wide frequency detection circuit of the present invention.
Fig. 6 is a schematic diagram of the input signal, ZCD comparator, timer, and PLL divider of the frequency tracking method applied in the embodiment of the wide frequency detection circuit of the present invention, which are connected in sequence.
Fig. 7 is a schematic diagram of a simplified process from grid voltage signal to frequency extraction of the frequency tracking method applied in the embodiment of the wide frequency detection circuit of the present invention.
Fig. 8 is a schematic diagram of an input signal Vin of a frequency tracking method applied in an embodiment of the wide frequency detection circuit of the present invention.
The present invention will be further explained with reference to the drawings and examples.
Detailed Description
The utility model is suitable for a need adapt to the power electronic equipment under the wide frequency range, on-line monitoring electric wire netting frequency to can carry out target tracking feedback control for the reference benchmark by electric wire netting frequency.
Referring to fig. 1, the utility model discloses a wide frequency detection circuit includes wide frequency signal source 10, high frequency filter circuit 20, voltage conversion circuit 30, comparison circuit 40, programmable processor 50, wide frequency signal source 10 is used for the input to contain the alternating voltage signal of mains voltage with frequency zero cross signal, and apply to the input side of high frequency filter circuit 20, high frequency filter circuit 20 is used for exporting voltage conversion circuit 30 through its output side after filtering alternating voltage signal's high frequency interference, voltage conversion circuit 30 outputs low voltage signal to comparison circuit 40 and programmable processor 50, comparison circuit 40 compares the low voltage signal of input and produces comparison pulse signal, comparison circuit 40 outputs comparison pulse signal to programmable processor 50, with the work of the internal timer of control programmable processor 50.
In the present embodiment, the wide frequency signal source 10 includes a load 1, a load 2, a load 3, a power grid, and an equivalent impedance of a power transformer T1 connected to the power grid, and a grid voltage signal is input from the power grid to the power transformer T1 and output to the input side of the high frequency filter circuit 20 through the equivalent impedance of the power transformer T1.
A transformer T2 is connected between the high-frequency filter circuit 20 and the voltage conversion circuit 30.
In this embodiment, the high-frequency filter circuit 20 includes a first inductor L1, a second inductor L2, a first capacitor C1 and an inverter 21, a first end of the second inductor L2 is connected in series with a second terminal of a primary side of a transformer T2 and then connected to a signal output terminal of the wide-frequency signal source 10, a first end of the first capacitor C1 is connected in series with a first terminal of a primary side of a transformer T2 and then grounded, a second end of the first capacitor C1 is connected between a second end of the second inductor L2 and a first end of the first inductor L1, a second end of the first inductor L1 is connected to one side of the inverter 21, and the other side of the inverter 21 is connected to the programmable processor 50.
In the present embodiment, the voltage conversion circuit 30 includes a first comparator U1 and a second comparator U2, a first terminal on a secondary side of a transformer T2 is connected to an inverting input terminal of the first comparator U1, a second terminal on a secondary side of the transformer T2 is connected to a non-inverting input terminal of the first comparator U1, an output terminal of the first comparator U1 is connected to a non-inverting input terminal of the second comparator U2, and an output terminal of the second comparator U2 is connected to an input terminal of the comparison circuit 40.
In the present embodiment, the comparing circuit 40 includes a third comparator U3, the non-inverting input terminal of the third comparator U3 is connected to the output terminal of the second comparator U2, and the output terminal of the third comparator U3 is connected to the programmable processor 50.
Preferably, the programmable processor 50 may be a TXF6200 chip. The TXF6200 chip is provided with a PLL fractional frequency division coefficient, and the frequency of an input alternating current signal can be accurately tracked by modifying the frequency division coefficient.
In practice, the wide frequency signal source 10 is responsible for providing power (V, I); the voltage conversion circuit 30 is responsible for converting the high voltage signal into a low voltage signal for the comparison circuit 40 and the programmable processor 50 to acquire and use; the comparison circuit 40 is responsible for comparing the input signals to generate comparison pulses, and the comparison pulses are input to the programmable processor 50, and the Timer triggers a designated pin (such as GPIOD4\ GPIOD5) to trigger the internal Timer of the chip to capture and time.
As shown in fig. 2 and 3, the comparator circuit 40 of the present embodiment is equivalent to a ZCD comparator, which has a hysteresis effect.
Specifically, the hysteresis of the ZCD comparator causes the judgment of the comparison value (zero value in the present embodiment) to be deviated (U is set to be zero value)H、ULAs 0), which is a natural phenomenon, there is a method that can make the detection at the zero crossing point more accurate by reducing the hysteresis, but it will easily introduce interference and cause the system cost to increase, so in this embodiment, the built-in Timer and data processing capability of the programmable processor 50 are introduced here, and the signal is captured, timed and filtered for many times, so as to reduce the interference and extract the more accurate zero crossing signalBecause the frequency fluctuation speed of the system is very slow, namely the ms level at the fastest speed, and the rapid processing capacity of the programmable processor 50 reaches more than 80MHz in most cases, the us level is only needed for processing the slowest deviation calibration data, and the speed difference between the us level and the us level is 1000 times, the zero point data correction is performed through the programmable processor 50, and the method is a very preferable method and can be widely applied to actual product design. As shown in fig. 4, a single zero-crossing detection has a deviation, but the deviation can be corrected to a nearly accurate value by a large margin through multiple times of accumulation.
Therefore, the utility model discloses mainly including wide frequency signal source 10, high frequency filter circuit 20, voltage conversion circuit 30, comparison circuit 40, programmable logic processor 50 (chip) etc. circuit module, can realize full-automatic closed loop, reduce the influence that the components and parts error brought for the result, the implementation is comparatively simple, only needs under one set of control parameter's the condition, just can adapt to the wide frequency fluctuation of 45Hz-65Hz voltage, can reach 1- ∞Hzin theory.
Therefore, the utility model discloses can be so that power electronic equipment avoids under the different frequency control parameter inconsistent, the limited problem of range of application, in the enough high condition of analog comparator and timer precision, the utility model discloses the frequency range that theoretically supports equipment to be suitable for is 1 infinity Hz.
This embodiment still provides a wide frequency detection circuit's frequency tracking method, be applied to foretell wide frequency detection circuit, see fig. 5, the utility model discloses a method includes that the electric wire netting voltage signal of going on the electric wire netting input through wide frequency detection circuit carries out real-time supervision to through comparison circuit 40 input programmable processor 50 trigger appointed pin (like GPIOD4\ GPIOD5), catch the timing with triggering programmable processor 50 built-in Timer, when monitoring electric wire netting voltage signal's zero crossing point, output trigger signal trigger Timer resets and restart timing, and save present numerical value in register TcntCalculating the frequency F of the input network signalinBy continuously updating the frequency FinI.e. frequency F of input network signalinThe frequency variation is tracked. Wherein, inputFrequency F of the mains signalinThe formula (1) shows that:
Fin＝1/(2*Tcnt) (1)
further, a frequency F is output in each cycleinThen, the next cycle utilizes the current cycle frequency FinTheoretical value of and last cycle frequency FinFor frequency FinContinuously correcting to input frequency F of electric network signalinAnd the frequency change is accurately tracked, so that the result is more accurate.
The tracking of the frequency change of the frequency Fin of the input power grid signal is obtained by the following formula:
Fin＝Fadc_clk/Nsamp (2)
Fadc_clk＝Nadc*Fsys_clk (3)
Fsys_clk＝pllsys*Fcry_clk (4)
wherein, FinFor input signal frequency of the network, Fadc_clkBuilt-in adc sampling frequency, N, for programmable processorssampNumber of points for periodic discretization of input signals in programmable processors (e.g., TXF6200 chips), NadcIs the division factor of the adc clock (relative to the system sys clock), pllsysIs the division factor (relative to the crystal oscillator clock) of the system clock, Fcry_clkIs the crystal frequency of the programmable processor.
It can be known that in order to ensure the consistency and stability of the whole control system, N must be ensured firstsampInvariable (N)sampThe number of discretization points in a single period is unchanged, the parameters of a system of the controller are unchanged, and the stability is unchanged).
The formula is collated to obtain formula (5):
in the formula (5), if
Is a decimal number, i.e.
Is decimal, and in order to ensure the consistency of the control system, there are
The simplification is as follows:
can be updated by
Or
Can achieve direct modification
The purpose of (2) is based on two aspects: 1) among many chip parameters, NadcIs an integer; 2) if the whole system also needs to consider other modules related to clk, it can be updated directly
Of course, most of the practical purposes are to modify pllsysFor frequency tracking purposes (but not exclusively by N)adcTo achieve the same objective).
The TXF6200 chip is provided with a PLL fractional frequency division coefficient, the frequency of an input alternating current signal can be accurately tracked by modifying the frequency division coefficient, and practical authentication is also feasible.
In particular, referring to fig. 6-8, the method primarily involves an input signal, a ZCD comparator, a timer, and a PLL divider. Wherein the ZCD comparator may be the comparator circuit 40 of the wide frequency detection circuit, and the timer and PLL frequency divider may be the programmable processor 50(TXF6200 chip) of the wide frequency detection circuit. The utility model discloses can fundamentally solve the influence that the frequency fluctuation brought, entire system only needsPeriodic update of pll using a set of control parameterssysThe device is made satisfactory for use at a wide frequency. Fig. 7 is a schematic diagram of a refinement process from grid voltage signal to frequency extraction, as shown in fig. 7.
In practical applications, if the input signal Vin (voltage signal) is as shown in fig. 8:
by carrying out zero-crossing detection on an input signal Vin, a Trig trigger signal generated by a zero-crossing point is detected to trigger a Timer to store a current value TcntWhile setting and restarting clocking.
The aim can be achieved or modified according to theoretical analysis. The description is given with a modification. And solving by using a formula, immediately updating, and immediately tracking the frequency change in the next period.
Therefore, the utility model discloses only need add a wide frequency detection circuit, can realize full-automatic closed loop, the implementation is comparatively simple, only needs under one set of control parameter's the condition at power electronic equipment, just can adapt to the wide frequency fluctuation of voltage of 45Hz-65Hz, can reach 1- ∞Hzin theory.
Therefore, the utility model discloses can be so that power electronic equipment avoids under the different frequency control parameter inconsistent, the limited problem of range of application, in the enough high condition of analog comparator and timer precision, the utility model discloses the frequency range that theoretically supports equipment to be suitable for is 1- ∞Hz, can fundamentally solve the influence that the frequency fluctuation brought, and entire system only need use one set of control parameter, and periodic update just makes equipment satisfy and use under wide frequency.
It should be noted that the above is only the preferred embodiment of the present invention, but the design concept of the present invention is not limited thereto, and all the insubstantial modifications made by using the design concept of the present invention also fall within the protection scope of the present invention.
Claims (6)
1. A wide frequency detection circuit, comprising:
the high-frequency interference signal processing circuit comprises a wide-frequency signal source, a high-frequency filter circuit, a voltage conversion circuit, a comparison circuit and a programmable processor, wherein the wide-frequency signal source is used for inputting an alternating-current voltage signal containing a power voltage same-frequency zero-crossing signal and applying the alternating-current voltage signal to the input side of the high-frequency filter circuit, the high-frequency filter circuit is used for filtering high-frequency interference of the alternating-current voltage signal and outputting the high-frequency interference to the voltage conversion circuit through the output side of the high-frequency filter circuit, the voltage conversion circuit outputs a low-voltage signal to the comparison circuit and the programmable processor, the comparison circuit compares the input low-voltage signal and generates a comparison pulse signal, and the comparison pulse signal is output to the programmable processor by the comparison circuit so as to control the internal timer.
2. The wide frequency detection circuit of claim 1, wherein:
the wide frequency signal source comprises an electrical grid and an equivalent impedance of a power transformer connected to the electrical grid.
3. The wide frequency detection circuit of claim 1, wherein:
and a transformer is connected between the high-frequency filter circuit and the voltage conversion circuit.
4. The wide frequency detection circuit of claim 3, wherein:
the high-frequency filter circuit comprises a first inductor, a second inductor, a first capacitor and a current converter, wherein a first end of the second inductor is connected with a second terminal of a primary side of the transformer in series and then connected with a signal output end of the wide-frequency signal source, a first end of the first capacitor is connected with a first terminal of the primary side of the transformer in series and then grounded, a second end of the first capacitor is connected between a second end of the second inductor and a first end of the first inductor, a second end of the first inductor is connected with one side of the current converter, and the other side of the current converter is connected with the programmable processor.
5. The wide frequency detection circuit of claim 4, wherein:
the voltage conversion circuit comprises a first comparator and a second comparator, wherein a first terminal of a secondary side of the transformer is connected with an inverting input end of the first comparator, a second terminal of the secondary side of the transformer is connected with a non-inverting input end of the first comparator, an output end of the first comparator is connected with a non-inverting input end of the second comparator, and an output end of the second comparator is connected with an input end of the comparison circuit.
6. The wide frequency detection circuit of claim 5, wherein:
the comparison circuit comprises a third comparator, the non-inverting input end of the third comparator is connected with the output end of the second comparator, and the output end of the third comparator is connected with the programmable processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020584301.4U CN212364422U (en) | 2020-04-17 | 2020-04-17 | Wide frequency detection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020584301.4U CN212364422U (en) | 2020-04-17 | 2020-04-17 | Wide frequency detection circuit |
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| CN212364422U true CN212364422U (en) | 2021-01-15 |
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| CN202020584301.4U Active CN212364422U (en) | 2020-04-17 | 2020-04-17 | Wide frequency detection circuit |
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