CN212344100U - High-precision current scaling circuit applied to display driving - Google Patents
High-precision current scaling circuit applied to display driving Download PDFInfo
- Publication number
- CN212344100U CN212344100U CN202021306592.7U CN202021306592U CN212344100U CN 212344100 U CN212344100 U CN 212344100U CN 202021306592 U CN202021306592 U CN 202021306592U CN 212344100 U CN212344100 U CN 212344100U
- Authority
- CN
- China
- Prior art keywords
- circuit
- transistor
- current
- current mirror
- scaling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Amplifiers (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The utility model provides a be applied to and show driven high accuracy electric current zoom circuit is applied to and shows driven high accuracy electric current zoom circuit and include a current mirror zoom circuit to and connect in the compensating circuit of this current mirror zoom circuit's output, be used for compensating the voltage of current mirror zoom circuit output. In the present invention, a compensation circuit is connected between the current mirror scaling circuit and the pixel unit circuit, and the compensation circuit compensates the voltage at the output terminal of the current mirror scaling circuit; the drain-source voltages of the two transistors in the current mirror scaling circuit are basically consistent, so that the current scaling circuit is ensured to have a relatively accurate current scaling ratio.
Description
Technical Field
The utility model relates to a current zoom technical field, concretely relates to be applied to and show driven high accuracy current zoom circuit.
Background
With the development of display technology in recent years, OLED (Organic Light-Emitting Diode) panels have been favored by various large display manufacturers due to their advantages of ultra-high contrast, faster response speed, wider viewing angle, wider color gamut, and thinner and lighter weight, and many related products have been introduced. Although the current flat panel Display market still occupies the LCD (Liquid Crystal Display), the OLED Display panel has been increasing year by year and has a tendency to push the Liquid Crystal Display market.
The biggest difference between the OLED and the LCD is that the OLED is active light emitting, and the light emitting brightness is controlled according to the magnitude of the current. Therefore, the driving methods of the OLED pixel circuit mainly include voltage-type driving and current-type driving. The voltage-type driving is to apply different voltages to the pixel circuit driving tubes to control the magnitude of the current, however, because the performance parameters of the different driving tubes in the display array are different, the circuit is usually required to compensate for the display uniformity. The current mode driving is to directly input current to the pixel circuit, and can compensate for the difference of the driving tube, so it is also a common pixel driving method in the OLED or LED display driving circuit.
At present, input signals of a video interface in a display system are Digital signals, but different luminances of a display panel are often controlled by different Analog signals, that is, the input signals need to be subjected to Digital-to-Analog Converter (DAC). However, in current-mode driving, the output current of the DAC is greatly different from the actual operating current of the pixel unit, and therefore current scaling is often required. Unlike the current mirror circuit function in conventional analog circuits, the current scaling of display drive tends to be large (typically tens or hundreds), and the input current varies with input data (from a few microamps to tens of milliamps). If the common current mirror current scaling circuit is adopted, different current scaling ratios exist under different input current conditions, so that the uniformity of the final display is greatly influenced. Therefore, how to achieve accurate current scaling is a key issue for current-mode pixel driving circuits.
Disclosure of Invention
In view of this, the utility model provides a be applied to display drive's high accuracy current zoom circuit compensates the voltage of current mirror zoom circuit output through setting up a compensating circuit to improve the precision of zooming.
The utility model provides a be applied to and show driven high accuracy electric current zoom circuit, including a current mirror zoom circuit to and connect in the compensating circuit of this current mirror zoom circuit's output, be used for compensating the voltage of current mirror zoom circuit output.
Preferably, the current mirror scaling circuit comprises a first transistor and a second transistor, and the width-to-length ratio of the gates of the first transistor and the second transistor is N.
Preferably, the compensation circuit is connected to the drain of the second transistor for compensating the voltage at the drain terminal thereof, so that the drain-source voltages of the first transistor and the second transistor are equal.
Preferably, the compensation circuit is a compensation transistor, and the gate of the compensation transistor is connected with a bias circuit for generating a bias voltage for the gate of the compensation circuit.
Preferably, the bias circuit includes a second current mirror scaling circuit, a second compensation circuit connected to the second mirror scaling circuit, a third current mirror scaling circuit connected to the second compensation circuit, and a bias voltage output circuit connected to the third current mirror scaling circuit, and the bias voltage output circuit is connected to the compensation circuit.
Preferably, the second current mirror scaling circuit comprises a fourth transistor, and the fourth transistor and the first transistor form a current mirror; the width-to-length ratio of the first transistor to the fourth transistor is N: and (4) X.
Preferably, the second compensation circuit is a fifth transistor.
Preferably, the third current mirror scaling circuit comprises a sixth transistor and a seventh transistor, and the width-to-length ratio of the gates of the sixth transistor and the seventh transistor is X: 1.
preferably, the bias voltage output circuit includes an eighth transistor and a ninth transistor both of which are diode-connected.
The utility model has the advantages and positive effects that: in the present invention, a compensation circuit is connected between the current mirror scaling circuit and the pixel unit circuit, and the compensation circuit compensates the voltage at the output terminal of the current mirror scaling circuit; the drain-source voltages of the two transistors in the current mirror scaling circuit are basically consistent, so that the current scaling circuit is ensured to have a relatively accurate current scaling ratio.
Drawings
FIG. 1 is a schematic circuit diagram of a prior art current scaling circuit;
fig. 2 is a schematic circuit diagram of a high-precision current scaling circuit applied to display driving according to the present invention;
fig. 3 is a schematic diagram illustrating the comparison between the scaling consistency of the high-precision current scaling circuit applied to the display driver and the current scaling circuit in the prior art.
Detailed Description
For a better understanding of the present invention, the following further description is given in conjunction with the following embodiments and accompanying drawings.
As shown in fig. 2, the present invention provides a high precision current scaling circuit applied to display driving, which includes a current mirror scaling circuit 10, and a compensation circuit 30 connected to the output end of the current mirror scaling circuit 10, for compensating the voltage at the output end of the current mirror scaling circuit 10.
A conventional current scaling circuit is shown in fig. 1, and includes a current mirror scaling circuit 10a and a pixel unit circuit 20a connected to the current mirror scaling circuit 10a, where the current mirror scaling circuit 10a adopts a basic current mirror structure and includes a first transistor M1a and a second transistor M2a, the first transistor M1a adopts a diode connection, and an input current IinFlows through the diode-connected first transistor M1a and establishes a corresponding voltage at its gate; the gate voltage drives the second transistor M2a to generate the corresponding output current Iout. The current scaling ratio is determined by the ratio of the gate width to length ratio (W/L) of the first transistor M1a and the second transistor M2a, the first transistor M1a and the second transistor M2The ratio of the gate width-to-length ratio (W/L) of the transistor M2a is set to N, i.e., the input current IinAnd an output current IoutThe ratio of (A) to (B) is Iin/IoutN (N is the current scaling ratio, which tends to be greater than 100).
The DAC is connected to the pixel unit circuit 20a through the current mirror scaling circuit 10a, and since the DAC output current is generally much larger than the actual operating current of the pixel unit circuit 20a, the current scaling ratio needs a larger value; meanwhile, since the output current range of the DAC is generally from a few microamps to a few tens of milliamps, the current mirror scaling circuit 10a needs to implement more accurate current scaling in a larger current range. However, the current scaling ratio of the current mirror scaling circuit 10a is affected by the drain-source voltage difference of the transistors, and the drain-source voltage difference is different under different input currents, which results in poor scaling ratio consistency of the conventional current mirror scaling circuit.
The utility model discloses a current mirror zoom circuit 10 is the same with pixel cell circuit 20a structure with the current mirror zoom circuit 10a among the prior art, in order to distinguish the utility model discloses with prior art, adopt different reference numerals. In the present invention, a compensation circuit 30 is connected between the current mirror scaling circuit 10 and the pixel unit circuit 20, and the voltage of the output end of the current mirror scaling circuit 10 is compensated by the compensation circuit 30.
Further, the current mirror scaling circuit 10 includes a first transistor M1 and a second transistor M2, the first transistor M1 is diode-connected, and the width-to-length ratio of the gates of the first transistor M1 and the second transistor M2 is N, which results in a difference between drain-to-source voltages of the first transistor M1 and the second transistor M2, and may result in poor uniformity of the scaling ratio of the current mirror scaling circuit 10.
The utility model discloses connect a compensating circuit 30 at the drain electrode of second transistor M2, compensate the drain terminal voltage of second transistor M2 for first transistor M1 is unanimous with second transistor M2 drain-source voltage.
Further, the compensation circuit 30 is a compensation transistor M3, the gate of which is connected to a bias circuit 50 for generating a bias voltage for the gate of the compensation circuit 30.
Further, the bias circuit 50 includes a second current mirror scaling circuit, a second compensation circuit connected to the second mirror scaling circuit, a third current mirror scaling circuit connected to the second compensation circuit, and a bias voltage output circuit connected to the third current mirror scaling circuit, and the bias voltage output circuit is connected to the compensation circuit 30.
Further, the second current mirror scaling circuit includes a fourth transistor M4, the fourth transistor M4 and the first transistor M1 form a current mirror; the width-to-length ratio of the gates of the first transistor M1 and the fourth transistor M4 is N: x; the second compensation circuit is a fifth transistor M5, the fifth transistor M5 is connected to the drain of the fourth transistor M4, and is used for reducing the current scaling difference caused by the voltage difference between the drain and the source of the first transistor M1 and the fourth transistor M4; the fifth transistor adopts a diode connection method; the third current mirror scaling circuit comprises a sixth transistor M6 and a seventh transistor M7, wherein the width-to-length ratio of the gates of the sixth transistor M6 and the seventh transistor M7 is X: 1; the bias voltage output circuit comprises an eighth transistor M8 and a ninth transistor M9 which are both diode-connected, wherein the gate of the eighth transistor M8 is connected to the gate of the compensation transistor M3 to provide the bias voltage VBIAS for the compensation transistor M3.
The bias circuit 50 performs two-stage scaling by the second current mirror scaling circuit and the third current mirror scaling circuit, so that the scaled current Icopy2Circuit I scaled by current mirror scaling circuit 10outEqual, i.e.:
INM3＝Iout≈Icopy2 (1)
thereby ensuring the gate-source voltage V of the compensating transistor M3GS3And the gate-source voltage V of the eighth transistor M8GS5Equal; since the first transistor M1, the ninth transistor M9, and the eighth transistor M8 are all diode-connected, the drain-source voltage V of the first transistor M1DS1A gate-source voltage V of the first transistor M1GS1,2A gate-source voltage V of the ninth transistor M9GS6And the gate-source voltage V of the eighth transistor M8GS5Same, and the drain-source voltage V of the second transistor M2DS2And the gate-source voltage V of the ninth transistor M9GS6Equal, i.e.:
vDS1＝vGS1,2≈vGS6≈vGS5≈VGS3 (2)；
vDS2≈vGS6 (3)
thereby obtaining the drain-source voltage V of the second transistor M2DS2And the drain-source voltage V of the first transistor M1DS1The current scaling circuit is basically consistent, so that the current scaling circuit is ensured to have a more accurate current scaling ratio.
Use the current input scope to be 10uA-2.55mA, carry out the scaling of 100 times electric current as the example, the utility model discloses a simulation of current mirror scaling circuit 10 and traditional current mirror scaling circuit 10a is to for example shown in FIG. 3, and the fluctuation range of traditional current scaling ratio is 90.9-98.9, and the scaling ratio of novel current scaling circuit 10 is 99.9-100.01, and the scaling ratio uniformity that also novel current scaling circuit 10 is better than traditional current scaling circuit far away.
On the other hand, to provide the scaling method applied to the high-precision current scaling circuit of display driving, the compensation circuit 30 is provided to compensate the voltage at the output terminal of the current mirror scaling circuit 10, so that the drain-source voltage V of the second transistor M2DS2And the drain-source voltage V of the first transistor M1DS1The current scaling circuit is basically consistent, so that the current scaling circuit is ensured to have a more accurate current scaling ratio.
It should be noted that the circuit structure and method can be applied to any current scaling circuit, in addition to the display driver circuit.
The embodiments of the present invention have been described in detail, but the description is only for the preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should be covered by the present patent.
Claims (9)
1. A high-precision current scaling circuit applied to display driving is characterized in that: the current mirror scaling circuit comprises a current mirror scaling circuit and a compensation circuit connected to the output end of the current mirror scaling circuit and used for compensating the voltage at the output end of the current mirror scaling circuit.
2. A high precision current scaling circuit for display driving as claimed in claim 1, wherein: the current mirror scaling circuit comprises a first transistor and a second transistor, wherein the width-to-length ratio of the grid electrodes of the first transistor and the second transistor is N.
3. A high precision current scaling circuit for display driving as claimed in claim 2, wherein: the compensation circuit is connected to the drain of the second transistor and is used for compensating the voltage of the drain terminal of the second transistor, so that the drain-source voltages of the first transistor and the second transistor are equal.
4. A high precision current scaling circuit for display driving as claimed in claim 2 or 3, wherein: the compensation circuit is a compensation transistor, the grid electrode of which is connected with a bias circuit and used for generating a bias voltage for the grid electrode of the compensation circuit.
5. The high precision current scaling circuit applied to display driving of claim 4, wherein: the bias circuit comprises a second current mirror scaling circuit, a second compensation circuit connected with the second mirror scaling circuit, a third current mirror scaling circuit connected with the second compensation circuit and a bias voltage output circuit connected with the third current mirror scaling circuit, and the bias voltage output circuit is connected with the compensation circuit.
6. The high-precision current scaling circuit applied to display driving according to claim 5, wherein: the second current mirror scaling circuit comprises a fourth transistor, and the fourth transistor and the first transistor form a current mirror; the width-to-length ratio of the first transistor to the fourth transistor is N: and (4) X.
7. A high precision current scaling circuit for display driving as claimed in claim 5 or 6, wherein: the second compensation circuit is a fifth transistor.
8. A high precision current scaling circuit for display driving as claimed in claim 1, wherein: the third current mirror scaling circuit comprises a sixth transistor and a seventh transistor, wherein the width-to-length ratio of the gates of the sixth transistor to the seventh transistor is X: 1.
9. a high precision current scaling circuit for display driving as claimed in claim 1, wherein: the bias voltage output circuit includes an eighth transistor and a ninth transistor both diode-connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021306592.7U CN212344100U (en) | 2020-07-06 | 2020-07-06 | High-precision current scaling circuit applied to display driving |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021306592.7U CN212344100U (en) | 2020-07-06 | 2020-07-06 | High-precision current scaling circuit applied to display driving |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212344100U true CN212344100U (en) | 2021-01-12 |
Family
ID=74080545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021306592.7U Active CN212344100U (en) | 2020-07-06 | 2020-07-06 | High-precision current scaling circuit applied to display driving |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212344100U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111818690A (en) * | 2020-07-06 | 2020-10-23 | 天津中科新显科技有限公司 | High-precision current scaling circuit and method applied to display driving |
| CN117095635A (en) * | 2023-09-18 | 2023-11-21 | 欣瑞华微电子(上海)有限公司 | Display device |
-
2020
- 2020-07-06 CN CN202021306592.7U patent/CN212344100U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111818690A (en) * | 2020-07-06 | 2020-10-23 | 天津中科新显科技有限公司 | High-precision current scaling circuit and method applied to display driving |
| CN111818690B (en) * | 2020-07-06 | 2023-06-06 | 天津中科新显科技有限公司 | High-precision current scaling circuit and scaling method applied to display driving |
| CN117095635A (en) * | 2023-09-18 | 2023-11-21 | 欣瑞华微电子(上海)有限公司 | Display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI257600B (en) | Standard voltage generation circuit, display driving circuit, display apparatus, and generation method of standard voltage | |
| JP5014338B2 (en) | Current-driven display device | |
| US8917224B2 (en) | Pixel unit circuit and OLED display apparatus | |
| KR100532722B1 (en) | Display driver circuit, display panel, display device, and display drive method | |
| US8502811B2 (en) | Pixel driving device, light emitting device, driving/controlling method thereof, and electronic device | |
| US7570244B2 (en) | Display device | |
| CN212344100U (en) | High-precision current scaling circuit applied to display driving | |
| WO2017008329A1 (en) | Peripheral compensation system and method for pixel matrix, and display system | |
| US9640113B2 (en) | Compensation circuit design of active organic light emitting diode display system | |
| WO2020228318A1 (en) | Display panel and display apparatus | |
| WO2016129463A1 (en) | Display device and method for driving same | |
| WO2014046029A1 (en) | Data line driving circuit, display device including same, and data line driving method | |
| TW201322223A (en) | Pixel circuit and driving method thereof | |
| KR102648976B1 (en) | Light Emitting Display Device and Driving Method thereof | |
| WO2007018006A1 (en) | Display apparatus | |
| WO2019095637A1 (en) | Amoled display panel and image display apparatus | |
| CN111048044A (en) | Voltage programming type AMOLED pixel driving circuit and driving method thereof | |
| JP2012252337A (en) | Driving apparatus, oled panel and method for driving oled panel | |
| US20240169915A1 (en) | Pixel driving circuit, driving method thereof and display panel | |
| KR102415732B1 (en) | Subpixel Circuit, Organic Light Emitting Display Device and Method of Driving the same | |
| KR20220059776A (en) | Display Device and Driving Method of the same | |
| CN102110413B (en) | Device Circuit and Display Device | |
| US20070046589A1 (en) | Current driver circuit for a current-driven type of image displayer | |
| CN112530365A (en) | Power supply circuit, chip and display screen | |
| CN111818690B (en) | High-precision current scaling circuit and scaling method applied to display driving |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |