CN212342604U

CN212342604U - High-efficient thermal-insulated semiconductor chip

Info

Publication number: CN212342604U
Application number: CN202021171856.2U
Authority: CN
Inventors: 龙双权
Original assignee: Suzhou Heliji Electronics Co ltd
Current assignee: Suzhou Heliji Electronics Co ltd
Priority date: 2020-06-20
Filing date: 2020-06-20
Publication date: 2021-01-12
Anticipated expiration: 2030-06-20

Abstract

The utility model discloses a high-efficiency heat-insulation semiconductor chip, which comprises a semiconductor, a sealing material, a plastic-sealed layer, a metal wire, a frame, a vertical frame rod, an insulating substrate, a chip and a high-efficiency heat dissipation structure, wherein the semiconductor of the utility model is provided with an embedded high-efficiency heat dissipation structure, a plurality of heat dissipation grooves are arranged at the bottom wall of the chip at intervals, a superposed heat absorption sheet and a heat conduction plate are arranged at the lower layer of the structure, heat conduction silica gel is coated between the surface of the heat absorption sheet and the heat conduction plate, a multiple heat dissipation structure is formed by combination, an electronic element generates heat when operating, the heat conducting grooves are used for directly leading out hot air, heat conducted out through the heat absorbing sheets and the heat conducting plate, the heat conducting channels are used for shunting and outputting the exhaust port, and the ventilating plate arranged on the ceramic substrate is used as a supporting heat radiating plate, so that the heat insulation performance and the heat radiating performance can be greatly improved, and the usability of the semiconductor chip is further improved.

Description

High-efficient thermal-insulated semiconductor chip

Technical Field

The utility model relates to a high-efficient thermal-insulated semiconductor chip belongs to semiconductor chip technical field.

Background

A semiconductor chip is a semiconductor device which is manufactured by etching and wiring a semiconductor wafer to realize a certain function, and is widely used for electronic product arrangement.

The existing semiconductor chip has various shapes and is assembled by combining electronic module elements, and the heat insulation effect is easily influenced by using more and complicated electronic elements, so that the heat dissipation of the semiconductor chip is poor, and the usability of the semiconductor chip is further reduced.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a high-efficient thermal-insulated semiconductor chip to solve the various and combination electronic module component of current semiconductor chip shape and assemble, dispose many and complicated electronic component and use and influence thermal-insulated effect easily, lead to semiconductor chip's the heat dissipation relatively poor, and then reduce the problem of semiconductor chip usability.

In order to achieve the above purpose, the present invention is realized by the following technical solution: the structure of the high-efficiency heat-insulation semiconductor chip comprises a semiconductor, a sealing material, a plastic package layer, a metal wire, a frame, a vertical frame rod, an insulating substrate, a chip and a high-efficiency heat dissipation structure, wherein the semiconductor is provided with an embedded centered chip, the chip is assembled in a groove formed by the vertical frame rod correspondingly, the semiconductor is provided with the metal wire used in an assembled mode, the corresponding end points of the metal wire are connected with the chip in a conductive mode, the chip is installed in a hollow groove of the sealing material rack, the sealing material is filled in the groove face of the upper portion of the semiconductor structure, the upper portion of the semiconductor structure is matched with the groove face to form the plastic package layer, and the semiconductor is provided with the.

Furthermore, the high-efficiency heat dissipation structure comprises a heat conduction channel, an exhaust port, a ceramic substrate, a vent plate, a heat dissipation groove, a heat absorption sheet and a heat conduction plate, wherein the heat conduction channel is arranged at the inner gap of the heat dissipation groove, the heat dissipation groove is integrally formed by an empty groove between the ceramic substrate and a frame, the corresponding end of the exhaust port penetrates through the heat conduction channel, the vent plate is provided with a plurality of corresponding local exhaust ports, the exhaust ports are arranged at the periphery of the heat absorption sheet connected with the ceramic substrate in a matching mode, the heat absorption sheet is installed on the groove of the heat conduction plate, and the heat conduction plate is arranged at the middle position of.

Further, the insulating substrate is mounted on a bottom position of the semiconductor structure.

Further, the vertical frame rods are connected to the inner side of the frame along the wall.

Further, the frame is installed at the upper groove surface of the semiconductor.

Furthermore, a filling type sealing glue material is arranged in the plastic sealing layer.

Furthermore, heat-conducting silica gel is coated between the surface of the heat absorbing sheet and the heat conducting plate.

Furthermore, the heat dissipation grooves are correspondingly arranged at the bottom wall of the chip.

Advantageous effects

The utility model relates to a high-efficient thermal-insulated semiconductor chip, be equipped with embedded high-efficient heat radiation structure on the semiconductor, the heat dissipation recess is equipped with a plurality ofly and interval arrangement in chip diapire position department, structure lower floor's position is equipped with the concatenation formula heat absorbing sheet, the heat-conducting plate, scribble heat conduction silica gel between heat absorbing sheet surface and the heat-conducting plate, the combination has constituted multiple heat radiation structure, electronic component function produces the heat, directly draw hot gas and pass through the heat absorbing sheet via a plurality of heat dissipation recesses, the heat that the heat-conducting plate was derived, shunt output gas vent via the heat conduction channel, the air vent that is equipped with on the ceramic substrate uses as supporting the heating panel, can improve thermal-insulated and.

Drawings

Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:

fig. 1 is a schematic structural view of a high-efficiency heat-insulating semiconductor chip according to the present invention;

fig. 2 is an assembly schematic view of the high-efficiency heat dissipation structure of the present invention;

fig. 3 is the utility model discloses a high-efficient heat radiation structure middle part assembly schematic diagram.

In the figure: the heat-conducting module comprises a semiconductor-1, a sealing compound-2, a plastic packaging layer-3, a metal wire-4, a frame-5, a vertical frame rod-6, an insulating substrate-7, a chip-8, a high-efficiency heat-radiating structure-9, a heat-conducting channel-70, an air outlet-71, a ceramic substrate-72, a ventilating plate-73, a heat-radiating groove-74, a heat-absorbing sheet-75 and a heat-conducting plate-76.

Detailed Description

In order to make the technical means, creation features, achievement purposes and functions of the present invention easy to understand, the present invention is further described below with reference to the following embodiments.

Referring to fig. 1-3, the present invention provides a technical solution: the structure of the high-efficiency heat-insulation semiconductor chip comprises a semiconductor 1, a sealing compound 2, a plastic package layer 3, a metal wire 4, a frame 5, a vertical frame rod 6, an insulating substrate 7, a chip 8 and a high-efficiency heat dissipation structure 9, wherein the semiconductor 1 is provided with an embedded centered chip 8, the chip 8 is assembled in a groove correspondingly formed by the vertical frame rod 6, the semiconductor 1 is provided with the metal wire 4 used in an assembling mode, the metal wire 4 corresponds to an end point and is connected with the chip 8 in a conduction mode, the chip 8 is installed in the groove formed in the space of the sealing compound 2, the sealing compound 2 is filled in the groove surface at the upper part of the semiconductor 1, the plastic package layer 3 is arranged at the upper part of the semiconductor 1, the semiconductor 1 is provided with the embedded high-efficiency heat dissipation structure 9, and the high-efficiency heat dissipation structure 9 comprises a heat conduction channel 70, an exhaust port 71, a, Heat absorbing sheets 75 and a heat conducting plate 76, wherein the heat conducting channels 70 are arranged at the inner gaps of the opposite heat radiating grooves 74, the heat dissipation groove 74 is formed by integrating the empty groove between the ceramic substrate 72 and the frame 5, the corresponding end of the exhaust port 71 penetrates the heat conduction channel 70, the vent plate 73 is provided with a plurality of corresponding partial air vents 71, the air vents 71 are arranged at the periphery of a heat absorbing sheet 75 matched with the ceramic substrate 72, the heat absorbing plate 75 is installed on the groove of the heat conductive plate 76, the heat conductive plate 76 is disposed on the central position of the ceramic substrate 72, the insulating substrate 7 is arranged at the bottom of the semiconductor 1 structure, the vertical frame rod 6 is connected with the inner side of the frame 5 along the wall, the frame 5 is arranged on the groove surface of the upper part of the semiconductor 1, the plastic sealing layer 3 is internally provided with a filling type sealing glue material 2, and heat-conducting silica gel is coated between the surface of the heat absorbing sheet 75 and the heat conducting plate 76, and the heat-radiating grooves 74 are correspondingly arranged at the bottom wall of the chip 8.

The heat dissipation grooves 74 are arranged on the bottom wall of the chip 8 at intervals, the lower layer of the structure is provided with a splicing type heat absorption sheet 75 and a heat conduction plate 76, and heat conduction silica gel is coated between the surface of the heat absorption sheet 75 and the heat conduction plate 76 to form a multiple heat dissipation structure.

For example: when the heat dissipation structure is used, the semiconductor 1 is provided with the embedded efficient heat dissipation structure 9, the heat dissipation grooves 74 are provided with a plurality of heat absorption sheets 75 and heat conduction plates 76 which are arranged at the bottom wall of the chip 8 at intervals, the lower layer of the structure is provided with the overlapped heat absorption sheets 75 and the heat conduction plates 76, heat conduction silica gel is coated between the surfaces of the heat absorption sheets 75 and the heat conduction plates 76, the multiple heat dissipation structures are formed by combination, the electronic elements generate heat in operation, hot air and the heat led out through the heat absorption sheets 75 and the heat conduction plates 76 are directly led out through the heat dissipation grooves 74, the heat is shunted out of the exhaust ports 71 through the heat conduction channels 70, and the vent plates 73 arranged on the ceramic substrate 72 are used.

The utility model provides a problem that the various and combination electronic module component of current semiconductor chip shape assembles, and the electronic component that the configuration is many and complicated uses and influences thermal-insulated effect easily, and the heat dissipation that leads to semiconductor chip is relatively poor, and then reduces semiconductor chip usability, the utility model discloses a combination of each other of above-mentioned parts makes up and has constituted multiple heat radiation structure, can improve thermal-insulated and heat dispersion greatly, and then improves semiconductor chip's usability.

The basic principles and the main features of the invention and the advantages of the invention have been shown and described above, it will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, but that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. The utility model provides a high-efficient thermal-insulated semiconductor chip, its structure includes semiconductor (1), seals compound (2), plastic envelope layer (3), metal wire (4), frame (5), hangs down frame pole (6), insulating substrate (7), chip (8), high-efficient heat radiation structure (9), its characterized in that:

the semiconductor structure is characterized in that an embedded centered chip (8) is arranged on the semiconductor (1), the chip (8) is assembled in a groove correspondingly formed by the vertical frame rod (6), an assembled metal wire (4) is arranged on the semiconductor (1), the end point corresponding to the metal wire (4) is connected with the chip (8) in a conductive mode, the chip (8) is installed in the groove built on the frame of the sealing rubber material (2), the sealing rubber material (2) is filled in the groove surface of the upper portion of the structure of the semiconductor (1), the upper portion of the structure of the semiconductor (1) is provided with a plastic sealing layer (3), and the semiconductor (1) is provided with an embedded efficient heat dissipation structure (9).

2. A high efficiency thermally insulated semiconductor chip as recited in claim 1, wherein: the efficient heat dissipation structure (9) comprises heat conduction channels (70), air outlets (71), a ceramic substrate (72), a vent plate (73), heat dissipation grooves (74), heat absorption sheets (75) and a heat conduction plate (76), wherein the heat conduction channels (70) are arranged in the inner gap of the ventilation grooves (74), the heat dissipation grooves (74) are integrally formed by empty grooves between the ceramic substrate (72) and a frame (5), the corresponding ends of the air outlets (71) penetrate through the heat conduction channels (70), a plurality of corresponding local air outlets (71) are formed in the vent plate (73), the air outlets (71) are formed in the periphery of the heat absorption sheets (75) connected with the ceramic substrate (72), the heat absorption sheets (75) are installed on the grooves of the heat conduction plate (76), and the heat conduction plate (76) is arranged in the middle position of the ceramic substrate (72).

3. A high efficiency thermally insulated semiconductor chip as recited in claim 1, wherein: the insulating substrate (7) is arranged at the bottom of the semiconductor (1) structure.

4. A high efficiency thermally insulated semiconductor chip as recited in claim 1, wherein: the vertical frame rods (6) are connected with the inner side of the frame (5) along the wall.

5. A high efficiency thermally insulated semiconductor chip as recited in claim 1, wherein: the frame (5) is arranged on the upper groove surface of the semiconductor (1).

6. A high efficiency thermally insulated semiconductor chip as recited in claim 1, wherein: and a filling type sealing glue material (2) is arranged in the plastic sealing layer (3).