CN212322244U

CN212322244U - SPI Flash maintenance system of embedded system

Info

Publication number: CN212322244U
Application number: CN202021133375.2U
Authority: CN
Inventors: 段作杰; 宋兴嘉
Original assignee: Shenzhou Longxin Intelligent Technology Co ltd
Current assignee: Shenzhou Longxin Intelligent Technology Co ltd
Priority date: 2020-06-18
Filing date: 2020-06-18
Publication date: 2021-01-08
Anticipated expiration: 2030-06-18

Abstract

The utility model discloses a SPI Flash maintenance system of embedded system, including the PCB board, arranged on the PCB board: the first IC seat and the first chip are fixedly inserted on the first IC seat; the second IC seat and a second chip fixedly inserted on the second IC seat; the toggle switch is provided with two output ends; the embedded processor is electrically connected with the toggle switch; the key is electrically connected with the embedded processor; an LED electrically connected with the embedded processor. The utility model discloses in, owing to adopted SPI Flash's maintenance design, avoid carrying out the loaded down with trivial details operations such as SPI Flash's the erasing, burn and write through the keyboard instruction, strengthened application system's security, owing to adopted the duplication burning record of two IC seats, increase the stability and the maintainability of system, embedded board card that can greatly reduced is SPI Flash's maintenance work in each life cycle.

Description

SPI Flash maintenance system of embedded system

Technical Field

The utility model belongs to the technical field of the circuit board burns record, specifically be a SPI Flash maintenance system of embedded system.

Background

At present, many embedded processors support the starting of the SPI Flash, so that in practical application, many schemes adopt the starting mode of the SPI Flash, and for an embedded system which selects the SPI Flash as the starting, the maintenance work of the SPI Flash must be done, and the maintenance work mainly comprises the following steps: the method comprises the steps that a bare chip of the SPI Flash is burnt, program burning and refreshing work in the SPI Flash is carried out, an initialization program for starting a system is burnt in the SPI Flash in advance, a processor of the embedded system supports starting from the SPI Flash, and the SPI Flash chip for starting can be correctly realized only when a circuit is correctly enabled on power-on.

In the practical application scheme, the common SPI Flash programming method includes: carrying out bare chip programming on the SPI Flash by using a special programming device for the SPI Flash; the programming device of the embedded processor is used for connecting the embedded processor and then programming the SPI Flash; and (3) using other storage equipment to complete the programming of the SPI Flash through a driving program after the embedded system is started, which is commonly called as 'flashing'.

The use of a special programming device for the SPI Flash to perform bare chip programming on the SPI Flash requires that: the upper computer, the programming device driver and the application program of the common operating system are installed, the bare chip of the SPI Flash can be programmed, and the SPI Flash needs to be plugged or welded on the embedded system mainboard after programming is completed, so that the method is suitable for the factory batch production link.

And (3) programming by using a programming device of the embedded processor: the hardware functions of the mainboard of the upper computer for installing the operating system, the programming device driver and the application program and the embedded processor are good, and the mode is suitable for the board card maintenance upgrading and debugging stage.

After the embedded system is started, the SPI Flash is programmed through a driver: the system is required to be fully operational, and this approach is generally suitable for a fever sufferer to upgrade, with the risk of a complete breakdown of the system.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a: in order to solve the technical problem existing in reality, the SPI Flash maintenance system of the embedded system is provided.

The utility model adopts the technical scheme as follows:

the SPI Flash maintenance system of the embedded system comprises a PCB board, wherein the PCB board is provided with:

the first IC seat and the first chip are fixedly inserted on the first IC seat;

the second IC seat and a second chip fixedly inserted on the second IC seat;

the toggle switch is provided with two output ends, wherein one output end is electrically connected with the first IC seat, and the other output end is electrically connected with the second IC seat;

the embedded processor is electrically connected with the toggle switch, and the embedded processor is electrically connected with the first IC seat and the second IC seat;

the key is electrically connected with the embedded processor;

an LED electrically connected with the embedded processor.

The embedded processor supports starting of the SPI Flash chip.

And the embedded processor and the toggle switch are electrically connected in an SPI CS mode.

And the first IC seat, the second IC seat and the keys are electrically connected by an SPI BUS.

The key, the LED and the embedded processor are electrically connected by adopting a GPIO (general purpose input/output) mode.

The keys are connected in a key input mode, but not limited to this mode.

The LED adopts an LED lamp display mode, but is not limited to the LED lamp display mode.

The first chip stores a related program chip, and the second chip is a blank chip or a program chip to be updated.

To sum up, owing to adopted above-mentioned technical scheme, the beneficial effects of the utility model are that:

1. in the utility model, because the maintenance design of the SPI Flash is adopted, the convenience and the usability of the maintenance process of the SPI Flash are fully considered, the complicated operations of erasing, programming and the like of the SPI Flash through keyboard instructions are avoided, and the safety of an application system is enhanced;

2. the utility model discloses in, owing to adopted the duplication burning record of two IC seats to improve development efficiency, reduce the development degree of difficulty and cost, increase the stability and the maintainability of system, can the maintenance work of greatly reduced embedded board card SPI Flash in each life cycle.

Drawings

FIG. 1 is a schematic structural diagram of the maintenance design of SPI Flash of the embedded system of the present invention;

fig. 2 is an operation flowchart of the maintenance design of the SPI Flash of the embedded system of the present invention.

The labels in the figure are: 1. a PCB board; 2. a first IC socket; 21. a first chip; 3. a second IC socket; 31. a second chip; 4. a toggle switch; 5. an embedded processor; 6. pressing a key; 7. an LED.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.

In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention; the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance; furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, as they may be fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

In a first embodiment, referring to fig. 1-2, an SPI Flash maintenance system of an embedded system includes a PCB board 1, where:

the first IC seat 2 and the first chip 21 fixed on the first IC seat 2 in an inserting way;

the second IC socket 3 and the second chip 31 fixed to the second IC socket 3 by insertion;

the toggle switch 4 is provided with two output ends, wherein one output end is electrically connected with the first IC seat 2, and the other output end is electrically connected with the second IC seat 3 and used for switching the first chip 21 and the second chip 31;

the embedded processor 5 is electrically connected with the toggle switch 4, and the embedded processor 5 is electrically connected with the first IC seat 2 and the second IC seat 3;

the key 6, the key 6 is electrically connected with embedded processor 5, is used for the order input in the maintenance process;

an LED7, an LED7 electrically connected to the embedded processor 5 for indication of program status during maintenance;

preferably, the PCB board 1 of the technical scheme adopts a gold immersion board design, and has the advantages of low cost, convenient manufacture and high reliability.

In the second embodiment, referring to fig. 1, the embedded processor 5 supports the start of the SPI Flash chip;

the embedded processor 5 and the toggle switch 4 are electrically connected by adopting an SPI CS mode, and the toggle switch 14 can adopt the most common 1P2T mode and also can adopt a jumper wire mode, and aims to switch the CS signal of an SPI bus so as to enable the CS signal to act on the first IC seat 2 or the second IC seat 3;

the first IC seat 2, the second IC seat 3 and the key 6 are electrically connected by adopting an SPI BUS mode, and the key 6, the LED7 and the embedded processor 5 are electrically connected by adopting a GPIO mode;

the key 6 adopts a key input connection mode, but is not limited to the mode, the key 6 is used as an external input signal, and when a next action needs to be input, the key can be pressed to send an instruction to the processor;

the LED7 is displayed by an LED lamp, but not limited to this, the LED7 is used to output the current status of the embedded processing for the operator to observe, so as to know the status of the processor, and prompt the operator for the subsequent operation, the indication method is not limited to the LED, but also can be a buzzer, a display screen, etc., which are not listed here;

the first chip 21 stores related program chips, the second chip 31 is a blank chip or a program chip to be updated, and in practical application, the general form is that the first chip 21 is surface-mounted with an SMT packaged SPI Flash, the second chip 31 is a DIP-8 package, and other forms can be adopted according to actual use conditions and PCB space size.

In a third embodiment, referring to fig. 2, an SPI Flash maintenance system of an embedded system includes the following operation steps:

s1, mounting the first chip 21 on the first IC holder 2, mounting the second chip 31 on the second IC holder 3, and running S2;

s2, operating the toggle switch 4 to toggle to one side of the second IC seat 3, supplying power to the system, and operating S3;

s3, reading the data of the first IC seat 2 through the embedded processor 5, and running S4;

s4, the embedded processor 5 outputs the data to the LED7, and runs S5;

s5, if the LED7 flickers, operating S1, otherwise, operating S6;

s6, if the LED7 is normally on, operating S7, otherwise, operating S11;

s7, operating the toggle switch 4 to toggle to one side of the first IC seat 2, and operating S8;

s8, operating the key 6 to start programming the program in the second chip 3, and running S9;

s9, if the LED flickers, operating S1, otherwise, operating S10;

s10, the LED is normally on, and the operation is S11;

and S11, ending.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims

1. The utility model provides a SPI Flash maintenance system of embedded system, includes PCB board (1), characterized in that, arranged on PCB board (1):

the first IC seat (2) and a first chip (21) fixedly inserted on the first IC seat (2);

the second IC seat (3) and a second chip (31) fixedly inserted on the second IC seat (3);

the toggle switch (4) is provided with two output ends, one of the output ends is electrically connected with the first IC seat (2), and the other output end is electrically connected with the second IC seat (3);

the embedded processor (5), the embedded processor (5) is electrically connected with the toggle switch (4), and the embedded processor (5) is electrically connected with the first IC seat (2) and the second IC seat (3);

the key (6), the said key (6) is connected electrically with embedded processor (5);

an LED (7), the LED (7) being electrically connected to the embedded processor (5).

2. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the embedded processor (5) supports the starting of the SPI Flash chip.

3. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: and the embedded processor (5) and the toggle switch (4) are electrically connected in an SPI CS mode.

4. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the first IC seat (2), the second IC seat (3) and the key (6) are electrically connected through an SPI BUS.

5. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the keys (6) and the LED (7) are electrically connected with the embedded processor (5) by adopting a GPIO (general purpose input/output) mode.

6. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the key (6) adopts a key input connection mode.

7. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the LED (7) adopts an LED lamp display mode.

8. The SPI Flash maintenance system of an embedded system according to claim 1, characterized by: the first chip (21) is stored with related program chips, and the second chip (31) is a blank chip or a program chip to be updated.