CN212276722U - Display screen structure for improving horizontal crosstalk - Google Patents
Display screen structure for improving horizontal crosstalk Download PDFInfo
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- CN212276722U CN212276722U CN202022076286.5U CN202022076286U CN212276722U CN 212276722 U CN212276722 U CN 212276722U CN 202022076286 U CN202022076286 U CN 202022076286U CN 212276722 U CN212276722 U CN 212276722U
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Abstract
The utility model discloses a display screen structure for improving horizontal crosstalk, which comprises sub-pixels, a grid line, a TFT switch and a source line; the sub-pixels are arranged in rows and columns, the polarities of two adjacent sub-pixels in the same row are different, and the polarities of the sub-pixels in the same column are the same; a sub-pixel comprises the TFT switch, and the sub-pixel is connected with the output end of the TFT switch; each row of sub-pixels comprises two gate lines, and one sub-pixel is connected with the gate lines through the control end of the TFT switch; in the sub-pixels of the same row, two consecutive sub-pixels are in one group, the two sub-pixels of the same group are connected with the same gate line of the row, and the two adjacent groups of sub-pixels are sequentially connected with one of the two gate lines of the row; one side of each column of sub-pixels is provided with one source line, and one sub-pixel is also connected with the source line through the input end of the TFT switch. The technical scheme eliminates the appearance of white lines on the display screen.
Description
Technical Field
The utility model relates to a display screen technical field especially relates to an improve horizontal display screen structure of crosstalking.
Background
When Thin Film Transistors (TFTs) are turned on, the current is different, and display defects of the display screen are exposed under some special pictures.
In the field of LCD display screens, the LCD display screens have the phenomenon of horizontal crosstalk, namely, white lines appear on the display screens to influence the appearance. Fig. 1 is a detection picture of an LCD panel, which is used to detect whether the display effect of the LCD panel is defective. Fig. 2 shows the appearance of horizontal crosstalk on an LCD display screen (white lines visible to the naked eye on the screen).
SUMMERY OF THE UTILITY MODEL
Therefore, it is desirable to provide a display panel structure and a driving method for improving horizontal crosstalk, so as to solve the problem of white lines appearing on the display panel.
To achieve the above object, the present embodiment provides a display panel structure for improving horizontal crosstalk, which includes sub-pixels, gate lines, TFT switches, and source lines;
the sub-pixels are arranged in rows and columns, the polarities of two adjacent sub-pixels in the same row are different, and the polarities of the sub-pixels in the same column are the same;
a sub-pixel comprises the TFT switch, and the sub-pixel is connected with the output end of the TFT switch;
each row of sub-pixels comprises two gate lines, and one sub-pixel is connected with the gate lines through the control end of the TFT switch;
in the sub-pixels in the same row, two consecutive sub-pixels form a group from the first sub-pixel, the two sub-pixels in the same group are connected with the same gate line in the row, and the two adjacent sub-pixels are sequentially connected with one of the two gate lines in the row;
the same side of each row of sub-pixels is provided with one source line, and one sub-pixel is also connected with the source line through the input end of the TFT switch.
Furthermore, the gate lines connected to the sub-pixels in the same column are located on the same side of the corresponding row.
Furthermore, the sub-pixels in the same row are sequentially arranged in R, G, B order.
Further, the sub-pixels in the same column have the same color.
Further, the polarities of the sub-pixels in the same column are the same.
Further, the display screen structure is an LCD display screen structure.
Further, the display device further comprises a driving unit which is connected with the source line.
Different from the prior art, two gate lines are used to control the sub-pixels in one row, and the half of the sub-pixels can be changed from 127 gray scale voltage to 255 gray scale voltage at different time according to the difference of the electrodes of the sub-pixels. Only half of the sub-pixels have a coupling effect with VCOM, and the reduction of the coupling corresponds to the reduction of the white frame area on the side. The smaller the area of the white frame, the easier it is for VCOM to recover from the coupled state, so that the first abnormal white line disappears.
Drawings
FIG. 1 is a schematic cross-sectional view of a detection screen of a conventional display panel;
FIG. 2 is a schematic cross-sectional view of a conventional display screen showing a white line;
FIG. 3 is a schematic cross-sectional view of the display screen structure according to this embodiment;
FIG. 4 is a timing diagram of the display screen structure according to the present embodiment;
FIG. 5 is a schematic cross-sectional view of the display panel structure without the first white line in this embodiment;
FIG. 6 is a timing diagram of the display panel structure with the first white line eliminated according to the present embodiment;
FIG. 7 is a schematic cross-sectional view illustrating a display panel structure without a second white line according to the present embodiment;
FIG. 8 is a timing diagram illustrating a structure of a display panel with a second white line eliminated according to the present embodiment;
FIG. 9 is a schematic cross-sectional view of another embodiment of a display screen structure;
FIG. 10 is a timing diagram of the source line S1 according to another embodiment;
FIG. 11 is a timing diagram of the source line S2 according to another embodiment;
FIG. 12 is a timing diagram of the source line S3 according to another embodiment.
Description of reference numerals:
1. a sub-pixel;
2. the TFT is switched on and off.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1 to 12, the present embodiment provides a display panel structure for improving horizontal crosstalk, which includes sub-pixels 1, gate lines, TFT switches 2, and source lines, and is shown in fig. 3. The sub-pixels 1 are plural, and the plural sub-pixels 1 are arranged in rows and columns. The polarities of two adjacent sub-pixels in the same row are different, that is, the sub-pixels in the same row are sequentially arranged according to the sequence of "+, -," + ". A sub-pixel 1 comprises the TFT switch 2, and the sub-pixel 1 is connected with the output end of the TFT switch 2. Each row of sub-pixels comprises two of said gate lines, one sub-pixel 1 being connected to said gate lines via the control terminal of its TFT switch 2. In the sub-pixels in the same row, two consecutive sub-pixels form a group from the first sub-pixel, the two sub-pixels in the same group are connected with the same gate line in the row, and the two adjacent sub-pixels are sequentially connected with one of the two gate lines in the row. One source line is arranged on the same side of each row of sub-pixels, and one sub-pixel 1 is also connected with the source line through the input end of the TFT switch 2.
In this embodiment, the gate lines connected to the sub-pixels in the same column are located on the same side of the corresponding row. The first row of sub-pixels is connected to a gate line above the row, the second row of sub-pixels is connected to a gate line above the row, the third row of sub-pixels is connected to a gate line below the row, and the fourth row of sub-pixels is connected to a gate line below the row.
In this embodiment, the sub-pixels in the same row are sequentially arranged in the order of Red (R), Green (G), and Blue (B), and the structure is shown in fig. 3. Alternatively, in some embodiments, the sub-pixels in the same row are sequentially arranged in R, B, G order. Alternatively, the sub-pixels in the same row are arranged in sequence R, B, G, W (White). The color proportion of the display screen structure is different, so that the display screen can accurately display colors, and the display screen structure has rich colors so as to meet the requirements of users.
In this embodiment, in order to transmit the same color sub-pixels to one source line, the color of the sub-pixels in the same row is the same.
In this embodiment, the display screen structure is an LCD display screen structure. Alternatively, in some embodiments, the display screen structure is an organic light-Emitting Diode (abbreviated OLED) display screen structure.
In this embodiment, the driving unit is further included, and the driving unit is connected to the source line. The driving unit transmits signals to the sub-pixels through the source lines.
In this embodiment, the polarities of the sub-pixels in the same column are the same, for example, the polarities of the sub-pixels in the same column are both positive or negative.
The gate line on time of the present application has a width of 2H (also can be 3H, 4H, etc.), and taking 2H as an example, the pre-charge time of the front 1H of the sub-pixel (the sub-pixel is the pre-charge phase in this time) and the real charge time of the back 1H of the sub-pixel (the sub-pixel is the charge phase in this time) are provided. If the gate line on time is 4H, the pre-charge time of the front 2H (the sub-pixel is the pre-charge phase) of the sub-pixel can be given, and the back 2H is the real charge time of the sub-pixel (the sub-pixel is the charge phase).
The principle of eliminating the first white line is explained here, with reference to fig. 4, 5 and 6:
the dotted line frame in fig. 5 is a white frame in fig. 1, and the sub-pixels between the gate Gn +2(n is an integer and 0 or more) and the gate Gn +3 are the sub-pixels that originally generate the white line. Taking the source line S3, source line S4, source line S5 and source line S6 as examples, the sub-pixel charging stage of the present application: when gate line Gn is turned on, the data transmitted on source line S3, source line S4, source line S5 and source line S6 are 127 gray levels of voltage data. For the sub-pixels on the source line S3 and the source line S4, since the TFT switches of the sub-pixels (i) and (ii) are not connected to the gate line Gn, the sub-pixels (i) and (ii) keep the 127 gray-scale data of the previous frame. For subpixel (1) on source line S5 charging directly to the current frame 127 gray level, subpixel (2) on source line S6 charging directly to the current frame 127 gray level. The pre-charge time is the first 1H, and the real charge time is the last 1H, so that all the sub-pixels can be fully charged.
When the gate line Gn +1 is turned on, 127 gray scale data of the current frame is transmitted on the source line S3 and the source line S4 during the pre-charge time of the previous 1H, and the sub-pixels (i) and (ii) charge the 127 gray scale voltage data of the current frame. During the real charging time of the following 1H of the gate line Gn +1, the 127 gray-scale data of the current frame is still transmitted on the source line S3 and the source line S4, and the sub-pixels (i) and (ii) charge the 127 gray-scale data of the current frame. For the source line S5 and the source line S6, the voltage value of the current 127 gray scale is still transmitted on the source line S5 and the source line S6, although the TFT switches on the sub-pixels (1) and (2) are not connected to the gate line Gn +1, but the gate line Gn is not yet turned off, so that the sub-pixels (1) and (2) continue to charge the current 127 gray scale data, and the charge will be fully charged.
When the gate line Gn +2 is opened, 127 gray-scale data of the current frame is still transmitted on the source line S3 and the source line S4, and since neither the TFT switch of the sub-pixel (c) nor the TFT switch of the sub-pixel (c) is connected to the gate line Gn +2, the sub-pixel (c) and the sub-pixel (c) keep 255 gray-scale data of the previous frame, and the source line S5 and the source line S6 transmit 255 gray-scale data of the current frame. The sub-pixels (3) and the sub-pixels (4) are charged to 255 gray-scale data, that is, the time distance from the opening moment of the gate line Gn +2 to the opening moment of the gate line Gn +3 is the pre-charging time of the sub-pixels (3) or the sub-pixels (4).
When the gate line Gn +3 is turned on, the sub-pixels (c) and (d) start to fill the gray scale data of frame 255 for the source line S3 and the source line S4. Since the gate line Gn +4 is not connected to the source line S3 and the source line S4, the source line S3 and the source line S4 can transmit the 255 gray-scale data of the current frame until the gate line Gn +4 is opened, that is, the sub-pixels (c) and (d) can be charged with the 255 gray-scale data all the time during the opening time of the gate line Gn +3, and thus the charging can be fully charged. Source line S5 and source line S6 still transmit the current 255 gray level voltage values for source line S5 and source line S6. Although the sub-pixels on source line S5 and source line S6 are not connected to gate line Gn +3, gate line Gn +2 is not turned off, so that sub-pixels (3) and (4) can be fully charged as soon as they are acting as the first 255 gray-scale voltage values. Since Source line S5 transmits the current frame 255 gray level data to subpixel (3) when gate line Gn +2 is turned on, Source line S6 also transmits the current frame 255 gray level data to subpixel (4). The potential corresponding to the pre-charge of the sub-pixels (3) and (4) is the same as the potential actually charged, so that the sub-pixels can be fully charged. In the case of the conventional display structure, the sub-pixels between the gate line Gn +2 and the gate line Gn +3 need to be charged from the current frame 127 gray level to the current frame 255 gray level.
In short, the present application allows the original pre-charged voltage data to be transmitted to the corresponding sub-pixel, so that the pre-charged voltage data is identical to the voltage data of the actual charging time of the sub-pixel, and the actual charging time of the sub-pixel is extended laterally (the actual charging time of the common display panel is only 1H, and is now 2H). At this time, the sub-pixels (c), (3) and (4) can be fully charged, so that the problem of different coupling degrees of the pixel electrode to VCOM caused by different charging of the sub-pixels with different polarities does not exist, and the first white line can be eliminated.
The principle of eliminating the second white line is explained here, with reference to fig. 4, 7 and 8:
within the dashed box of fig. 7 is the white box of fig. 1. The sub-pixel between the gate lines Gm +6(m is an integer and greater than or equal to 0) and Gm +7 is the second white line in the original abnormal place. Source line S3, source line S4, source line S5, and source line S6 are also exemplified. When the gate line Gm +4 is turned on, 255 gray scale voltages of the current frame are transmitted to the source line S3, the source line S4, the source line S5 and the source line S6, the sub-pixels (i) and (ii) are not connected to the gate line Gm +4, and the electrode voltages of the sub-pixels (i) and (ii) are 255 gray scale voltages of the previous frame. The sub-pixels (1) and (2) charge 255 gray scale voltage values of the current frame.
When the gate line Gm +5 is turned on, 255 gray scale voltages of the current frame are still transmitted to the source line S3, the source line S4, the source line S5 and the source line S6, the sub-pixels (i) and (ii) are connected to the gate line Gm +5, and the electrodes of the sub-pixels are charged with the 255 gray scale voltage of the current frame. The sub-pixels (1) and (2) are not connected to the gate line Gm +5, but the gate line Gm +4 is also turned on, so that the current frame continues to charge the 255 gray scale voltage.
When the gate line Gm +6 is turned on, the source line S3 and the source line S4 transmit the current frame 255 gray scale voltage, the sub-pixel (i) and the sub-pixel (ii) are connected to the gate line Gm +5, the gate line Gm +5 is not turned off, and the electrodes of the sub-pixel (i) and the sub-pixel (ii) continue to charge the current frame 255 gray scale voltage. The sub-pixels (c) and (c) are not connected to the gate line Gm +6, and hold the 127 gray scale voltage value of the previous frame. The sub-pixels (1) and (2) are not connected with the gate line Gm +5, but the sub-pixels (1) and (2) are connected with the gate line Gm +4, Gm +4 is closed at the moment, and the sub-pixels (1) and (2) are charged with the gray scale voltage of the frame 255. Source line S5 and source line S6 transmit the current frame 127 gray scale voltage value, the sub-pixel (3) and sub-pixel (4) are connected to the gate line Gm +6, and the sub-pixel (3) and sub-pixel (4) charge the current frame 127 gray scale voltage value.
When gate line Gm +7 is open, the current frame 127 gray scale voltage is transmitted on source line S3, source line S4, source line S5, and source line S6. The sub-pixels (c) and (c) are connected to the gate line Gm +7, the electrodes of the sub-pixels (c) and (c) charge the 127 gray scale voltage value of the current frame, when the next gate line is turned on, the voltages on the source line S3 and the source line S4 are also the 127 gray scale voltage of the current frame, and the sub-pixels (c) and (c) can be charged with the 127 gray scale. The sub-pixels (3) and the sub-pixels (4) are not connected with the gate line Gm +7, the sub-pixels (3) and the sub-pixels (4) are connected with the gate line Gm +6, but the gate line Gm +6 is not closed at the moment, the sub-pixels (3) and the sub-pixels (4) continue to be charged with the 127 gray scale voltage value of the frame, and the sub-pixels (3) and the sub-pixels (4) can be charged with the 127 gray scale voltage value.
The technical scheme utilizes the two gate lines to control the sub-pixels in one row, and the half of the sub-pixels can be changed from 127 gray scale voltage to 255 gray scale voltage at different time by matching with the difference of the electrodes of the sub-pixels. Only half of the sub-pixels have a coupling effect with VCOM, and the reduction of the coupling corresponds to the reduction of the white frame area on the side. The smaller the area of the white frame, the more likely it is for VCOM to recover from the coupled state, so that the abnormal white line disappears.
In another embodiment, the polarities of two adjacent sub-pixels in the same column are different, and the structure is shown in fig. 9. The polarities of the sub-pixels in the same column are arranged in sequence of "+, -, +". The arrangement of the polarities of the sub-pixels can make the display screen have the advantage of power consumption saving. The dotted line frame is a repeating unit, which is formed by connecting the source line S1, the source line S2, and the source line S3 with the sub-pixels, and appears on the basis of the repeating unit at other positions of the display screen. When the resolution of the display screen is different, the number of times the repeating unit appears is also different.
Wherein, the data transmission rule of S1 is as shown in fig. 10, S1 controls red sub-pixels to be "+," - ", and" flip-flop; the data transmission rule of S2 is shown in fig. 11, S2 controls the green sub-pixels to flip-flop, -flip, + or-flip; the data transmission rule of S3 is shown in fig. 12, where S3 controls the blue sub-pixels to flip-over.
Taking source line S1 as an example, the number of positive and negative polarity inversions of ordinary dot inversion driving source line S1 is 2 times that of the present patent, which is two dot inversionData transmission, but the display effect of the present application is better than that of a panel having a one dot inversion driving method. The power consumption of the panel is reduced compared with that of the panel with a one dot inversion driving mode. According to the formula of power consumption P1/2C f (delta U)2Wherein f is the frequency of the source line voltage signal variation in one frame. The frequency f of positive and negative inversion of the application is 1/2 of the frequency of the ordinary one dot inversion, so that the application is more power-saving than the driving display of the ordinary one dot inversion.
It should be noted that the time of the precharge phase (precharge time) is a preset time, and is exemplified by 2H in the present embodiment, and may be adjusted to 3H, 4H, 5H, and the like according to actual situations; the time of the charging phase (charging time) is also a preset time, and is also exemplified by 1H in the present embodiment, and may be adjusted to 3H, 4H, 5H, and the like according to actual conditions. The present application is exemplified by the conversion of the sub-pixel from 127 gray scale voltage to 255 gray scale voltage, and in some embodiments, the conversion of 30 gray scale voltage to 127 gray scale voltage may be performed.
It should be noted that, although the above embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concept of the present invention, the changes and modifications of the embodiments described herein, or the equivalent structure or equivalent process changes made by the contents of the specification and the drawings of the present invention, directly or indirectly apply the above technical solutions to other related technical fields, all included in the scope of the present invention.
Claims (7)
1. A display screen structure for improving horizontal crosstalk comprises sub-pixels, gate lines, TFT switches and source lines;
the sub-pixels are arranged in rows and columns, the polarities of two adjacent sub-pixels in the same row are different, and the polarities of the sub-pixels in the same column are the same;
a sub-pixel comprises the TFT switch, and the sub-pixel is connected with the output end of the TFT switch;
each row of sub-pixels comprises two gate lines, and one sub-pixel is connected with the gate lines through the control end of the TFT switch;
in the sub-pixels in the same row, two consecutive sub-pixels form a group from the first sub-pixel, the two sub-pixels in the same group are connected with the same gate line in the row, and the two adjacent sub-pixels are sequentially connected with one of the two gate lines in the row;
the same side of each row of sub-pixels is provided with one source line, and one sub-pixel is also connected with the source line through the input end of the TFT switch.
2. The panel structure of claim 1, wherein the gate lines connected to the sub-pixels in a column are located on a same side of the row.
3. The display panel structure of claim 1, wherein the sub-pixels in the same row are sequentially arranged in R, G, B order.
4. The display screen structure of claim 3, wherein the sub-pixels in a same column have the same color.
5. The panel structure of claim 1, wherein the polarities of the sub-pixels in a same column are the same.
6. The display screen structure for improving horizontal crosstalk of claim 1, wherein the display screen structure is an LCD display screen structure.
7. The panel structure of claim 1, further comprising a driving unit, wherein the driving unit is connected to the source lines.
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| CN112086034A (en) * | 2020-09-21 | 2020-12-15 | 福建华佳彩有限公司 | Display screen structure for improving horizontal crosstalk and driving method |
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| CN112086034A (en) * | 2020-09-21 | 2020-12-15 | 福建华佳彩有限公司 | Display screen structure for improving horizontal crosstalk and driving method |
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