CN212259159U - Device for converting single MIPI signal into double MIPI signal - Google Patents
Device for converting single MIPI signal into double MIPI signal Download PDFInfo
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- CN212259159U CN212259159U CN202020698942.2U CN202020698942U CN212259159U CN 212259159 U CN212259159 U CN 212259159U CN 202020698942 U CN202020698942 U CN 202020698942U CN 212259159 U CN212259159 U CN 212259159U
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Abstract
The utility model belongs to the technical field of the electronic technology and specifically relates to indicate a device of two MIPI signals of single MIPI signal conversion, including the main casing body, upper cover, radiating area, power, single MIPI video signal input interface and two MIPI video signal output interface and status indicator, the main casing body is squarely, the upper cover set up in main casing body top, the radiating area set up in the upper cover middle part, the power set up in the rear end of the main casing body, the power is provided with power input interface and power indicator, power input interface set up in the side of power, power indicator set up in the top of power input interface. The utility model discloses a modular design through MIPI signal detection module, video timing control conversion module and the conversion module of video compression unit processing realization single MIPI video signal to the conversion of two MIPI video signal, simple structure can satisfy the demand to the high resolution demonstration.
Description
Technical Field
The utility model relates to the field of electronic technology, especially, indicate a device of single MIPI signal conversion two MIPI signals.
Background
Along with the continuous improvement of screen resolution and size of electronic devices such as mobile phones and tablet computers at present, the requirement for supporting resolution of 1920 × 1200 and above is continuously improved, the limit MIPI interface on the intelligent device is more and more limited on supporting high-resolution high-definition screens, the transmission of single MIPI is more and more insufficient in practical application, and a high-bandwidth high-speed dual MIPI interface becomes very necessary for improving the data transmission speed between a display screen and a processor.
SUMMERY OF THE UTILITY MODEL
To the technical problem that above-mentioned prior art exists, the utility model provides a simple structure, convenient to use's device of two MIPI signals of single MIPI signal conversion.
In order to achieve the technical purpose, the utility model adopts the following technical scheme:
a device for converting a single MIPI signal into a double MIPI signal comprises a main shell, an upper cover, a heat dissipation area, a power supply, a single MIPI video signal input interface, a double MIPI video signal output interface and a status indicator lamp, wherein the main shell is square, the upper cover is arranged above the main shell, the heat dissipation area is arranged in the middle of the upper cover, the power supply is arranged at the rear end of the main shell, the power supply is provided with a power supply input interface and a power supply indicator lamp, the power supply input interface is arranged on the side face of the power supply, the power supply indicator lamp is arranged above the power supply input interface, the single MIPI video signal input interface is arranged on the front face of the main shell, the double MIPI video signal output interfaces are arranged on the side face of the main shell, the status indicator lamp comprises an input status indicator lamp and an output status indicator lamp, and the input status indicator lamp is arranged on the side face of the single MIP, the output state indicator lamp is arranged on the side face of the double-MIPI video signal output interface.
Furthermore, the single MIPI video signal input interface includes a first single MIPI video signal input interface, a second single MIPI video signal input interface, and a third single MIPI video signal input interface, and the first single MIPI video signal input interface, the second single MIPI video signal input interface, and the third single MIPI video signal input interface are disposed in parallel on the front surface of the main housing.
Further, the dual MIPI video signal output interfaces include a first dual MIPI video signal output interface, a second dual MIPI video signal output interface, and a third dual MIPI video signal output interface, and the first dual MIPI video signal output interface, the second dual MIPI video signal output interface, and the third dual MIPI video signal output interface are disposed in parallel on the side surface of the main housing.
Furthermore, the input status indicator lamp comprises a first input status indicator lamp, a second input status indicator lamp and a third input status indicator lamp, and the first input status indicator lamp, the second input status indicator lamp and the third input status indicator lamp are respectively arranged on the side faces of the first single-MIPI video signal input interface, the second single-MIPI video signal input interface and the third single-MIPI video signal input interface.
Furthermore, the output status indicator lamp comprises a first output status indicator lamp, a second output status indicator lamp and a third output status indicator lamp, and the first output status indicator lamp, the second output status indicator lamp and the third output status indicator lamp are respectively arranged on the side faces of the first dual-MIPI video signal output interface, the second dual-MIPI video signal output interface and the third dual-MIPI video signal output interface.
Further, the main casing body is internally provided with an MIPI signal detection module, a video timing control conversion module, a video compression unit processing conversion module, a power supply voltage stabilizing module and an I2C control module, the MIPI signal detection module is connected with the single MIPI video signal input interface, the video timing control conversion module is connected with the MIPI signal detection module, the video compression unit processing conversion module is connected with the video timing control conversion module, the double MIPI video signal output interfaces are connected with the video compression unit processing conversion module, the power supply voltage stabilizing module is connected with the power supply, and the I2C control module is arranged at the bottom of the main casing body.
Further, the heat dissipation area is provided with heat dissipation holes.
Compared with the prior art, the beneficial effects of the utility model are that:
the utility model adopts the modular design, realizes the conversion from single MIPI video signal to double MIPI video signal through the MIPI signal detection module, the video timing control conversion module and the video compression unit processing conversion module, has simple structure, and can meet the requirement of high-resolution display; in addition, the state indicator lamp is arranged to display the states of signal input and signal output, and the device has an effective indicating function on the working state of the device.
Drawings
Fig. 1 is a schematic structural diagram of the present invention;
description of the drawings: 1. a main housing; 2. an upper cover; 3. a heat dissipation area; 4. a power source; 5. a first single MIPI video signal input interface; 6. a second single MIPI video signal input interface; 7. a third single MIPI video signal input interface; 8. a first input status indicator light; 9. a second input status indicator light; 10. a third input status indicator light; 11. a first dual MIPI video signal output interface; 12. a second dual MIPI video signal output interface; 13. a third dual MIPI video signal output interface; 14. a first output status indicator light; 15. a second output status indicator light; 16. a third output status indicator light; 17. a power input interface; 18. and a power indicator lamp.
Detailed Description
The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.
A device for converting a single MIPI signal into a double MIPI signal comprises a main shell 1, an upper cover 2, a heat dissipation area 3, a power source 4, a single MIPI video signal input interface, a double MIPI video signal output interface and a status indicator lamp, wherein the main shell 1 is square, the upper cover 2 is arranged above the main shell 1, the heat dissipation area 3 is arranged in the middle of the upper cover 2, the power source 4 is arranged at the rear end of the main shell 1, the power source 4 is provided with a power source input interface 17 and a power source indicator lamp 18, the power source input interface 17 is arranged on the side face of the power source 4, the power source indicator lamp 18 is arranged above the power source input interface 17, the single MIPI video signal input interface is arranged on the front face of the main shell 1, the double MIPI video signal output interfaces are arranged on the side face of the main shell 1, and the status indicator lamp comprises an input status indicator lamp and an output status indicator, the input state indicator lamp is arranged on the side face of the single MIPI video signal input interface, and the output state indicator lamp is arranged on the side face of the double MIPI video signal output interface.
It should be noted that the single MIPI video signal input interface includes a first single MIPI video signal input interface 5, a second single MIPI video signal input interface 6 and a third single MIPI video signal input interface 7, and the first single MIPI video signal input interface 5, the second single MIPI video signal input interface 6 and the third single MIPI video signal input interface 7 are arranged in parallel on the front surface of the main housing 1; the dual-MIPI video signal output interfaces include a first dual-MIPI video signal output interface 11, a second dual-MIPI video signal output interface 12 and a third dual-MIPI video signal output interface 13, and the first dual-MIPI video signal output interface 11, the second dual-MIPI video signal output interface 12 and the third dual-MIPI video signal output interface 13 are arranged on the side surface of the main housing 1 in parallel; the input state indicator lamps comprise a first input state indicator lamp 8, a second input state indicator lamp 9 and a third input state indicator lamp 10, and the first input state indicator lamp 8, the second input state indicator lamp 9 and the third input state indicator lamp 10 are respectively arranged on the side faces of the first single-MIPI video signal input interface 5, the second single-MIPI video signal input interface 6 and the third single-MIPI video signal input interface 7; the output status indicator lamps comprise a first output status indicator lamp 14, a second output status indicator lamp 15 and a third output status indicator lamp 16, and the first output status indicator lamp 14, the second output status indicator lamp 15 and the third output status indicator lamp 16 are respectively arranged on the side surfaces of the first dual-MIPI video signal output interface 11, the second dual-MIPI video signal output interface 12 and the third dual-MIPI video signal output interface 13; an MIPI signal detection module, a video timing control conversion module, a video compression unit processing conversion module, a power supply voltage stabilizing module and an I2C control module are arranged inside the main shell 1, the MIPI signal detection module is connected with the single MIPI video signal input interface, the video timing control conversion module is connected with the MIPI signal detection module, the video compression unit processing conversion module is connected with the video timing control conversion module, the double MIPI video signal output interfaces are connected with the video compression unit processing conversion module, the power supply voltage stabilizing module is connected with the power supply 4, and the I2C control module is arranged at the bottom of the main shell 1; the heat dissipation area 3 is provided with heat dissipation holes.
The utility model discloses a use method: the signal input interface of single MIPI video signal is connected with the signal source, the MIPI signal detection module is used for receiving four paths of differential signals of MIPI _ TDP 0-MIPI _ TDN3 input by the signal source for analysis processing; the video timing control conversion module is used for controlling a single MIPI time sequence parameter sent by the single MIPI image time sequence generation module, generating a corresponding single MIPI time sequence signal according to the single MIPI time sequence parameter, and taking out the image data of the image data cache module so as to output a standard image signal; the video compression unit processing and converting module is used for encoding and dividing a plurality of paths of single MIPI signals and finally outputting double MIPI image signals, and the double MIPI video signal output interface is connected with display equipment and displays the double MIPI image signals through the display equipment; the power supply voltage stabilization module provides stable and reliable multi-path voltage for each module and the double MIPI screen through the voltage stabilization filter circuit, and reliable operation of a system is guaranteed; I2C control module is used for connecting signal source MCU and the utility model discloses between carry out real-time data transmission.
Can see from above embodiment, the utility model discloses simple structure, convenient to use can realize single MIPI image signal to two MIPI image signal's conversion, satisfies the demand that market shows to the high definition.
The above description is only the preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all the modifications and changes made by the present invention or directly or indirectly applied to other related technical fields are also included in the scope of the present invention.
Claims (7)
1. A device for converting a single MIPI signal into a double MIPI signal comprises a main shell (1), an upper cover (2), a heat dissipation area (3), a power supply (4), a single MIPI video signal input interface, a double MIPI video signal output interface and a status indicator lamp, and is characterized in that the main shell (1) is square, the upper cover (2) is arranged above the main shell (1), the heat dissipation area (3) is arranged in the middle of the upper cover (2), the power supply (4) is arranged at the rear end of the main shell (1), the power supply (4) is provided with a power supply input interface (17) and a power supply indicator lamp (18), the power supply input interface (17) is arranged on the side face of the power supply (4), the power supply indicator lamp (18) is arranged above the power supply input interface (17), the single MIPI video signal input interface is arranged on the front face of the main shell (1), the double-MIPI video signal output interface is arranged on the side face of the main shell body (1), the status indicator lamp comprises an input status indicator lamp and an output status indicator lamp, the input status indicator lamp is arranged on the side face of the single-MIPI video signal input interface, and the output status indicator lamp is arranged on the side face of the double-MIPI video signal output interface.
2. The apparatus for converting a single MIPI signal into a dual MIPI signal according to claim 1, wherein the single MIPI video signal input interface includes a first single MIPI video signal input interface (5), a second single MIPI video signal input interface (6) and a third single MIPI video signal input interface (7), and the first single MIPI video signal input interface (5), the second single MIPI video signal input interface (6) and the third single MIPI video signal input interface (7) are disposed in parallel on the front surface of the main housing (1).
3. The apparatus for converting a single MIPI signal into a dual MIPI signal according to claim 1, wherein the dual MIPI video signal output interfaces include a first dual MIPI video signal output interface (11), a second dual MIPI video signal output interface (12) and a third dual MIPI video signal output interface (13), and the first dual MIPI video signal output interface (11), the second dual MIPI video signal output interface (12) and the third dual MIPI video signal output interface (13) are disposed in parallel at a side of the main housing (1).
4. The apparatus of claim 1, wherein the input status indicator lamps include a first input status indicator lamp (8), a second input status indicator lamp (9) and a third input status indicator lamp (10), and the first input status indicator lamp (8), the second input status indicator lamp (9) and the third input status indicator lamp (10) are respectively disposed at sides of the first single MIPI video signal input interface (5), the second single MIPI video signal input interface (6) and the third single MIPI video signal input interface (7).
5. The apparatus of converting a single MIPI signal into a dual MIPI signal according to claim 1, wherein the output status indicator lamps include a first output status indicator lamp (14), a second output status indicator lamp (15) and a third output status indicator lamp (16), and the first output status indicator lamp (14), the second output status indicator lamp (15) and the third output status indicator lamp (16) are respectively disposed at sides of the first dual MIPI video signal output interface (11), the second dual MIPI video signal output interface (12) and the third dual MIPI video signal output interface (13).
6. The apparatus for converting a single MIPI signal into a dual MIPI signal according to claim 1, wherein a MIPI signal detection module, a video timing control conversion module, a video compression unit processing conversion module, a power voltage stabilization module and an I2C control module are disposed inside the main housing (1), the MIPI signal detection module is connected to the single MIPI video signal input interface, the video timing control conversion module is connected to the MIPI signal detection module, the video compression unit processing conversion module is connected to the video timing control conversion module, the dual MIPI video signal output interface is connected to the video compression unit processing conversion module, the power voltage stabilization module is connected to the power supply (4), and the I2C control module is disposed at the bottom of the main housing (1).
7. The apparatus for converting a single MIPI signal into a dual MIPI signal as claimed in claim 1, wherein said heat dissipating region (3) is provided with heat dissipating holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020698942.2U CN212259159U (en) | 2020-04-30 | 2020-04-30 | Device for converting single MIPI signal into double MIPI signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020698942.2U CN212259159U (en) | 2020-04-30 | 2020-04-30 | Device for converting single MIPI signal into double MIPI signal |
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| Publication Number | Publication Date |
|---|---|
| CN212259159U true CN212259159U (en) | 2020-12-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020698942.2U Active CN212259159U (en) | 2020-04-30 | 2020-04-30 | Device for converting single MIPI signal into double MIPI signal |
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| Country | Link |
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| CN (1) | CN212259159U (en) |
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- 2020-04-30 CN CN202020698942.2U patent/CN212259159U/en active Active
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Effective date of registration: 20210304 Address after: 503 (5C), building D3, TCL Science Park, 1001 Zhongshan Garden Road, Shuguang community, Xili street, Nanshan District, Shenzhen, Guangdong 518000 Patentee after: Shenzhen Jiangyuan Technology (Group) Co.,Ltd. Address before: 518000 Shenzhen City, Guangdong Province, Shajing street and a community Xingye West Road 10, YUDAFU Industrial Park, 1 / F, 2 / F, 3 / F B, office building 5, 2 / F, 4 / F Patentee before: SHENZHEN ROCO ELECTRONIC Co.,Ltd. |
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