CN212258491U - Novel zero current shutdown circuit is awaken up to BMS electricity - Google Patents
Novel zero current shutdown circuit is awaken up to BMS electricity Download PDFInfo
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- CN212258491U CN212258491U CN202021236169.4U CN202021236169U CN212258491U CN 212258491 U CN212258491 U CN 212258491U CN 202021236169 U CN202021236169 U CN 202021236169U CN 212258491 U CN212258491 U CN 212258491U
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Abstract
The utility model discloses a novel BMS power-on wake-up zero current shutdown circuit, which comprises a battery module, a dormancy power supply module, a main control module, a power-on activation module, a charging activation module, an input switch module and a voltage reduction module, wherein the input switch module and the voltage reduction module are sequentially connected with the anode of the battery module; the dormant power supply module is connected between the anode of the battery module and the main control module, and the main control module is also connected with the power-on activation module; the power-on activation module and the charging activation module are both connected with the input switch module, and the charging activation module is also respectively connected with the power-on activation module and the negative electrode of the battery module. The utility model discloses increased dormancy power module and main control MCU, and then can improve its commonality and compatibility, simultaneously, ingenious utilization the characteristic of the switch of triode, promptly when the BMS system shuts down dormancy, it is in the state of disconnection completely, and the nearly zero consumption of electric current promptly, the low power dissipation, the practicality is strong.
Description
Technical Field
The utility model relates to a lithium cell BMS technical field especially relates to a novel zero current shutdown circuit is awaken up to BMS electricity.
Background
With the continuous development of lithium battery manufacturing technology, lithium batteries have been widely used in various fields of our lives, such as electric vehicles, energy storage, and UPS backup power systems. However, the lithium battery has a serious disadvantage that is a safety problem, and in order to improve the safety performance of the lithium battery, a lithium battery protection board, namely a BMS (lithium battery management system) is invented, and the BMS can protect various abnormalities of the battery, such as short circuit protection, charging overcurrent protection, discharging overcurrent protection, charging overvoltage protection, battery core overtemperature protection, temperature overtemperature protection, MOS transistor overtemperature protection and the like, by turning off the discharging MOS transistor. At present, a BMS power supply circuit on the market is generally input by an auxiliary power supply DC-DC, is not taken from a battery, is not subjected to algorithm control by a central processing unit, and has the defects of poor universality, high power consumption, poor reliability and the like.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a novel zero current shutdown circuit is awaken up to electricity on BMS, this circuit has increased dormancy power module and main control MCU, and then can improve its commonality and compatibility, and simultaneously, ingenious utilization the characteristic of the switch of triode, when BMS system shuts down dormancy promptly, it is in the state of disconnection completely, current almost zero consumption promptly, low power dissipation, and adopt the semiconductor switch device, and then need not external key switch, can reduce the layout area of PCB board, and therefore, the cost is reduced, therefore, the clothes hanger is strong in practicability.
In order to realize the purpose, the following technical scheme is adopted:
a novel BMS power-on wake-up zero-current shutdown circuit comprises a battery module, a dormancy power supply module, a main control module, a power-on activation module, a charging activation module, an input switch module and a voltage reduction module, wherein the input switch module and the voltage reduction module are sequentially connected with the positive electrode of the battery module; the dormant power supply module is connected between the anode of the battery module and the main control module, and the main control module is also connected with the power-on activation module; the power-on activation module and the charging activation module are both connected with the input switch module, and the charging activation module is also respectively connected with the power-on activation module and the negative electrode of the battery module; the power-on activation module is used for conducting when the BMS system is connected to the anode of the battery module so as to control the input switch module to be turned on, and further supplies power to the BMS system through the voltage reduction module; the main control module is used for controlling the power-on activation module to keep conducting so as to continuously supply power to the BMS system; the dormancy power supply module is used for supplying power to the main control module when the BMS system is in shutdown dormancy; the charging activation module is used for conducting when the BMS system is connected with an external charger to control the input switch module to be turned on, and then the BMS system is supplied with power through the voltage reduction module.
Further, the input switch module comprises an isolation diode D1, a fuse resistor RF1, a switch tube Q1, an isolation diode D2 and a resistor R2; an emitting electrode of the switching tube Q1 is connected with the anode of the battery module through a safety resistor RF1 and an isolation diode D1 in sequence, a collector electrode of the switching tube Q1 is connected with the voltage reduction module through an isolation diode D2, and a base electrode of the switching tube Q1 is connected with the power-on activation module and the charging activation module through a resistor R2.
Further, the power-on activation module comprises a starting capacitor C2, a starting resistor R3, a power-on MOS transistor Q3 and an isolation diode D5; the base electrode of the power-on MOS tube Q3 is connected with the common connection terminal of the anode of the battery module and the isolation diode D1 through a starting resistor R3 and a starting capacitor C2 in sequence, the emitter of the power-on MOS tube Q3 is grounded, and the collector of the power-on MOS tube Q3 is connected with a resistor R2 through an isolation diode D5.
Further, the charging activation module comprises an isolation diode D4, a charging MOS transistor Q2, a resistor R5, a resistor R6 and a protection diode D6; the collector of the charging MOS transistor Q2 is connected to the common connection end of the isolation diode D5 and the resistor R2 through the isolation diode D4, the base of the charging MOS transistor Q2 is connected with the cathode of the battery module through the resistor R5 and the protection diode D6 in sequence, and the emitter of the charging MOS transistor Q2 is connected to the common connection end of the resistor R5 and the protection diode D6; the base of the charging MOS transistor Q2 is also grounded through a resistor R6.
Further, the main control module comprises a main control MCU, an isolation diode D3 and a resistor R4; the master control MCU is connected with the common connecting end of the starting resistor R3 and the power-on MOS transistor Q3 through an isolation diode D3 and a resistor R4 in sequence.
Further, the sleep power supply module comprises an isolation diode D7, a current-limiting resistor R9, a switching tube Q4, a switching tube Q5, a filtering unit and a voltage-stabilizing diode ZD 5; a collector of the switching tube Q4 is sequentially connected with the anode of the battery module through a current-limiting resistor R9 and an isolating diode D7, an emitter of the switching tube Q4 is connected with the master control MCU through a filtering unit, and a base of the switching tube Q4 is connected with an emitter of the switching tube Q5; the collector of the switching tube Q5 is connected with the common connection end of the current-limiting resistor R9 and the switching tube Q4, and the base of the switching tube Q5 is connected with the current-limiting resistor R9; the base electrode of the switching tube Q5 is also connected with the filtering unit through a voltage stabilizing diode ZD 5.
Adopt above-mentioned scheme, the beneficial effects of the utility model are that:
this circuit has increased dormancy power module and main control MCU, and then can improve its commonality and compatibility, simultaneously, ingenious utilization the characteristic of the switch of triode, promptly when BMS system shuts down dormancy, it is in the state of disconnection completely, and the nearly zero consumption of electric current promptly, the low power dissipation, and adopt the semiconductor switch device, and then need not external key switch, can reduce the layout area of PCB board, reduce cost, practicality are strong.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
fig. 2 is a circuit diagram of the present invention with the dormant power supply module omitted;
fig. 3 is a circuit diagram of the sleep power supply module of the present invention;
wherein the figures identify the description:
1-a battery module; 2-a dormant power supply module;
3, a main control module; 4-power-on activation module;
5-a charging activation module; 6, an input switch module;
7, a voltage reduction module; 21-filtering unit.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
Referring to fig. 1 to 3, the utility model provides a novel BMS power-on wake-up zero-current shutdown circuit, which comprises a battery module 1, a sleep power supply module 2, a main control module 3, a power-on activation module 4, a charging activation module 5, an input switch module 6 and a voltage reduction module 7, wherein the input switch module and the voltage reduction module are sequentially connected with the positive electrode of the battery module 1; the dormant power supply module 2 is connected between the positive electrode of the battery module 1 and the main control module 3, and the main control module 3 is also connected with the power-on activation module 4; the power-on activation module 4 and the charging activation module 5 are both connected with the input switch module 6, and the charging activation module 5 is also respectively connected with the power-on activation module 4 and the negative electrode of the battery module 1; the power-on activation module 4 is used for conducting when the BMS system is connected to the anode of the battery module 1 so as to control the input switch module 6 to be turned on, and further supplies power to the BMS system through the voltage reduction module 7; the main control module 3 is used for controlling the power-on activation module 4 to keep on, and further continuously supplying power to the BMS system; the dormancy power supply module 2 is used for supplying power to the main control module 3 when the BMS system is in shutdown dormancy; the charging activation module 5 is used for conducting when the BMS system is connected to an external charger to control the input switch module 6 to be turned on, and then supplies power to the BMS system through the voltage reduction module 7.
The input switch module 6 comprises an isolation diode D1, a fuse resistor RF1, a switching tube Q1, an isolation diode D2 and a resistor R2; an emitter of the switching tube Q1 is connected with the anode of the battery module 1 through a safety resistor RF1 and an isolation diode D1 in sequence, a collector of the switching tube Q1 is connected with the voltage reduction module 7 through an isolation diode D2, and a base of the switching tube Q1 is connected with the power-on activation module 4 and the charging activation module 5 through a resistor R2; the power-on activation module 4 comprises a starting capacitor C2, a starting resistor R3, a power-on MOS transistor Q3 and an isolation diode D5; the base electrode of the power-on MOS tube Q3 is connected with the anode of the battery module 1 and the common connection terminal of the isolation diode D1 through a starting resistor R3 and a starting capacitor C2 in sequence, the emitter of the power-on MOS tube Q3 is grounded, and the collector of the power-on MOS tube Q3 is connected with a resistor R2 through an isolation diode D5.
The charging activation module 5 comprises an isolation diode D4, a charging MOS transistor Q2, a resistor R5, a resistor R6 and a protection diode D6; the collector of the charging MOS transistor Q2 is connected to the common connection end of the isolation diode D5 and the resistor R2 through the isolation diode D4, the base of the charging MOS transistor Q2 is connected with the negative electrode of the battery module 1 through the resistor R5 and the protection diode D6 in sequence, and the emitter of the charging MOS transistor Q2 is connected to the common connection end of the resistor R5 and the protection diode D6; the base electrode of the charging MOS transistor Q2 is also grounded through a resistor R6; the main control module 3 comprises a main control MCU, an isolation diode D3 and a resistor R4; the master control MCU is connected to a common connecting end of a starting resistor R3 and an electrifying MOS transistor Q3 through an isolating diode D3 and a resistor R4 in sequence; the sleep power supply module 2 comprises an isolation diode D7, a current-limiting resistor R9, a switching tube Q4, a switching tube Q5, a filtering unit 21 and a voltage-stabilizing diode ZD 5; a collector of the switching tube Q4 is sequentially connected with the anode of the battery module 1 through a current-limiting resistor R9 and an isolating diode D7, an emitter of the switching tube Q4 is connected with the master control MCU through the filtering unit 21, and a base of the switching tube Q4 is connected with an emitter of the switching tube Q5; the collector of the switching tube Q5 is connected with the common connection end of the current-limiting resistor R9 and the switching tube Q4, and the base of the switching tube Q5 is connected with the current-limiting resistor R9; the base of the switching tube Q5 is also connected with the filter unit 21 through a zener diode ZD 5.
The utility model discloses the theory of operation:
power-on activation function:
as shown in fig. 1-3, at the moment of connecting the positive electrode of the battery module 1, the switching transistor Q1, the charging MOS transistor Q2 and the charging MOS transistor Q3 do not satisfy the conduction condition, and they are all in the off state, and at this time, the current flows in the following directions: the starting capacitor C2> > the starting resistor R3> > the base electrode of the power-on MOS transistor Q3 > > the emitter electrode of the power-on MOS transistor Q3 > > GND, at the moment, the power-on MOS transistor Q3 is conducted in a positive bias mode, current is generated, and the current flows to the following steps: the isolation diode D1> > fuse resistor RF1> > emitter of the switch tube Q1 > > base of the switch tube Q1 > > resistor R2> > isolation diode D5> > collector of the power-on MOS tube Q3 > emitter of the power-on MOS tube Q3 > GND; because the base and the emitter of the switching tube Q1 all have current to flow, so switching tube Q1 switches on, namely battery module 1 will 48V voltage output to isolation diode D2> > step-down module 7(DC-DC step-down unit) > > system power supply, at this moment, main control MCU begins the electric work of going up, and its PB9 pin exports high level at once in order to guarantee to go up continuous the switching on of power MOS pipe Q3, guarantees to supply power to the BMS system in succession.
And (3) dormancy power supply:
when the BMS system is shut down and dormant, the main power supply is shut down, the power supply is provided by the dormant power supply module 2, specifically, the main control MCU outputs a low level (0V) through a PB9 pin, and since the starting capacitor C2 is in a fully charged state at this time, the power-on MOS transistor Q3 cannot be turned on, the charging MOS transistor Q2 and the switching transistor Q1 are also shut down, and further, the whole circuit does not generate any current, so that the BMS system is "shut down at zero current"; after the system is shut down and dormant, the current output by the battery module 1 is divided into 3 paths through the isolation diode D7 and the current-limiting resistor R9, the first path flows to the zener diode ZD5 through the resistor R11, and due to the action of the zener diode ZD5, the base voltage of the switching tube Q5 is clamped at a set voltage (the 5.1V zener diode is adopted in the embodiment, so the base voltage is clamped at 5V); the second path flows into the collector of the switching tube Q5 from the resistor R10 and then flows out from the emitter of the switching tube Q5, the base voltage of the second path is limited by the zener diode ZD5, so that the emitter of the switching tube Q5 is limited to 4.3V (5-0.7V ═ 4.3V), and by the same principle, the emitter of the switching tube Q4 is limited by the emitter level of the switching tube Q5, so that the second path outputs 3.6V to supply to the master MCU, and the power supply range of the master MCU is 2.9-3.6V to maintain the power supply to the master MCU; the circuit has the advantages that the amplifying characteristic of the transistor is utilized, the voltage stabilizing characteristic of the voltage stabilizing tube is combined, the set voltage can be stably output, the power consumption can be calculated by a formula, and the circuit is characterized in that:
I＝(Vin-Vzd5)/R11
it can be seen that the power consumption of the battery depends on the size of the resistor R11, which is usually 10M, that is, I is 4.29uA, and since the main control MCU is in the sleep mode, the working current of the main control MCU can be as low as 5uA, and the self-loss of the battery is 4.29uA, the overall power consumption of the whole machine is 9.29uA, which is much smaller than the self-loss of the battery core.
A charge activation function;
when the BMS is in a shutdown, dormancy and power-down mode, all peripheral power supplies are cut off, and the BMS cannot be activated except for re-electrifying or receiving a charging signal; when a charger is connected (normally, the open-circuit voltage of the charger is 1-2V higher than the battery voltage), the voltage at the GND terminal of the charging activation module 5 is V ═ Vchar-Vbatt (the voltage of the Vchar charger, Vbatt battery module 1), which is divided by the resistor R6 and the resistor R5, and then is added to the base of the charging MOS transistor Q2, and once the base voltage of the charging MOS transistor Q2 reaches 0.5-0.6V, the charging MOS transistor Q2 enters an amplification state, the collector and emitter of the charging MOS transistor Q2 will have current flowing through, so that the isolation diode D4 is conducted to ground, and the current is formed by the isolation diode D1> > emitter of the switching transistor Q1 > base > > resistor R2> > isolation diode D4> > collector > of the charging transistor Q2 > emitter > charging transistor Q2 > > diode D6> negative pole of the charger, so as to form a complete loop, because the current flows between the emitter and the collector of the charging MOS transistor Q2, the charging MOS transistor Q2 is conducted in a forward bias mode, and the main current is supplied to a system from an isolation diode D1> > safety resistor RF1> > the emitter of the switching transistor Q1 > > the collector of the switching transistor Q1 > isolation diode D2> > voltage reduction module 7 >; at this time, the main control MCU is powered on to work, a pin PB9 outputs a high level, the power-on MOS transistor Q3 is connected with the switch transistor Q1, and the activation is completed, after the activation is completed, the voltage difference between the GND terminal and the negative electrode of the charger disappears, the charging MOS transistor Q2 stops working, and the main control MCU obtains the battery management authority.
The above description is only exemplary of the present invention and should not be construed as limiting the present invention, and any modifications, equivalents and improvements made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (6)
1. A novel BMS power-on wake-up zero-current shutdown circuit is characterized by comprising a battery module, a dormancy power supply module, a main control module, a power-on activation module, a charging activation module, an input switch module and a voltage reduction module, wherein the input switch module and the voltage reduction module are sequentially connected with the positive electrode of the battery module; the dormant power supply module is connected between the anode of the battery module and the main control module, and the main control module is also connected with the power-on activation module; the power-on activation module and the charging activation module are both connected with the input switch module, and the charging activation module is also respectively connected with the power-on activation module and the negative electrode of the battery module; the power-on activation module is used for conducting when the BMS system is connected to the anode of the battery module so as to control the input switch module to be turned on, and further supplies power to the BMS system through the voltage reduction module; the main control module is used for controlling the power-on activation module to keep conducting so as to continuously supply power to the BMS system; the dormancy power supply module is used for supplying power to the main control module when the BMS system is in shutdown dormancy; the charging activation module is used for conducting when the BMS system is connected with an external charger to control the input switch module to be turned on, and then the BMS system is supplied with power through the voltage reduction module.
2. The novel BMS power-on wake-up zero current shutdown circuit of claim 1, wherein the input switch module comprises an isolation diode D1, a safety resistor RF1, a switch tube Q1, an isolation diode D2, a resistor R2; an emitting electrode of the switching tube Q1 is connected with the anode of the battery module through a safety resistor RF1 and an isolation diode D1 in sequence, a collector electrode of the switching tube Q1 is connected with the voltage reduction module through an isolation diode D2, and a base electrode of the switching tube Q1 is connected with the power-on activation module and the charging activation module through a resistor R2.
3. The novel BMS power-on wake-up zero-current shutdown circuit as claimed in claim 2, wherein the power-on activation module comprises a starting capacitor C2, a starting resistor R3, a power-on MOS transistor Q3, an isolation diode D5; the base electrode of the power-on MOS tube Q3 is connected with the common connection terminal of the anode of the battery module and the isolation diode D1 through a starting resistor R3 and a starting capacitor C2 in sequence, the emitter of the power-on MOS tube Q3 is grounded, and the collector of the power-on MOS tube Q3 is connected with a resistor R2 through an isolation diode D5.
4. The novel BMS power-on wake-up zero-current shutdown circuit as claimed in claim 3, wherein the charging activation module comprises an isolation diode D4, a charging MOS transistor Q2, a resistor R5, a resistor R6, and a protection diode D6; the collector of the charging MOS transistor Q2 is connected to the common connection end of the isolation diode D5 and the resistor R2 through the isolation diode D4, the base of the charging MOS transistor Q2 is connected with the cathode of the battery module through the resistor R5 and the protection diode D6 in sequence, and the emitter of the charging MOS transistor Q2 is connected to the common connection end of the resistor R5 and the protection diode D6; the base of the charging MOS transistor Q2 is also grounded through a resistor R6.
5. The novel BMS power-on wake-up zero current shutdown circuit as claimed in claim 4, wherein the master control module comprises a master control MCU, an isolation diode D3, a resistor R4; the master control MCU is connected with the common connecting end of the starting resistor R3 and the power-on MOS transistor Q3 through an isolation diode D3 and a resistor R4 in sequence.
6. The novel BMS power-on wake-up zero-current shutdown circuit as claimed in claim 5, wherein the sleep power supply module comprises an isolation diode D7, a current-limiting resistor R9, a switch tube Q4, a switch tube Q5, a filter unit, and a zener diode ZD 5; a collector of the switching tube Q4 is sequentially connected with the anode of the battery module through a current-limiting resistor R9 and an isolating diode D7, an emitter of the switching tube Q4 is connected with the master control MCU through a filtering unit, and a base of the switching tube Q4 is connected with an emitter of the switching tube Q5; the collector of the switching tube Q5 is connected with the common connection end of the current-limiting resistor R9 and the switching tube Q4, and the base of the switching tube Q5 is connected with the current-limiting resistor R9; the base electrode of the switching tube Q5 is also connected with the filtering unit through a voltage stabilizing diode ZD 5.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202021236169.4U CN212258491U (en) | 2020-06-29 | 2020-06-29 | Novel zero current shutdown circuit is awaken up to BMS electricity |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202021236169.4U CN212258491U (en) | 2020-06-29 | 2020-06-29 | Novel zero current shutdown circuit is awaken up to BMS electricity |
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| CN212258491U true CN212258491U (en) | 2020-12-29 |
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