CN212258471U - Battery pack management module circuit - Google Patents
Battery pack management module circuit Download PDFInfo
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- CN212258471U CN212258471U CN202020960859.8U CN202020960859U CN212258471U CN 212258471 U CN212258471 U CN 212258471U CN 202020960859 U CN202020960859 U CN 202020960859U CN 212258471 U CN212258471 U CN 212258471U
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- 238000007599 discharging Methods 0.000 claims abstract description 16
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 12
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 30
- 239000003990 capacitor Substances 0.000 claims description 18
- 238000010586 diagram Methods 0.000 description 6
- 238000001514 detection method Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 3
- 238000004146 energy storage Methods 0.000 description 3
- 229910001416 lithium ion Inorganic materials 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
A battery pack management module circuit relates to the field of management circuits and comprises a charge-discharge control circuit, a charge-discharge conducting circuit, a collection wire harness connector socket, a charge-discharge protection circuit, a charge-discharge voltage stabilizing circuit and a charge-discharge switch circuit, wherein the charge-discharge control circuit is respectively and electrically connected with the charge-discharge conducting circuit, the charge-discharge protection circuit and the charge-discharge switch circuit; the acquisition wire harness connector socket drives the charge-discharge conducting circuit to conduct the circuit through the charge-discharge control circuit, and the charge-discharge control circuit reads the voltage and current values in the battery pack management module circuit and calculates the voltage and current values; the voltage of the battery cell is detected and the problem is timely treated when the set value is set in the charging state and the discharging state, and safety accidents are prevented.
Description
Technical Field
The utility model belongs to the technical field of the management circuit and specifically relates to a group battery management module circuit is related to.
Background
With the increasingly wide application of lithium ion batteries, the lithium ion batteries are increasingly applied to power batteries and energy storage systems, lithium ion battery packs applied to power and large-scale energy storage of electric vehicles in the industry often reach 300V or even more than 800V due to high voltage, and the number of serial-connected batteries is large and often reaches hundreds of strings, so that the battery packs often adopt a mode of a sub-module design on a circuit structure, each module is formed by connecting 6-12 batteries in series, the modules are provided with a battery management circuit, the function of the management circuit is mainly to monitor the parameters of the battery modules and communicate with an external central control unit (also called a main control unit), but the modules do not have a protection function. The modules are connected in series to form the whole battery pack system, a direct current contactor (or a relay) is arranged on the whole main loop and serves as a power control switch, and the main control unit controls the on-off of the direct current contactor according to the states of the battery modules and the battery pack to protect the whole battery pack system.
The module management circuit of the existing power battery pack and the high-voltage energy storage battery pack does not have an independent protection control function, only has the functions of parameter detection and data communication, and can not automatically process the problem of safety easily when the battery pack is charged and discharged.
SUMMERY OF THE UTILITY MODEL
The utility model discloses an it is not enough to overcome above-mentioned condition, aims at providing the technical scheme that can solve above-mentioned problem.
A battery pack management module circuit comprises a charge-discharge control circuit, a charge-discharge conducting circuit, a collection wire harness connector socket, a charge-discharge protection circuit, a charge-discharge voltage stabilizing circuit and a charge-discharge switch circuit, wherein the charge-discharge control circuit is respectively and electrically connected with the charge-discharge conducting circuit, the charge-discharge protection circuit and the charge-discharge switch circuit; the acquisition wire harness connector socket drives the charge-discharge conducting circuit to conduct the circuit through the charge-discharge control circuit, the charge-discharge control circuit reads the voltage and the current values in the battery pack management module circuit, the voltage and the current values are calculated, and a corresponding control instruction is obtained to drive the charge-discharge switch circuit to conduct or break.
Preferably, the charge and discharge control circuit comprises a chip U1 with the model number "SH 367008", a resistor R59 is connected to the 15 th pin of the chip U1, a resistor R56 and a resistor R57 are connected to the other end of the resistor R59, a resistor R58 is connected to the other ends of the resistor R56 and the resistor R57, and a 16 th pin of the chip U1 is connected to the other end of the resistor R58.
Preferably, the charge-discharge conduction circuit comprises at least one switching tube, the emitter and the collector of the adjacent switching tube are connected, a first resistor is further connected between the emitter and the collector of the adjacent switching tube, the collector of the switching tube is connected with the collecting wire harness connector socket, the collector of the switching tube is further connected with a second resistor, the base of the switching tube is further connected with a third resistor, the second resistor is connected with the third resistor, and a lead is further led out between the second resistor and the third resistor and is connected with the chip U1.
Preferably, the switching tube includes a transistor Q1, a transistor Q4, a transistor Q5, a transistor Q7, a transistor Q8, a transistor Q9, a transistor Q10, a transistor Q11, a transistor Q12, a transistor Q13, and a transistor Q13, wherein a lead wire led out from the transistor Q13 is connected to the 21 st pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 22 nd pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 23 rd pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 24 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 25 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 28 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 29 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 30 th pin of the chip U13, a lead wire led out from the triode Q12 is connected with a 32 th pin of the chip U1, a lead wire led out from the triode Q13 is connected with a 35 th pin of the chip U1, a lead wire led out from the triode Q14 is connected with a 36 th pin of the chip U1, and a lead wire led out from the triode Q15 is connected with a 37 th pin of the chip U1.
Preferably, the charging and discharging voltage stabilizing circuit comprises a voltage regulator tube ZD1, a voltage regulator tube ZD2, a voltage regulator tube ZD3, a diode D1, a diode D2, a diode D3 and a plurality of first capacitors, wherein the anode of the diode D1 is connected to the collector of the triode Q7, the negative pole of the diode D1 is connected with a resistor R40, the other end of the resistor R40 is connected with the negative pole of the voltage regulator tube ZD1, and the anode of the voltage regulator tube ZD1 is grounded; the anode of the diode D2 is connected with the collector of the triode Q12, the negative level of the diode D2 is connected with a resistor R41, the other end of the resistor R41 is connected with the negative level of a voltage regulator tube ZD2, and the anode of the voltage regulator tube ZD2 is grounded; the anode of the diode D3 is connected with the collector of the triode Q15, the negative level of the diode D3 is connected with a resistor R44, the other end of the resistor R44 is connected with the negative level of a voltage regulator tube ZD3, and the anode of the voltage regulator tube ZD3 is grounded; one end of each first capacitor is connected with the lead-out wire between each second resistor and each third resistor, and the other end of each first capacitor is grounded.
Preferably, the charge and discharge switch circuit comprises a first MOS transistor and a second MOS transistor, a gate of the first MOS transistor is connected with a fourth resistor, the other end of the fourth resistor is connected with the 11 th pin of the chip U1, a source of the first MOS transistor is connected with a fifth resistor, and the other end of the fifth resistor is connected with the 11 th pin of the chip U1; the drain electrode of the first MOS tube is connected with a 10 th pin of the chip U1; the gate of the second MOS tube is connected with a sixth resistor, the other end of the sixth resistor is connected with the 12 th pin of the chip U1, the source of the second MOS tube is connected with a seventh resistor, and the other end of the seventh resistor is connected with the 12 th pin of the chip U1; the drain of the second MOS transistor is connected to the 10 th pin of the chip U1.
Preferably, the charge and discharge protection circuit comprises a temperature sensor RT1 and a capacitor C15, wherein one end of the temperature sensor RT1 is connected with the 17 th pin of the chip U1, the other end of the temperature sensor RT1 is grounded, one end of the capacitor C15 is connected with the 17 th pin of the chip U1, and the other end of the capacitor C15 is grounded.
Compared with the prior art, the beneficial effects of the utility model are that:
the collecting port of the chip U1 is protected from the danger of high-voltage breakdown through the action of the voltage stabilizing tube ZD1, the voltage stabilizing tube ZD2 and the voltage stabilizing tube ZD 3;
in a charging mode, data of a cell voltage set value is acquired through a chip U1, when the cell voltage set value exceeds the set value, an 11 th pin of the chip U1 outputs a command of turning off a charging loop, and when the voltage of the overcharge protection release is reached, an 11 th pin of the chip U1 outputs a command of turning on a charge-discharge loop switch again to continue charging; in the discharging mode, the cell voltage data is collected through the chip U1, when the voltage is lower than a set value, the 12 th pin of the chip U1 immediately outputs a command of turning off the discharging loop, the pin is set to be low, the charging and discharging loop switch MOS is turned off, and discharging is stopped. After the protection is switched off, the voltage at two ends of the battery pack slowly rises, when the over-discharge protection release voltage is reached, the 12 th pin of the chip U1 re-outputs an instruction for opening a discharge loop switch, the pin is set to be high in level, a charge and discharge loop switch MOS is switched on, and the discharge starts; the method and the device realize the detection of the set value of the voltage of the battery cell in the charging state and the discharging state and the timely treatment of the occurrence of problems, and prevent the occurrence of safety accidents;
through temperature sensor RT1 detection circuitry, when temperature sensor RT1 body resistance diminishes, chip U1 detects that its value is less than the standard threshold, then output overtemperature protection signal, the electric current of shutoff charge-discharge return circuit, the charge-discharge operation stops to play the guard action to the circuit.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a block diagram of the present invention.
Fig. 2 is a schematic diagram of the circuit structure of the present invention.
Fig. 3 is a schematic structural diagram of the charge and discharge control circuit and the charge and discharge protection circuit of the present invention.
Fig. 4 is the structure diagram of the utility model discloses well charge-discharge conduction circuit and collection pencil connector socket.
Fig. 5 is a schematic structural diagram of the charge-discharge conduction circuit and the charge-discharge voltage stabilizing circuit of the present invention.
Fig. 6 is a schematic structural diagram of the charge and discharge switch circuit of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely below, and it should be understood that the described embodiments are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Please refer to fig. 1-6, in an embodiment of the present invention, a battery management module circuit includes a charge and discharge control circuit 1, a charge and discharge conduction circuit 3, a collection harness connector socket 4, a charge and discharge protection circuit 5, a charge and discharge voltage stabilizing circuit 2 and a charge and discharge switch circuit 6, wherein the charge and discharge control circuit 1 is electrically connected to the charge and discharge conduction circuit 3, the charge and discharge protection circuit 5 and the charge and discharge switch circuit 6 respectively, the charge and discharge voltage stabilizing circuit 2 is electrically connected between the charge and discharge control circuit 1 and the charge and discharge conduction circuit 3, and the collection harness connector socket 4 is electrically connected to the charge and discharge conduction circuit 3; the acquisition wire harness connector socket 4 drives the charge-discharge conducting circuit 3 to conduct the circuit through the charge-discharge control circuit 1, the charge-discharge control circuit 1 reads the voltage and the current values in the battery pack management module circuit, and calculates the voltage and the current values to obtain a corresponding control instruction to drive the charge-discharge switch circuit 6 to conduct or break.
As shown in fig. 3, the charge and discharge control circuit 1 includes a chip U1 with a model number "SH 367008", a resistor R59 is connected to a 15 th pin of the chip U1, a resistor R56 and a resistor R57 are connected to the other end of the resistor R59, a resistor R58 is connected to the other ends of the resistor R56 and the resistor R57, and a 16 th pin of the chip U1 is connected to the other end of the resistor R58.
Further as shown in fig. 3-5, the charge and discharge conduction circuit 3 includes at least one switching tube, the emitter and the collector of the adjacent switching tube are connected, a first resistor is connected between the emitter and the collector of the adjacent switching tube, the collector of the switching tube is connected with the collecting harness connector socket 4, the collector of the switching tube is connected with a second resistor, the base of the switching tube is connected with a third resistor, the second resistor is connected with the third resistor, and a lead is further led out between the second resistor and the third resistor and is connected with the chip U1.
As further shown in fig. 3-5, the switch tube includes a transistor Q1, a transistor Q4, a transistor Q5, a transistor Q7, a transistor Q8, a transistor Q9, a transistor Q10, a transistor Q11, a transistor Q12, a transistor Q13, and a transistor Q13, wherein a lead wire led out from the transistor Q13 is connected to the 21 st pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 22 nd pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 23 rd pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 24 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 25 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 28 th pin of the chip U13, a lead wire led out from the transistor Q13 is connected to the 30 th pin of the chip U13, and a lead wire led out from the pin of the transistor Q13 is connected to the chip U3631, a lead wire led out from the triode Q12 is connected with a 32 th pin of the chip U1, a lead wire led out from the triode Q13 is connected with a 35 th pin of the chip U1, a lead wire led out from the triode Q14 is connected with a 36 th pin of the chip U1, and a lead wire led out from the triode Q15 is connected with a 37 th pin of the chip U1.
Further as shown in fig. 3-5, the charging and discharging voltage stabilizing circuit 2 includes a voltage regulator ZD1, a voltage regulator ZD2, a voltage regulator ZD3, a diode D1, a diode D2, a diode D3, and a plurality of first capacitors, an anode of the diode D1 is connected to a collector of the triode Q7, a negative stage of the diode D1 is connected with a resistor R40, the other end of the resistor R40 is connected to a negative stage of the voltage regulator ZD1, and an anode of the voltage regulator ZD1 is grounded; the anode of the diode D2 is connected with the collector of the triode Q12, the negative level of the diode D2 is connected with a resistor R41, the other end of the resistor R41 is connected with the negative level of a voltage regulator tube ZD2, and the anode of the voltage regulator tube ZD2 is grounded; the anode of the diode D3 is connected with the collector of the triode Q15, the negative level of the diode D3 is connected with a resistor R44, the other end of the resistor R44 is connected with the negative level of a voltage regulator tube ZD3, and the anode of the voltage regulator tube ZD3 is grounded; one end of each first capacitor is connected with the lead-out wire between each second resistor and each third resistor, and the other end of each first capacitor is grounded.
As further shown in fig. 3 and 6, the charge and discharge switch circuit 6 includes a first MOS transistor and a second MOS transistor, a gate of the first MOS transistor is connected to a fourth resistor, the other end of the fourth resistor is connected to the 11 th pin of the chip U1, a source of the first MOS transistor is connected to a fifth resistor, and the other end of the fifth resistor is connected to the 11 th pin of the chip U1; the drain electrode of the first MOS tube is connected with a 10 th pin of the chip U1; the gate of the second MOS tube is connected with a sixth resistor, the other end of the sixth resistor is connected with the 12 th pin of the chip U1, the source of the second MOS tube is connected with a seventh resistor, and the other end of the seventh resistor is connected with the 12 th pin of the chip U1; the drain of the second MOS transistor is connected to the 10 th pin of the chip U1.
As further shown in fig. 3, the charge and discharge protection circuit 5 includes a temperature sensor RT1 and a capacitor C15, wherein one end of the temperature sensor RT1 is connected to the 17 th pin of the chip U1, the other end of the temperature sensor RT1 is grounded, one end of the capacitor C15 is connected to the 17 th pin of the chip U1, and the other end of the capacitor C15 is grounded.
[ operating principle ]
As shown in fig. 1-6, the present invention describes a hardware version of a BMS that manages 13 strings of cells; as shown in fig. 2: the 'B +' terminal is connected with the total anode of the battery pack, the 'B-' terminal is connected with the total cathode of the battery pack, the 'P +' terminal is connected with the total anode of the output, and the 'P-' terminal is connected with the total cathode of the output, so that the BMS is connected between the battery pack and a load in series, and is connected with the battery pack and the load.
CON1 is shown as BMS access collection harness connector socket 4 with 14PIN, standard 90 degree 2.54mm pitch. The total number of the extracted acquisition lines is 14, the acquisition lines are sequentially connected to the two ends of each string of the electric cores and are used for acquiring the voltage value of each string of the electric cores and forming a balanced discharge loop to circulate the discharge current for balancing, and the current value is set to be about 60 mA.
The switching tubes for equalizing discharge share 13 switching tubes, namely a triode Q1, a triode Q4, a triode Q5, a triode Q7, a triode Q8, a triode Q9, a triode Q10, a triode Q11, a triode Q12, a triode Q13, a triode Q14 and a triode Q15, are 2N5401, belong to PNP bipolar triodes, are used for switching in a loop, are controlled by a chip U1, and are SH367008 series. In the equalizing discharge loop, there is also an important device, which is the first resistor for equalizing discharge, and the resistance of the device determines the magnitude of the current for equalizing discharge, and in consideration of circuit design considerations, the size of the device is selected to be 62 ohms +/-5%, and the 1210 packaging is respectively: 13 resistors R3, R6, R9, R12, R15, R18, R21, R24, R27, R30, R33, R36 and R39.
In the figure, a voltage regulator tube ZD1, a voltage regulator tube ZD2 and a voltage regulator tube ZD3 are 24V voltage regulator tubes, and 3 voltage regulator tubes are connected in series end to end and are connected to two ends of a battery pack to protect a collecting port of a chip U1 from high-voltage breakdown.
In the charging mode, the terminal "P +" is connected with the positive pole of the charger, and the terminal "P-" is connected with the negative pole of the charger. When the voltage of any one of the 13 strings of battery cells acquired by the 13 acquisition ports of the chip U1 exceeds a set value, the 11 th pin of the chip U1 immediately outputs a command for turning off the charging loop, the pin is set to be low, the first MOS transistor and the second MOS transistor of the charging and discharging switch circuit 6 are turned off, and the charging is stopped. The first MOS tube and the second MOS tube adopt DPAK7 CRSS063N08N with low voltage and large current. After the charging circuit is turned off, the voltage at the two ends of the battery pack slowly drops, when the voltage reaches the over-charge protection release voltage, the 11 th pin of the chip U1 outputs an instruction for turning on the charging and discharging circuit switch again, the pin is set to be high in level, the first MOS tube and the second MOS tube of the circuit switch are turned on, and charging starts.
The same is true for the charging overcurrent protection, when it is detected that the voltages at the two ends of the current detection resistor R56 and the resistor R57 exceed the negative standard, it indicates that the charging current in the loop is too large, and the 11 th pin of the chip U1 outputs a turn-off instruction to turn off the charging loop. Normal discharge is required to unlock the protection.
In the charging process, if the voltage of any one string of the 13 strings of the battery cells is too high and reaches the voltage threshold value for starting the equalization, the string of the battery cells is singly discharged, and the independent discharge is stopped until the terminal voltage of the string of the battery cells reaches the voltage threshold value for releasing the equalization.
In the discharging mode, the terminal "P +" is connected with the positive pole of the load, and the terminal "P-" is connected with the negative pole of the load. When the 13 acquisition ports of the chip U1 acquire that the voltage of any one of the 13 strings of battery cells is lower than a set value, the 12 th pin of the chip U1 immediately outputs a command for turning off the discharge loop, the pin is set to be low, the first MOS transistor and the second MOS transistor of the charge and discharge switch circuit 6 are turned off, and the discharge is stopped. After the protection is turned off, the voltage at two ends of the battery pack slowly rises, when the over-discharge protection release voltage is reached, the 12 th pin of the chip U1 outputs an instruction for opening the discharge loop switch again, the level of the pin is set high, the first MOS tube and the second MOS tube of the charge and discharge switch circuit 6 are opened, and the discharge starts.
When the discharging overcurrent protection occurs, the voltage at two ends of the current detection resistor R56 and the resistor R57 is detected to be over-standard, the discharging current in the loop is overlarge, and the 12 th pin of the chip U1 outputs a turn-off instruction to turn off the discharging loop. At this time, normal charging is required to unlock the protection.
If the temperature rise of a device exceeds the standard in the running process of the BMS, the resistance value of the body of the temperature sensor RT1 is reduced, the chip U1 detects that the resistance value is lower than the standard threshold value, an overtemperature protection signal is output, the current of a charge-discharge loop is cut off, and the charge-discharge operation is stopped. And when the temperature rises back and reaches the over-temperature protection release threshold value, the charging and discharging operation is restarted.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (7)
1. A battery pack management module circuit is characterized by comprising a charge-discharge control circuit, a charge-discharge conducting circuit, a collection wire harness connector socket, a charge-discharge protection circuit, a charge-discharge voltage stabilizing circuit and a charge-discharge switch circuit, wherein the charge-discharge control circuit is respectively and electrically connected with the charge-discharge conducting circuit, the charge-discharge protection circuit and the charge-discharge switch circuit; the acquisition wire harness connector socket drives the charge-discharge conducting circuit to conduct the circuit through the charge-discharge control circuit, the charge-discharge control circuit reads the voltage and the current values in the battery pack management module circuit, the voltage and the current values are calculated, and a corresponding control instruction is obtained to drive the charge-discharge switch circuit to conduct or break.
2. The battery pack management module circuit according to claim 1, wherein the charge and discharge control circuit comprises a chip U1 with the model number "SH 367008", a resistor R59 is connected to the 15 th pin of the chip U1, a resistor R56 and a resistor R57 are connected to the other end of the resistor R59, a resistor R58 is connected to the other end of the resistor R56 and the resistor R57, and a 16 th pin of the chip U1 is connected to the other end of the resistor R58.
3. The battery pack management module circuit according to claim 2, wherein the charge and discharge conduction circuit comprises at least one switching tube, the emitter and the collector of the adjacent switching tube are connected, a first resistor is further connected between the emitter and the collector of the adjacent switching tube, the collector of the switching tube is connected with the collecting harness connector socket, a second resistor is further connected with the collector of the switching tube, a third resistor is further connected with the base of the switching tube, the second resistor is connected with the third resistor, and a lead wire is further led out between the second resistor and the third resistor to be connected with the chip U1.
4. The battery management module circuit of claim 3, wherein the switching device comprises a transistor Q1, a transistor Q4, a transistor Q5, a transistor Q7, a transistor Q8, a transistor Q9, a transistor Q10, a transistor Q11, a transistor Q12, a transistor Q13, a transistor Q14, and a transistor Q15, wherein a lead from the transistor Q1 is connected to the 21 st pin of the chip U1, a lead from the transistor Q4 is connected to the 22 nd pin of the chip U1, a lead from the transistor Q5 is connected to the 23 rd pin of the chip U1, a lead from the transistor Q6 is connected to the 24 th pin of the chip U1, a lead from the transistor Q7 is connected to the 25 th pin of the chip U1, a lead from the transistor Q8 is connected to the 28 th pin of the chip U1, a lead from the transistor Q9 is connected to the 29 th pin of the chip U1, and a lead from Q10 is connected to the 5930 th pin of the chip U1, the lead wire led out by the triode Q11 is connected with the 31 st pin of the chip U1, the lead wire led out by the triode Q12 is connected with the 32 nd pin of the chip U1, the lead wire led out by the triode Q13 is connected with the 35 th pin of the chip U1, the lead wire led out by the triode Q14 is connected with the 36 th pin of the chip U1, and the lead wire led out by the triode Q15 is connected with the 37 th pin of the chip U1.
5. The battery pack management module circuit according to claim 4, wherein the charging and discharging voltage stabilizing circuit comprises a voltage regulator tube ZD1, a voltage tube ZD2, a voltage tube ZD3, a diode D1, a diode D2, a diode D3 and a plurality of first capacitors, wherein the anode of the diode D1 is connected to the collector of the triode Q7, the negative stage of the diode D1 is connected with a resistor R40, the other end of the resistor R40 is connected to the negative stage of the voltage regulator tube ZD1, and the anode of the voltage regulator tube ZD1 is grounded; the anode of the diode D2 is connected with the collector of the triode Q12, the negative level of the diode D2 is connected with a resistor R41, the other end of the resistor R41 is connected with the negative level of a voltage regulator tube ZD2, and the anode of the voltage regulator tube ZD2 is grounded; the anode of the diode D3 is connected with the collector of the triode Q15, the negative level of the diode D3 is connected with a resistor R44, the other end of the resistor R44 is connected with the negative level of a voltage regulator tube ZD3, and the anode of the voltage regulator tube ZD3 is grounded; one end of each first capacitor is connected with the lead-out wire between each second resistor and each third resistor, and the other end of each first capacitor is grounded.
6. The battery pack management module circuit according to claim 2, wherein the charge and discharge switch circuit comprises a first MOS transistor and a second MOS transistor, a gate of the first MOS transistor is connected with a fourth resistor, the other end of the fourth resistor is connected with the 11 th pin of the chip U1, a source of the first MOS transistor is connected with a fifth resistor, and the other end of the fifth resistor is connected with the 11 th pin of the chip U1; the drain electrode of the first MOS tube is connected with a 10 th pin of the chip U1; the gate of the second MOS tube is connected with a sixth resistor, the other end of the sixth resistor is connected with the 12 th pin of the chip U1, the source of the second MOS tube is connected with a seventh resistor, and the other end of the seventh resistor is connected with the 12 th pin of the chip U1; the drain of the second MOS transistor is connected to the 10 th pin of the chip U1.
7. The battery pack management module circuit as claimed in claim 2, wherein the charge and discharge protection circuit comprises a temperature sensor RT1 and a capacitor C15, one end of the temperature sensor RT1 is connected to the 17 th pin of the chip U1, the other end of the temperature sensor RT1 is grounded, one end of the capacitor C15 is connected to the 17 th pin of the chip U1, and the other end of the capacitor C15 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020960859.8U CN212258471U (en) | 2020-05-29 | 2020-05-29 | Battery pack management module circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020960859.8U CN212258471U (en) | 2020-05-29 | 2020-05-29 | Battery pack management module circuit |
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| CN212258471U true CN212258471U (en) | 2020-12-29 |
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| CN202020960859.8U Expired - Fee Related CN212258471U (en) | 2020-05-29 | 2020-05-29 | Battery pack management module circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114448063A (en) * | 2022-04-11 | 2022-05-06 | 西安航天民芯科技有限公司 | MOSFET drive circuit applied to battery management chip |
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2020
- 2020-05-29 CN CN202020960859.8U patent/CN212258471U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114448063A (en) * | 2022-04-11 | 2022-05-06 | 西安航天民芯科技有限公司 | MOSFET drive circuit applied to battery management chip |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20201229 |