CN212231421U

CN212231421U - Signal output interface circuit

Info

Publication number: CN212231421U
Application number: CN202020433484.XU
Authority: CN
Inventors: 张丹; 刘普团
Original assignee: Xi'an Lingbei Electronic Technology Co ltd
Current assignee: Xi'an Lingbei Electronic Technology Co ltd
Priority date: 2020-03-30
Filing date: 2020-03-30
Publication date: 2020-12-25
Anticipated expiration: 2030-03-30

Abstract

The utility model belongs to the technical field of the signal input interface technique and specifically relates to indicate a signal output interface circuit, including power jam-proof circuit, signal jam-proof circuit, prevent short circuit and prevent static circuit, the utility model discloses a power jam-proof circuit, signal jam-proof circuit can carry out the filtering to the input port of preventing short circuit, prevent to bring external interference signal into from power and input signal, influence output signal's effect, the utility model discloses the static that the static circuit produced the during operation is prevented to the accessible is handled, can effectively avoid the product damage that the electronic product caused because static in production and use, still the utility model discloses still have and prevent the circuit function, effectually prevent that the short circuit from burning out this signal input interface protector.

Description

Signal output interface circuit

Technical Field

The utility model belongs to the technical field of signal input interface technique and specifically relates to indicate a signal output interface circuit.

Background

The development of new technologies such as communication, digital technology, internet of things technology and the like has promoted the rapid growth of global electronic products, and with the demands of people on the quality of electronic products, manufacturers have to adopt a large number of circuit protection elements in order to improve market competitiveness, and promote the market demand of circuit protection elements, and the trend of signal output interface protection in various electronic products is increasingly strengthened.

At the present stage, the signal output interface often encounters conditions such as overvoltage, overcurrent, electromagnetic interference and electrostatic damage, for example, the condition that the output of the power supply circuit is short-circuited to the ground often occurs, and if short-circuit protection is not performed, the circuit can be continuously output, so that electronic components are burnt due to overheating, and customer complaints and maintenance cost increase are caused.

In the related art, the most adopted signal output interface protection scheme is to use a TVS tube and a voltage dependent resistor for protection, but the disadvantage is that when the signal interface rate is high, the flow rate and junction capacitance of the TVS tube are contradictory. The TVS tube with small junction capacitance has small flux and cannot effectively protect a rear-stage chip; however, the TVS with large junction capacitance has a large flow rate, but the large junction capacitance affects the quality of the actual working signal, causing waveform distortion, and the TVS with small junction capacitance generally has a relatively high price, and if there are many interface signal lines, the cost is increased, so how to design the signal output interface protection circuit is an urgent technical problem to be solved by those skilled in the art.

SUMMERY OF THE UTILITY MODEL

The utility model discloses problem to prior art provides a signal output interface circuit.

In order to solve the technical problem, the utility model discloses a following technical scheme:

the utility model provides a pair of signal output interface circuit, include power jam-proof circuit, signal jam-proof circuit, prevent short circuit and prevent the static circuit, the one end external power supply of power jam-proof circuit, power jam-proof circuit with signal jam-proof circuit electric connection, the external input signal of one end of signal jam-proof circuit, the other end of signal jam-proof circuit with prevent short circuit electric connection, prevent the short circuit with prevent static circuit electric connection, it is external to have signal output interface to prevent the static circuit.

Preferably, the power supply anti-interference circuit and the signal anti-interference circuit are both magnetic bead filtering.

Preferably, the short-circuit prevention circuit is a processor U1, the IN pin of the processor U1 is a signal input terminal, the IN pin of the processor U1 is grounded through an input capacitor, the GND pin of the processor U1 is grounded, the ON pin of the processor U1 is connected to the IN pin of the processor U1 through a resistor R1, the FLAG pin of the processor U1 is connected to the IN pin of the processor U1 through a resistor R2, the OUT pin of the processor U1 is a signal output terminal, and the IN pin of the processor U1 and the OUT pin of the processor U1 are both grounded through an output capacitor.

Preferably, the short-circuit prevention circuit is a processor U1, and the processor U1 detects current by using a chip.

Preferably, the anti-static circuit is a processor U2, pin 1 of the processor U2 is grounded, pin 2 of the processor U2 is connected to the power supply, and pin 3 of the processor U2 is connected to the short-circuit prevention circuit.

Preferably, the processor U2 employs a diode to direct the momentary voltage to either power or ground.

Preferably, the processor U1 has a model of MAX4915A, and the processor U2 has a model of NUP 1301U.

The utility model has the advantages that:

the utility model provides a signal output interface circuit, which comprises a power supply anti-interference circuit, a signal anti-interference circuit, an anti-short circuit and an anti-static circuit, wherein one end of the power supply anti-interference circuit is externally connected with a power supply, the power supply anti-interference circuit is electrically connected with the signal anti-interference circuit, one end of the signal anti-interference circuit is externally connected with an input signal, the other end of the signal anti-interference circuit is electrically connected with the anti-short circuit, the anti-short circuit is electrically connected with the anti-static circuit, the anti-static circuit is externally connected with a signal output interface, the power supply anti-interference circuit and the signal anti-interference circuit can filter an input port of the anti-short circuit, prevent interference signals brought into the outside from the power supply and the input signals, influence the effect of the output signals, and the utility model can process static generated during work through the anti-static circuit, can effectively avoid the product damage that electronic product caused because static in production and use, still the utility model discloses still have and prevent the circuit function, this signal input interface protector is burnt out to the effectual short circuit that prevents.

Drawings

Fig. 1 is a circuit diagram of the present invention.

Detailed Description

In order to facilitate understanding of those skilled in the art, the present invention will be further described with reference to the following examples and drawings, which are not intended to limit the present invention. The present invention will be described in detail with reference to the accompanying drawings.

In this embodiment, the power supply anti-interference circuit and the signal anti-interference circuit are both magnetic bead filters, magnetic beads mainly eliminate RF noise existing in a transmission line circuit, RF energy is an alternating current sine wave component superimposed on a direct current transmission level, a direct current component is a required useful signal, and to eliminate unnecessary signal energy, a chip magnetic bead is required to play a role (attenuator) of a high-frequency resistor, the device allows a direct current signal to pass through, and filters an alternating current signal.

IN this embodiment, the short-circuit prevention circuit is a processor U1, the IN pin of the processor U1 is a signal input terminal, the IN pin of the processor U1 is grounded through an input capacitor, the GND pin of the processor U1 is grounded, the ON pin of the processor U1 is connected to the IN pin of the processor U1 through a resistor R1, the FLAG pin of the processor U1 is connected to the IN pin of the processor U1 through a resistor R2, the OUT pin of the processor U1 is a signal output terminal, the IN pin of the processor U1 and the OUT pin of the processor U1 are both grounded through an output capacitor, and the short-circuit prevention portion is implemented as follows: the output signal enters an IN pin of a short-circuit prevention circuit U1 after being filtered, the voltage drop of an internal current detection resistor is compared with two reference voltages to monitor forward or reverse current limiting faults, once the load current is greater than a preset threshold and the duration exceeds the shielding time, the latch output pulls down a FLAG and turns off a switch to trigger the FLAG output, the FLAG sends out an alarm signal to a microprocessor to set ON to a high level to enable a current limiting switch, if the input voltage is higher than a UVLO threshold and no fault exists, the switch is kept ON, when the input voltage is too low, an undervoltage lockout (UVLO) circuit can avoid wrong switching operation, all devices can limit reverse current (VOUT to VIN) to enable the reverse current limiting switch not to exceed the IREV maximum value, if the duration of the reverse current limiting fault exceeds the shielding time or the tube core temperature exceeds the thermal turn-off temperature of +150 ℃, the OUT terminal is disconnected from IN from the inside, the switch is disconnected, a FLAG signal is triggered, the function can prevent overlarge directional current from flowing into a power supply through the device, the circuit also has an automatic retry function, the switch can be closed again after internal retry time, after the shielding time is over, if a load fault still exists, the switch is disconnected again, the process is repeated IN this way, IN the retry period, the FLAG is kept at a low level until the fault state is relieved, if the load fault disappears, the switch is kept closed, the signal is input from an IN pin of the short-circuit-proof circuit U1, and the output of the OUT pin flows to a next-stage circuit.

IN order to prevent the input voltage from falling when the instantaneous output is short-circuited, a capacitor needs to be connected between IN and GND, so that the falling of the input voltage is reduced; a ceramic capacitor is connected between OUT and GND, the capacitor helps to prevent parasitic inductance from pulling OUT to a negative level at the moment of switch disconnection, misoperation of a device is avoided, if load capacitance is too large, enough time may not be available for charging the capacitor, the device may mistakenly think that a load has a fault, and the maximum capacitive load which can be driven by the OUT end can be calculated by the following formula:

。

in this embodiment, the short-circuit prevention circuit is a processor U1, and the processor U1 detects current by using a chip.

In this embodiment, the anti-static circuit is the processor U2, the pin 1 of the processor U2 is grounded, the pin 2 of the processor U2 is connected to the power supply, the pin 3 of the processor U2 is connected to the short-circuit prevention circuit, and the anti-static part is used in the circuit to protect a single data line, so that when the transient voltage exceeds the forward voltage and a diode drop occurs, the transient voltage is directly led to the power supply or GND.

In this embodiment, the processor U2 employs a diode to direct the transient voltage to either the power supply or ground.

In this embodiment, the processor U1 has a model of MAX4915A, and the processor U2 has a model of NUP 1301U.

The above description is only for the preferred embodiment of the present invention, and the present invention is not limited to the above description, and although the present invention is disclosed in the preferred embodiment, it is not limited to the above description, and any person skilled in the art can make some changes or modifications to equivalent embodiments without departing from the scope of the present invention, but all the technical solutions of the present invention are within the scope of the present invention.

Claims

1. A signal output interface circuit, characterized by: including power jam-proof circuit, signal jam-proof circuit, prevent short circuit and prevent static circuit, the external power supply of one end of power jam-proof circuit, power jam-proof circuit with signal jam-proof circuit electric connection, the external input signal of one end of signal jam-proof circuit, the other end of signal jam-proof circuit with prevent short circuit electric connection, prevent short circuit with prevent static circuit electric connection, it is external to have signal output interface to prevent static circuit.

2. A signal output interface circuit according to claim 1, wherein: the power supply anti-interference circuit and the signal anti-interference circuit are both magnetic bead filtering.

3. A signal output interface circuit according to claim 1, wherein: the short circuit prevention circuit is a processor U1, the IN pin of the processor U1 is a signal input end, the IN pin of the processor U1 is grounded through an input capacitor, the GND pin of the processor U1 is grounded, the ON pin of the processor U1 is connected with the IN pin of the processor U1 through a resistor R1, the FLAG pin of the processor U1 is connected with the IN pin of the processor U1 through a resistor R2, the OUT pin of the processor U1 is a signal output end, and the IN pin of the processor U1 and the OUT pin of the processor U1 are grounded through an output capacitor.

4. A signal output interface circuit according to claim 3, wherein: the short-circuit prevention circuit is a processor U1, and the processor U1 detects current by adopting a chip.

5. A signal output interface circuit according to claim 4, wherein: the anti-static circuit is a processor U2, pin 1 of the processor U2 is grounded, pin 2 of the processor U2 is connected with the power supply, and pin 3 of the processor U2 is connected with the anti-short circuit.

6. A signal output interface circuit according to claim 5, wherein: the processor U2 employs diodes to direct the momentary voltage to either the power supply or ground.

7. A signal output interface circuit according to claim 6, wherein: the processor U1 is MAX4915A, and the processor U2 is NUP 1301U.