CN212114904U - Wireless charging parallel chip device and wireless charging device - Google Patents
Wireless charging parallel chip device and wireless charging device Download PDFInfo
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- CN212114904U CN212114904U CN202020925624.5U CN202020925624U CN212114904U CN 212114904 U CN212114904 U CN 212114904U CN 202020925624 U CN202020925624 U CN 202020925624U CN 212114904 U CN212114904 U CN 212114904U
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Abstract
The application discloses wireless parallelly connected chip device and wireless charging device that charges belongs to the wireless field of charging. The wireless charging parallel chip device comprises a resonance unit, wherein the resonance unit is connected with a bridge rectifier chip, the bridge rectifier chip comprises at least two rectifier units and a control chip which are connected in parallel, and the rectifier units are connected with the control chip. A wireless charging device, comprising: the wireless charging parallel chip device. When the method and the device are in a high-power charging state, the parasitic resistance is reduced due to the parallel connection influence of the rectifying units, so that the power loss on the rectifying units is reduced, and the heating rate is reduced.
Description
Technical Field
The utility model belongs to the wireless field of charging, concretely relates to wireless parallelly connected chip device and wireless charging device that charges.
Background
The wireless charging technology is derived from a wireless power transmission technology and can be divided into a low-power wireless charging mode and a high-power wireless charging mode. The low power wireless charging usually adopts the electromagnetic induction type, such as Qi mode for charging the mobile phone, the power supply equipment (charger) transmits the energy to the device for power utilization, and the device charges the battery by using the received energy and simultaneously provides the device for self operation. Because the charger and the electric device transmit energy by magnetic field, the charger and the electric device are not connected by electric wires, so that no conductive contact is exposed.
In a high-power charging state, the chip emits heat due to the parasitic resistance of the chip, so that the transmission power is wasted.
SUMMERY OF THE UTILITY MODEL
For solving not enough among the prior art, the utility model provides a wireless parallelly connected chip device that charges, wireless charging method and device has solved when the electric current improves, and inductance coils wastes very big consumption to the problem that generates heat.
The utility model provides a wireless parallelly connected chip device that charges, includes resonance unit, bridge rectifier chip, resonance unit with bridge rectifier chip connects, bridge rectifier chip is parallelly connected with another rectifier chip.
The resonance unit comprises at least two resonance cavities.
The number of the resonant cavities is two, the resonant cavities comprise a first resonant cavity and a second resonant cavity which are connected in parallel, the first resonant cavity comprises a first inductor Ls1 and a first capacitor Cs1 which are connected in series, the second resonant cavity comprises a second inductor Ls2 and a second capacitor Cs2 which are connected in series, and two ends of the first resonant cavity and two ends of the second resonant cavity are both connected with the input end of a bridge rectifier chip;
a first switch M5e is arranged between the second capacitor and the bridge rectifier chip in series, and a second switch is arranged between the second inductor and the bridge rectifier chip in series;
a wire is connected between the first inductor Ls1 and the first capacitor Cs1, and to the second inductor L2 and the second capacitor Cs 2.
The first capacitor Cs1 and the second capacitor Cs2 have the same capacitance value.
The first inductor Ls1 and the second inductor Ls2 have the same inductance value.
The second switch comprises two field effect transistors, a first transistor M6e and a second transistor M7 e;
the gate of the first transistor M6e is connected to the gate of the second transistor M7e and also connected to the first driving terminal DRV _ M6e of the bridge rectifier chip, the source of the first transistor M6e is connected to the source of the second transistor M7e, the drain of the first transistor M6e is connected to one end of the second inductor Ls2, and the drain of the second transistor M7e is connected to one end of the first inductor Ls 1.
And the first resonant cavity and the second resonant cavity are connected with a filter capacitor in parallel.
The rectifying chip comprises a rectifying unit and a logic control unit, and the rectifying unit is connected with the bridge rectifying chip through the logic control unit.
The resonance unit includes a resonance cavity.
A wireless charging method is realized by using the wireless charging parallel resonant cavity;
in a first working state, when the first switch and the second switch are both cut off, the first resonant cavity is accessed;
and in a second working state, when the first switch and the second switch are both conducted, the first resonant cavity and the second resonant cavity are accessed.
A wireless charging device comprises the wireless charging parallel chip device.
The beneficial effect that this application reached:
the utility model provides a wireless parallelly connected chip device and wireless charging device that charges when being in under the charged state of high power, the rectifier unit has reduced parasitic resistance because parallelly connected influence, and then reduces the power loss on it, reduces the condition of generating heat.
Drawings
FIG. 1: the utility model discloses a schematic diagram of two resonant cavities in a wireless charging parallel chip device;
FIG. 2: the utility model discloses the schematic diagram that has a resonant cavity among the wireless parallelly connected chip device that charges of embodiment.
Detailed Description
The present application is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
The utility model provides a wireless parallelly connected chip device that charges, includes resonance unit, bridge rectifier chip, resonance unit with bridge rectifier chip connects, bridge rectifier chip is parallelly connected with another rectifier chip.
The resonance unit comprises at least two resonance cavities.
The number of the resonant cavities is two, the resonant cavities comprise a first resonant cavity and a second resonant cavity which are connected in parallel, the first resonant cavity comprises a first inductor Ls1 and a first capacitor Cs1 which are connected in series, the second resonant cavity comprises a second inductor Ls2 and a second capacitor Cs2 which are connected in series, and two ends of the first resonant cavity and two ends of the second resonant cavity are both connected with the input end of a bridge rectifier chip;
a first switch M5e is arranged between the second capacitor and the bridge rectifier chip in series, and a second switch is arranged between the second inductor and the bridge rectifier chip in series;
a wire is connected between the first inductor Ls1 and the first capacitor Cs1, and to the second inductor L2 and the second capacitor Cs 2.
The function of the lead: when the two resonant cavities are connected in parallel, L is reduced for the original inductance value, and C is increased, so that the stability of front and rear resonant frequencies is ensured. In a preferred embodiment, Ls1 and Ls2 are set to have equal inductance values, Cs1 and Cs2 have equal capacitance values, at this time, the inductance value of the new resonant cavity connected in parallel is half of the original inductance value, the capacitance value is twice of the original capacitance value, and the resonant frequency is not changed totally, so that the new resonant cavity is matched with the resonant cavity at the transmitting end after being changed, and the maximum transmission efficiency is ensured.
The first capacitor Cs1 and the second capacitor Cs2 have the same capacitance value.
The first inductor Ls1 and the second inductor Ls2 have the same inductance value.
A wireless charging method is realized by using the wireless charging parallel resonant cavity;
in a first working state, when the first switch and the second switch are both cut off, the first resonant cavity is accessed;
and in a second working state, when the first switch and the second switch are both conducted, the first resonant cavity and the second resonant cavity are accessed.
When the first switch and the second switch are both turned off, that is, the first switch M5e, the first transistor M6e and the second transistor M7e are all turned off, and are connected to the first resonant cavity;
at the moment, the device is in a low-power consumption use state, and is connected into a resonant cavity, and the heating is not high due to the fact that the current is small;
to make the receiving coil easily driven by the wireless transmitting coil, Ls1, Cs1 are 8 μ H, 300 nH;
at low power, the first resonant cavity Ls1, Cs1 operates at a resonant frequency of:
wherein f isT1At the resonant frequency in the first working state, Ls1 is the inductance value of the first inductor Ls1, and Cs1 is the capacitance value of the first capacitor Cs 1;
in a second working state, when the first switch and the second switch are both turned on, that is, the first switch M5e, the first transistor M6e and the second transistor M7e are all turned on, and are connected to the first resonant cavity and the second resonant cavity;
in the low-power use state, the current is low, the heat generated by the resonant cavity is low, the temperature rise is not obvious, and the influence on the operation of the semiconductor device is not obvious.
Under the condition of low power, if the resonant cavity is not changed, the heating power of the resonant cavity is increased, the temperature is increased, and the normal operation of the semiconductor device is influenced. Because the total power transmitted from the transmitting end to the receiving end is constant, the heating power of the resonant cavity is increased, and the power actually used for charging is reduced. Therefore, in the high-power use state, the other resonant cavity is merged into the resonant unit through the change of the connection relation, so that the overall parasitic resistance of the resonant unit is reduced, the heating power is reduced, and the actual charging efficiency is improved.
When the charging current increases, Rx sends a predetermined instruction to Tx, and Tx increases the voltage of a transmitting coil; simultaneously, the following steps:
DRV_M5e＝BSTP；
DRV_M6e＝BSTN；
DRV _ M5e is a voltage of DRV _ M5e of the bridge rectifier IC, DRV _ M6e is a voltage of DRV _ M6e of the bridge rectifier IC, BSTP is a voltage of BSTP, and BSTN is a voltage of BSTN.
External MOSFET: m5e, M6e and M7e are turned on simultaneously, and the on-resistance is 10 mOhms. By reasonable design, Ls2 is Ls1, and Cs2 is Cs1, and the inductance and capacitance values of the resonant cavity are as follows:
the resonant frequency of the cavity is thus constant:
wherein Ls isTotalIs the total inductance of the resonator, CsTotalIs the total capacitance of the resonator.
However, the parallel connection of Ls1 and Ls2 changes the series parasitic resistance of the coil to 1/2, thereby saving power consumption and reducing heat generation.
The second switch comprises two field effect transistors, a first transistor M6e and a second transistor M7 e;
the gate of the first transistor M6e is connected to the gate of the second transistor M7e and also connected to the first driving terminal DRV _ M6e of the bridge rectifier chip, the source of the first transistor M6e is connected to the source of the second transistor M7e, the drain of the first transistor M6e is connected to one end of the second inductor Ls2, and the drain of the second transistor M7e is connected to one end of the first inductor Ls 1.
The function is as follows: preventing the field effect transistor from turning on when in the off state, affecting the potential at Ls 1.
And the first resonant cavity and the second resonant cavity are connected with a filter capacitor in parallel.
The rectifying chip comprises a rectifying unit and a logic control unit, the rectifying unit is connected with the bridge rectifying chip through the logic control unit, as shown in fig. 1, the detailed connection mode is described as follows:
the method specifically comprises the following steps: a first switch M5e, a first transistor M6e, a second transistor M7e, a first inductor Ls1, a second inductor Ls2, a first capacitor Cs1, and a second capacitor Cs 2;
the first inductor Ls1 and the first capacitor Cs1 are connected in series to form a first resonant cavity, the second inductor Ls2 and the second capacitor Cs2 are connected in series to form a second resonant cavity, and the first resonant cavity and the second resonant cavity are connected in parallel and are both connected with a bridge rectifier chip.
The first switch M5e is located on the second capacitor Cs2 side of the second resonant cavity, and is respectively connected to the second capacitor Cs2 and the bridge rectifier chip, and the first transistor M6e is connected in series with the second transistor M7e, is placed on the second inductor Ls2 side of the second resonant cavity, and is respectively connected to the second inductor Ls2 and the bridge rectifier chip; the junction of the first inductor Ls1 and the first capacitor Cs1 is connected to the junction of the second inductor Ls2 and the second capacitor Cs 2.
In the first resonant cavity, one end of the first capacitor Cs1 is connected to a connection point ACP of a bridge rectifier chip, and the other end of the first capacitor Cs1 is connected to one end of the first inductor Ls1 and a connection point of the second inductor Ls2 and the second capacitor Cs2, respectively; the other end of the first inductor Ls1 is connected with a connection point ACN of the bridge rectifier chip; a connection point ACN of the bridge rectifier chip is connected to a drain of the second transistor M7e, a source of the second transistor M7e is connected to a source of the first transistor M6e, a gate of the second transistor M7e is connected to a gate of the first transistor M6e and a driving signal terminal DRV _ M6e of the bridge rectifier chip, respectively, a drain of the first transistor M6e is connected to one end of a second inductor Ls2, the other end of the second inductor Ls2 is connected to one end of a second capacitor Cs2, the other end of the second capacitor Cs2 is connected to a drain of the first switch M5e, a source of the first switch M5e is connected to a connection point ACP of the bridge rectifier chip, and a gate of the first switch M5e is connected to a driving signal terminal DRV _ M5e of the bridge rectifier chip.
A first rectifying unit comprising: m1, M2, M3, M4.
A second rectification unit including: m1e, M2e, M3e, M4 e.
The resonant unit comprises a resonant cavity, as shown in fig. 2.
The one resonant cavity includes: a first inductor Ls1, a first capacitor Cs 1;
one end of the first inductor Ls1 is connected to one end of a first capacitor Cs1, the other end of the first capacitor Cs1 is connected to a connection point ACP and one end of a filter capacitor C3, respectively, and the other end of the first inductor Ls1 is connected to the other end of the C3 and the connection point ACN, respectively.
The applicant of the present invention has made detailed description and description of the embodiments of the present invention with reference to the drawings, but those skilled in the art should understand that the above embodiments are only the preferred embodiments of the present invention, and the detailed description is only for helping the reader to better understand the spirit of the present invention, and not for the limitation of the protection scope of the present invention, on the contrary, any improvement or modification made based on the spirit of the present invention should fall within the protection scope of the present invention.
Claims (8)
1. A wireless charging parallel chip device comprises a resonance unit and a bridge rectifier chip, wherein the resonance unit is connected with the bridge rectifier chip, the wireless charging parallel chip device is characterized in that the bridge rectifier chip is connected with another rectifier chip in parallel, the resonance unit at least comprises two resonant cavities, the number of the resonant cavities is two, the resonant cavities comprise a first resonant cavity and a second resonant cavity which are connected with each other in parallel, the first resonant cavity comprises a first inductor (Ls1) and a first capacitor (Cs1) which are connected with each other in series, the second resonant cavity comprises a second inductor (Ls2) and a second capacitor (Cs2) which are connected with each other in series, and two ends of the first resonant cavity and the second resonant cavity are both connected with an input end of the bridge rectifier chip;
a first switch is arranged between the second capacitor and the bridge rectifier chip in series, and a second switch is arranged between the second inductor and the bridge rectifier chip in series;
a wire is connected between the first inductor (Ls1) and the first capacitor (Cs1) and between the second inductor (Ls2) and the second capacitor (Cs 2).
2. The wireless charging parallel chip device according to claim 1, wherein: the first capacitance (Cs1) and the second capacitance (Cs2) are equal in capacitance value.
3. The wireless charging parallel chip device according to claim 2, wherein: the inductance values of the first inductor (Ls1) and the second inductor (Ls2) are equal.
4. The wireless charging parallel chip device according to claim 3, wherein: the second switch comprises two field effect transistors, a first transistor (M6e) and a second transistor (M7 e);
the gate of the first transistor (M6e) is connected to the gate of the second transistor (M7e) and is also connected to the first driving terminal (DRV _ M6e) of the bridge rectifier chip, the source of the first transistor (M6e) is connected to the source of the second transistor (M7e), the drain of the first transistor (M6e) is connected to one end of the second inductor (Ls2), and the drain of the second transistor (M7e) is connected to one end of the first inductor (Ls 1).
5. The wireless charging parallel chip device according to claim 4, wherein: and the first resonant cavity and the second resonant cavity are connected with a filter capacitor in parallel.
6. The wireless charging parallel chip device according to claim 5, wherein: the rectifying chip comprises a rectifying unit and a logic control unit, and the rectifying unit is connected with the bridge rectifying chip through the logic control unit.
7. The wireless charging parallel chip device according to claim 6, wherein: the resonance unit includes a resonance cavity.
8. A wireless charging device, characterized in that: the wireless charging parallel chip device of any one of claims 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020925624.5U CN212114904U (en) | 2020-05-27 | 2020-05-27 | Wireless charging parallel chip device and wireless charging device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020925624.5U CN212114904U (en) | 2020-05-27 | 2020-05-27 | Wireless charging parallel chip device and wireless charging device |
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| Publication Number | Publication Date |
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| CN212114904U true CN212114904U (en) | 2020-12-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202020925624.5U Active CN212114904U (en) | 2020-05-27 | 2020-05-27 | Wireless charging parallel chip device and wireless charging device |
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| CN (1) | CN212114904U (en) |
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Address after: Room 01, 10 / F, block a, Tiangong building, No.30 Xueyuan Road, Haidian District, Beijing Patentee after: Meixinsheng Technology (Beijing) Co.,Ltd. Address before: Room 01, 10 / F, block a, Tiangong building, No.30 Xueyuan Road, Haidian District, Beijing Patentee before: MAXIC TECHNOLOGY (BEIJING) Co.,Ltd. |
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