CN212111745U - Power-off sensor - Google Patents

Power-off sensor Download PDF

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Publication number
CN212111745U
CN212111745U CN202020377439.7U CN202020377439U CN212111745U CN 212111745 U CN212111745 U CN 212111745U CN 202020377439 U CN202020377439 U CN 202020377439U CN 212111745 U CN212111745 U CN 212111745U
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module
output
fsu
processing module
sampling
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CN202020377439.7U
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Inventor
张宇
胡永成
向茜
陈竹
夏刚
邹军林
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China Tower Co ltd Guizhou Branch
Guangzhou Jiyue Electronics Co ltd
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China Tower Co ltd Guizhou Branch
Guangzhou Jiyue Electronics Co ltd
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Abstract

The utility model relates to an automatically controlled field of communication basic station provides a power failure sensor for solve the problem of the unable effective management and control of basic station power supply. The utility model provides a power-off sensor, including sampling module, processing module, output module, sampling module is connected with processing module, processing module is connected with output module, output module is connected with FSU's input; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU. The sampling module can be arranged at the front end of a circuit breaker or a transformer substation accessed by mains supply, and the processing module processes the acquired data to realize the quick discovery of power-off signals.

Description

Power-off sensor
Technical Field
The utility model relates to an automatically controlled field of communication basic station, concretely relates to outage sensor.
Background
At present, power failure monitoring of a communication base station is realized by acquiring power failure information mainly through a switching power supply and uploading the power failure information to an operation and maintenance system through a communication interface and a movable ring FSU. However, due to the storage of the switching power supply, a considerable part of the communication interfaces and the monitoring modules are in failure, power failure information cannot be acquired or timely acquired, and power generation and normal mains supply cannot be distinguished. The timeliness of power generation and signal acquisition of the communication server have no effective means for controlling.
SUMMERY OF THE UTILITY MODEL
The utility model provides a technical problem for the problem of solving the unable effective management and control of basic station power supply, provide a power failure sensor.
In order to solve the technical problem, the utility model provides a technical scheme does:
a power failure sensor comprises a sampling module, a processing module and an output module, wherein the sampling module is connected with the processing module, the processing module is connected with the output module, and the output module is connected with the input end of an FSU; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU.
The sampling module collects the information of the circuit, the processing module processes the collected information and outputs a processing result to the FSU.
The sampling module can be arranged at the front end of a circuit breaker or a transformer substation accessed by mains supply, and the processing module processes the acquired data to realize the quick discovery of power-off signals.
Preferably, the single chip microcomputer is STM32F030C8T 6.
Preferably, the sampling module is a digital circuit capable of processing the level. The digital circuit can process the level and can effectively acquire the data of the alternating current and output the data of the running state of the alternating current.
Preferably, the inverter is a CMOS inverter. The CMOS inverter can output high level and low level, and output of different voltages or currents is achieved.
Preferably, the input end of the FSU is connected with the output module through an interface type adjusting module, the interface type adjusting module is a double control switch, the output module comprises a controllable voltage source and a controllable constant current source, the double control switch comprises a main control end, a first contact and a second contact, the first contact is connected with one end of the controllable voltage source, the second contact is connected with one end of the controllable constant current source, and the main control end is connected with the input end of the FSU; the controllable voltage source and the controllable constant current source are connected with the output module. Different FSU interfaces have different interface types, mainly voltage type or current type, and different inputs or outputs are realized through controllable voltage or constant current sources.
Preferably, the processing module comprises a delay module. The delay module is used for delaying the output signal result, and avoids the data acquisition error caused by flash.
Preferably, the device further comprises a port detection module, the port detection module is connected with the processing module, the port detection module acquires the type of the FSU port, and the processing module determines the type of the output signal according to the type of the FSU port.
Preferably, the sampling mode of the sampling module is isolated sampling, and the sampling module is connected with the surge protection module.
Compared with the prior art, the utility model discloses the beneficial effect who has does: the sampling module can be arranged at the front end of a circuit breaker or a transformer substation which is accessed by commercial power, and the processing module processes the acquired data to realize the rapid discovery of the power-off signal; different types of FSU devices can be adapted to provide a plurality of data output types; the power failure information can be timely and effectively acquired, and the artificial power failure and the power supply fault can be distinguished.
Drawings
Fig. 1 is a schematic diagram of a power-off sensor.
FIG. 2 is another schematic diagram of a power outage sensor.
FIG. 3 is another schematic diagram of a power outage sensor.
Detailed Description
The following examples are further illustrative of the present invention and are not intended to be limiting thereof.
Example 1
A power failure sensor comprises a sampling module, a processing module and an output module, wherein the sampling module is connected with the processing module, the processing module is connected with the output module, and the output module is connected with the input end of an FSU; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU. The single chip microcomputer is STM32F030C8T 6. The sampling module can process the level for a digital circuit. The sampling mode of the sampling module is isolated sampling, and the sampling module is connected with the surge protection module. The inverter is a CMOS inverter. The processing module comprises a delay module. The output module may output a voltage signal to the FSU.
The sampling module acquires circuit information, the processing module processes the acquired information and outputs a processing result to the FSU; the set resistor may output a current or voltage signal to the FSU interface. The sampling module can be arranged at the front end of a circuit breaker or a transformer substation accessed by mains supply, and the processing module processes the acquired data to realize the quick discovery of power-off signals. Two resistors are arranged, and signals of different voltages or currents can be output before and after the signals are acquired. The digital circuit can process the level and can effectively acquire the data of the alternating current and output the data of the running state of the alternating current. The CMOS inverter can output high level and low level, and output of different voltages or currents is achieved. The delay module is used for delaying the output signal result, and avoids the data acquisition error caused by flash.
Example 2
A power failure sensor comprises a sampling module, a processing module and an output module, wherein the sampling module is connected with the processing module, the processing module is connected with the output module, and the output module is connected with the input end of an FSU; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU. The single chip microcomputer is STM32F030C8T 6. The sampling module can process the level for a digital circuit. The sampling mode of the sampling module is isolated sampling, and the sampling module is connected with the surge protection module. The inverter is a CMOS inverter. The processing module comprises a delay module. The output module may output a current signal to the FSU.
Example 3
A power failure sensor comprises a sampling module, a processing module and an output module, wherein the sampling module is connected with the processing module, the processing module is connected with the output module, and the output module is connected with the input end of an FSU; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU. The single chip microcomputer is STM32F030C8T 6. The sampling module can process the level for a digital circuit. The inverter is a CMOS inverter. The input end of the FSU is connected with the output module through an interface type adjusting module, the interface type adjusting module is a double-control switch, the output module comprises a controllable voltage source and a controllable constant current source, the double-control switch comprises a main control end, a first contact and a second contact, the first contact is connected with one end of the controllable voltage source, the second contact is connected with one end of the controllable constant current source, and the main control end is connected with the input end of the FSU; the controllable voltage source and the controllable constant current source are connected with the output module. The processing module comprises a delay module. The system also comprises a port detection module, wherein the port detection module is connected with the processing module, the port detection module acquires the FSU port type, and the processing module determines the output signal type according to the FSU port type. The sampling mode of the sampling module is isolated sampling, and the sampling module is connected with the surge protection module.
The port detection module transmits a signal to the processing module after acquiring the type of the FSU, and the processing module controls the double-control switch to be closed according to the type of the FSU. For example, the FSU may receive the voltage signal and control the first contact to connect to the master.
The dual-control switch can be closed in various ways, for example, the dual-control switch is connected with a motor, and the motor can receive a signal sent by the processing module and control the main control end to be connected with one of the first contact or the second contact.
The above detailed description is specific to possible embodiments of the present invention, and the above embodiments are not intended to limit the scope of the present invention, and all equivalent implementations or modifications that do not depart from the scope of the present invention should be included within the scope of the present invention.

Claims (7)

1. The power failure sensor is characterized by comprising a sampling module, a processing module and an output module, wherein the sampling module is connected with the processing module, the processing module is connected with the output module, and the output module is connected with the input end of an FSU; the sampling module is respectively connected with a live wire of alternating current, the output module comprises a phase inverter, the input end of the phase inverter is connected with the processing module, and the output end of the phase inverter is connected with the input end of the FSU.
2. The outage sensor of claim 1, wherein the sampling module is digital circuit capable of processing levels.
3. A power down sensor as claimed in claim 1, wherein the inverter is a CMOS inverter.
4. The outage sensor according to claim 1, wherein an input end of the FSU is connected with an output module through an interface type adjusting module, the interface type adjusting module is a double-control switch, the output module comprises a controllable voltage source and a controllable constant current source, the double-control switch comprises a main control end, a first contact and a second contact, the first contact is connected with one end of the controllable voltage source, the second contact is connected with one end of the controllable constant current source, and the main control end is connected with the input end of the FSU; the controllable voltage source and the controllable constant current source are connected with the output module.
5. A power outage sensor as claimed in claim 1, characterised in that the processing module comprises a time delay module.
6. The outage sensor according to claim 1, further comprising a port detection module, wherein the port detection module is connected with a processing module, the port detection module obtains an FSU port type, and the processing module determines an output signal type according to the FSU port type.
7. The outage sensor according to claim 1, wherein the sampling module is used for sampling in an isolated mode, and is connected with the surge protection module.
CN202020377439.7U 2020-03-23 2020-03-23 Power-off sensor Active CN212111745U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020377439.7U CN212111745U (en) 2020-03-23 2020-03-23 Power-off sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020377439.7U CN212111745U (en) 2020-03-23 2020-03-23 Power-off sensor

Publications (1)

Publication Number Publication Date
CN212111745U true CN212111745U (en) 2020-12-08

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Country Status (1)

Country Link
CN (1) CN212111745U (en)

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